JPH0411472A - Title picture inserting device - Google Patents

Abstract

PURPOSE:To improve operability at the time of executing title scrolling by providing a means to make inserting starting timing to the video signal of a title picture signal synchronized with recording action starting timing. CONSTITUTION:A titler circuit 12 executes an inserting action to read picture data written in a memory 13 with a registering action and to output them as a title picture signal when it receives the operation of an operating switch 32. That is, the picture data read from the memory 13 are converted into serial data within the circuit 12. The picture data are color-assigned, become three- primary-color-signals R, G and B, are supplied to respective imposing circuits 5, 6 and 7 through a converting circuit 15 and are inserted into a video signal outputted from an image pickup signal processing circuit 4. By this operating action, the title picture signal read from the memory 13 can be inserted into the video signal outputted from the circuit 4.

Description

[Detailed Description of the Invention] [Industrial Application Field] The second invention is a title image insertion device, especially a title! (
The present invention relates to a title image insertion device that can easily synchronize the timing of starting scrolling and the timing of starting recording operation.

[Summary of the invention]

The invention of claim (1) provides a title image insertion device that includes means for synchronizing the timing of starting insertion of a title image signal into a video signal and the timing of starting a recording operation, so that when title scrolling is performed, This greatly improves the operability of the system.

The invention of claim (2) provides a title image insertion device that, when a playback device and a recording device are in a standby state, determines the timing at which the standby state is released and the start of inserting a title image signal into a video signal. By providing means for synchronizing the timing of title scrolling, it is possible to greatly improve the operability when title scrolling is performed.

[Conventional technology]

Conventionally, title image insertion devices such as titlers and telopers form image signals of title images such as title information and subtitle information according to the content of the image being played back from a video signal and insert them into the video signal (so-called superimposition). is known as a peripheral device for video tape recorders (VTRs).

Further, in a camera-integrated VTR that includes an imaging unit that photographs a subject image and a recording unit that records a video signal formed from the imaging output obtained by the imaging unit, a video of the image captured by the imaging unit is provided. The signal is digitized to form image data, and is written into a memory, and the image data is read from the memory so that the captured image can be scrolled and displayed to form a title image signal, and this title image signal is inserted into the video signal. A device incorporating a title image insertion device is disclosed in the specification and drawings of Japanese Patent Application No. 14554/1983 proposed by the applicant of the present application.

In this conventional technology, address data for reading image data stored in a memory means is transmitted at a repetition period corresponding to an effective image range, and the start timing of address counters in the horizontal scanning direction and vertical scanning direction of the image memory is set in one field. By shifting the title image for each frame, the title image is scrolled to form a title image signal, and this title image signal is inserted into the video signal.

[Problem R to be Solved by the Invention] However, in the above-mentioned conventional technology, although the title scrolling function is provided, each time a user wants to start title scrolling, the button for title scrolling must be manually operated. There wasn't.

For example, in the case of boat fishing, the title image is often inserted when the scene changes, especially at the start of recording.

In this case, in the above-mentioned conventional technology, the button for inserting the title image must be manually operated in synchronization with the recording start timing, but the timing of the recording start timing and the title scroll start timing, that is, the title scroll-in timing. The problem was that it was difficult to synchronize the data, and there were difficulties in operability.

Therefore, an object of the present invention is to provide a title image insertion device that can automatically synchronize the timing of starting title scrolling and the timing of starting recording.

[Means to solve the problem]

The invention of claim (1) is a title image insertion device that inserts and records a title image signal into a video signal, and synchronizes the timing of starting insertion of the title image signal into the video signal and the timing of starting recording operation. The structure is equipped with means.

The invention of claim (2) provides a title image insertion device for inserting a title image signal into a video signal played by a playback device and recorded by a recording device, wherein the playback device and the recording device are in a standby state. The present invention is configured to include means for synchronizing the timing at which the standby state is canceled and the timing at which insertion of the title image signal into the video signal is started.

[Effect]

The invention of claim (1) provides a method for scrolling and displaying the title image in synchronization with the timing of the start of recording operation.
A title image signal is output. Therefore, the operability during title scroll-in can be greatly improved.

The invention of claim (2) is a system for inserting a title image signal into a video signal played back by a playback device at a certain timing, and recording the title image signal and the video signal by a recording device, When both recording devices are paused, a title image signal is output so that the title image can be scrolled and displayed in synchronization with the timing at which the playback device and the recording device are released from the standby state.

Therefore, the operability during title scroll-in can be greatly improved.

[Example] Hereinafter, an example of the present invention will be described with reference to FIGS. 1 to 12.
This will be explained with reference to the figures. In this embodiment, the title image insertion device according to the present invention is applied to a camera-integrated VTR. Further, this embodiment will be explained in the following order.

(A) Configuration of camera-integrated 8 mm VTR (B)
Configuration of titler circuit (C) Operation of titler circuit (D) Registration operation (E) Insertion operation (F) Scroll operation (G) Color specification operation (H) Application example (A) Configuration of camera-integrated 8 am VTR (3rd
figure.

Fig. 6) Fig. 3 and Fig. 6 show an image capturing section 10 for photographing a subject image, and a recording section 20 for recording a video signal obtained by the image capturing section 10 in a predetermined format of 8-kaku video. NT with built-in title image insertion device integrated into 30
This figure shows an integrated SC camera 8 WIV TR.

As shown in the external perspective view of FIG. 6, the device main body 30 includes:
An imaging lens 35 that guides imaging light to the solid-state imager 1 of the imaging unit 10 is provided, as well as an electronic viewfinder 40 for monitoring the subject image being photographed by the imaging unit 10, and each operation switch 31. ,32,33h,
33v, 34°90, etc. are provided.

Further, as shown in FIG. 3, the imaging section 10 is equipped with a solid-state imager 1 formed by a charge-coupled device (CCD), and this solid-state imager 1 is based on a synchronization signal generated by a synchronization signal generation circuit 2. The sensor is driven by a COD drive circuit 3 that operates in a solid-state imager 1, and supplies an imaging output of a subject image obtained by the solid-state imager 1 to an imaging signal processing circuit 4.

The imaging signal processing circuit 4 generates a luminance signal (Y) indicating a subject image and a color difference signal (R-) from the imaging output from the solid-state imager 1.
Y), (B-Y) is formed. The luminance signal (Y) and color difference signal (R-Y
), (B-Y) are impose circuits 5 and 6.7, respectively.
The signal is supplied to the NTSC encoder 8 via the NTSC encoder 8.

The NTSC encoder 8 converts a luminance signal (Y) and a color difference signal (
An NTSC video signal representing a subject image is formed from R-Y) and B-Y. The video signal formed by this NTSC encoder 8 is supplied to a 1-bit A/D converter 11, and is also supplied to an electronic viewfinder 4.
0 and is supplied to the recording section 20.

The A/D converter 11 includes a level comparator that compares the luminance signal (Y) of the video signal supplied from the NTSC encoder 8 with a predetermined signal level, and the level of the luminance signal (Y) is set to the predetermined signal level. When it is larger, image data is shown as "°0pa", and when it is smaller, it is shown as "'1". The image data formed by this A/D converter 11 is written to the memory 13 via the titler circuit 12. It will be done.

The memory 13 is composed of a static RAM that stores image data formed by the A/D converter 11, and is powered by a lithium battery 14 so that the data will not be lost even if the main power is cut off. is used as a backup power source. The voltage drop of the lithium battery 14 is monitored by a voltage drop detection circuit (not shown), and a warning is displayed in the electronic viewfinder 40 before the backup function of the memory 13 is lost.

The titler circuit 12 is supplied with a synchronization signal from the synchronization signal generation circuit 2, and based on this synchronization signal, the memory 1
The image data writing/reading control to the memory 13 is performed by forming the writing/reading at least one L/S data of No. 3. In addition, the titler circuit 12 has 3
Primary color signal (R.

G, B) to the conversion circuit 15, and the memory 1
The operation of each impose circuit 5, 6.7 is controlled according to the image data read out from the image data input section 3.

The conversion circuit 15 is supplied with 3 from the titler circuit 12.
The primary color signals (R, G, B) are converted into a luminance signal (Y) and a color difference signal (
R-Y), (B-Y) and each impose circuit 5
．． 6.7, respectively.

These impose circuits 5, 6.7 are the titler circuit 1
2, the luminance signal (Y) and color difference signal (RY) supplied from the conversion circuit 15.

(B-Y) is inserted into the output signal of the imaging signal processing circuit 4.

(B) Structure of the titler circuit (FIGS. 1 and 2) FIG. 1 is a circuit diagram showing the structure of the titler circuit 12. As shown in FIG. In FIG. 1, the titler circuit 12 includes a switch section 91, a terminal section 92, a shift register 50, and a gate circuit 5.
1, H absolute position counter 52h, ■ Absolute position counter 5
2v, an H counter control circuit 53h, a V counter control circuit 53v, an H image range designation circuit 54h, (2) an image range designation circuit 54v, an H address counter 55h, (2) an address counter 55v, a scroll instruction circuit 56, and the like.

As shown in FIG. 2, the switch section 91 includes an operation switch 90 for reserving insertion of a title image signal into a video signal, and an operation switch 90 for reserving insertion of a title image signal into a video signal, and an operation switch 90 for specifying the start of a scroll operation in the horizontal direction, which is provided on the main body 30 of the apparatus. A switch 33h and an operation switch 33 that specifies the start of vertical scrolling operation.
It consists of v.

The above-mentioned operation switch 90 is connected to a designated input terminal 93P for reserving a title scroll operation, and the operation switch 33h is connected to a designated input terminal 9 for reserving a horizontal scroll operation.
3h, and the operation switch 33v is connected to a vertical scroll operation designation input terminal 93v.

Further, the terminal section 92 includes the above-mentioned specified input terminals 93h, 93
v, 93P, a terminal 94 and a designated input terminal 95 to which the recording operation start timing signal SR is input, a terminal 96 and a designated input terminal 97 to which the pause release timing signal SP is input, and the above-mentioned timing signal SR, It is composed of an OR gate 98 that calculates the logical sum of SP.

The specified input terminal 93h described above is connected to a scroll instruction circuit 56, which will be described later, via a terminal 105.
v is connected to a scroll instruction circuit 56 (described later) via a terminal 106.
The designation input terminal 93P is connected to a scroll instruction circuit 56, which will be described later, via a terminal 107. Further, the output of the OR gate 98 is connected to a scroll instruction circuit 56, which will be described later, via a terminal 108.

The shift register 50 has a serial input terminal connected to the image data input terminal 61, and a serial output terminal connected to the gate circuit 5.
1 to the image data output terminal 62, and
The parallel output terminal of the predetermined bit is the data input/output terminal group 8
1 to the memory 13.

The H absolute position counter 52h has a clock input terminal connected to the clock input terminal 63, a reset input terminal connected to the horizontal synchronization input terminal 64h, and an H absolute position counter 52h that indicates the absolute position in the horizontal direction with respect to the screen. A data output end is connected to an H counter control circuit 53h and an H image range designation circuit 54h.

In addition, the absolute position counter 52v has a clock input terminal connected to the horizontal synchronization input terminal 64h, a reset input terminal connected to the vertical synchronization input terminal 64V, and an absolute position counter 52v that indicates the absolute position in the vertical direction with respect to the screen. The output end of the position data is connected to the V counter control circuit 53v and the image range designation circuit 54v. Note that a clock pulse having a predetermined frequency is supplied to the clock input terminal 63. Furthermore, each synchronization signal is supplied from the synchronization signal generation circuit 2 to the horizontal synchronization input terminal 64h and the vertical synchronization input terminal 64V.

The H counter control circuit 53h has an H absolute position data input terminal connected to the H absolute position counter 52h, a horizontal scroll operation instruction data input terminal connected to the scroll instruction circuit 56, and a vertical synchronization signal input terminal connected to the H absolute position counter 52h. It is connected to the vertical synchronization input terminal 64v, and the output terminal of the H counter control signal is connected to the H address counter 55h.

In addition, the V counter control circuit 53v has an input terminal for absolute position data connected to an absolute position counter 52, an input terminal for vertical scroll operation instruction data connected to a scroll instruction circuit 56, and an input terminal for a vertical synchronization signal. The terminal is connected to the vertical synchronization input terminal 64v, and the output terminal of the counter control signal is connected to the address counter 55v.

The H address counter 55h has a clock input terminal connected to the clock input terminal 63, and a parallel output terminal of horizontal address data of a predetermined bit connected to the H image range designation circuit 5.
4h, and is also connected to the memory 13 via an address data output terminal group 82.

In addition, the clock input terminal of the address counter 55v is connected to the horizontal synchronization input terminal 64h, and the parallel output terminal for vertical address data of a predetermined bit is connected to the image range specifying circuit 54v, and the address data output It is connected to the memory 13 via a terminal group 83.

The output end of the H image range designation circuit 54h for determining the horizontal output range of the image data read from the memory 13 is connected to the gate circuit 51 and the scroll instruction circuit 56, respectively.

In addition, (2) the image range specifying circuit 54v is such that the output end of the data defining the vertical output range of the image data read from the memory 13 is connected to the gate circuit 51 and the scroll control circuit 5;
6, respectively.

The scroll instruction circuit 56 includes a reservation mode specification input terminal 93P connected to the operation switch 90, a horizontal direction scroll operation specification input terminal 93h connected to the operation switch 33h, and a vertical direction scroll operation specification input terminal 93P connected to the operation switch 33v. directional scroll operation designation input terminal 93v;
Furthermore, it is connected to the output side of the OR gate 98.

The titler circuit 12 is provided with a registration operation designation input terminal 111 to which the operation switch 31 provided on the device body 30 is connected, and an insertion operation designation input terminal 112 to which the operation switch 32 is connected. ing. In addition, in this titler circuit 12, each switch 77.78
．． 79 is connected between the image signal input terminal 70 and each color signal output terminal 71.about.72.73.

An image data output terminal 62 is externally connected to the image signal input terminal 70, and image data read from the memory 13 is supplied as an image signal. Each switch 77.78.
79 is selectively opened and closed by color designation data given to each color designation input terminal 74, 75, and 76 from a system controller (not shown) in response to the operation of an operation switch 34 provided on the device main body 30. ing.

Furthermore, the titler circuit 12 is provided with a control terminal group 84 for supplying write/read instruction data to the memory 13, as well as an input terminal 85 for a drive power source, a ground terminal 86, and the like.

(C) Operation of titler circuit The titler circuit 12 performs a registration operation of writing image data of a title image into the memory 13 by operating an operation switch 31 provided on the main body 30 of the apparatus. Further, by operating the operation switch 32, an insertion operation is performed in which image data stored in the memory 13 is read out and output as a title image signal.

The titler circuit 12 operates at the terminal 9 when the operation switch 90 for setting the reservation mode is operated, the scroll instruction circuit 56 is set to the reservation mode, and the operation switch 33h or 33v is operated.
The timing signal SR for starting the commit operation from 4 or the timing signal SP for canceling the pause from the terminal 96, for example,
When the timing signal 5 is supplied with a high level (1"), the timing signal 5
A title image signal is inserted into the video signal so that the title image can be scrolled and displayed in synchronization with R1SP.

In addition, this titler circuit 12 converts the title image signal outputted by the insertion operation or scrolling operation into three primary color signals (R.

A color specification operation is performed to specify a color using a combination of G and B).

These operations will be explained in detail below.

(D) Registration operation (Figs. 1, 7, and 8) When the titler circuit 12 accepts the operation of the operation switch 31,
A registration operation is performed to write the image data supplied from the A/D converter 11 into the memory 13.

That is, when a registration operation is designated by operating the operation switch 31 while photographing an image 101 drawn on the panel 100, for example, as shown in FIG. 84 to the memory 13, and the image data of the image 101 that is serially input from the A/D converter 11 via the image data input terminal 61 is converted into parallel data by the shift register 50, and the data input/output terminal group 81 The data is supplied to the memory 13 from

At this time, the H absolute position counter 52h is reset every horizontal scanning period (IH) by a horizontal synchronization signal supplied via a horizontal synchronization input terminal 64h, and is reset by a clock pulse supplied via a clock input terminal 63. is counted to form H absolute position data indicating the absolute position in the horizontal direction and supplied to the H counter control circuit 53h.

■Absolute position counter 52v is vertical synchronization input terminal 64v
■Absolute position that indicates the absolute position in the vertical direction by counting the horizontal synchronization signal supplied through the horizontal synchronization input terminal 64h while resetting every vertical scanning period by the vertical synchronization signal supplied through the horizontal synchronization input terminal 64h. Form the data and V
It is supplied to the counter control circuit 53v. Note that by indicating each scanning period as an absolute position using the absolute position data output from these absolute position counters 52h and 52v,
NTSC encoder 8 from each impose circuit 5, 6.7
It is possible to indicate the effective image range of an image formed by a video signal supplied to the recording unit 20 or the like via the .

Each counter control circuit 53h, 53v controls each address counter 55h, 55v to generate each address data supplied to the memory 13 in accordance with the absolute position data indicating the effective image range, and outputs it from the shift register 50. Among the image data to be displayed, image data in the effective image range is written into the memory 13.

For example, as shown in FIG. 8, the H address counter 55h controls the image of the title image 102 in the effective image range in response to the H absolute position data XO given from 0 to X in one horizontal opening period (IH). Horizontal address data HO, which is given from O to h in the horizontal direction, is given to the data.

Also, the address counter 55v is set for one vertical interval period (
IV) ■ Absolute position data YO given from O to y
Correspondingly, vertical address data VO, which is given from 0 to V in the vertical direction, is given to the image data of the title image 102. Each of these address data HO
, VO are supplied from the address data output terminal group 83 to the address terminals of the memory 13 via the address bus.

Therefore, the image data of the title image 102 output from the shift register 50 is written to the address of the memory 13 specified by the horizontal address data indicated by HO and the vertical address data indicated by VO in FIG. .

Note that it is a hot topic that the guide data for the title image written in the memory 13 may be formed by capturing an image of a landscape, a person's face, etc., in addition to the characters and illustrations drawn on the panel.

(E) Insertion operation (Figs. 1 and 8) When the titler circuit 12 accepts or accepts the operation of the operation switch 32, it reads out the image data written in the memory 13 in the registration operation and outputs it as a title image signal. Performs an insert operation.

That is, when the titler circuit 12 accepts the operation of the operation switch 32, it supplies read instruction data from the control terminal group 84 to the memory 13, and also reads data from the H address counter 55h to the eighth
Give the horizontal address data shown by HO in the figure, and
(2) The image data of the title image 102 stored in the memory 13 is read by giving the vertical address data indicated by VO in the figure from the address counter 55v.

The image data read out from the memory 13 is converted into serial data by a shift register 50 and sent to a gate circuit 5.
1.

At this time, the gate circuit 51 controls the H image range designation circuit 54.
It is in an open state due to the output of the h and V image range specifying circuit 54v, and the image data supplied from the shift register 50 is supplied as is to the image data output terminal 62.

The image data supplied to the image data output terminal 62 is supplied to the image signal input terminal 70, and each switch 77, 78
．． The color is specified by opening/closing 79 and the three primary color signals (R, G,
B), which is supplied as a title image signal from each color signal output terminal 71, 72, 73 via the conversion circuit 15 to each impose circuit 5, 6°7, and converted into a video signal output from the imaging signal processing circuit 4. inserted.

According to this insertion operation, the title image signal formed from the image data of the title image 102 read out from the memory 13 can be inserted into the video signal output from the imaging signal processing circuit 4.

(F) Scroll operation (Figures 1 to 5, Figures 9 to 1)
(FIG. 2) The title scroll operation of the titler circuit 12 is controlled by a scroll instruction circuit 56.

That is, the operation switch 90 for setting the reservation mode is turned on [
For example, the operation switch 33h or the operation switch 33v is turned on [for example, the closed state]
When the recording operation start timing signal S
When either R or the timing signal SP for canceling the pause state is supplied to the scroll instruction circuit 56 via the terminal 108, the timing signal SP for canceling the pause state is supplied to the scroll instruction circuit 56. Scrolling of the title image is started, and image data is read from the memory 13 so that the title image can be scrolled and displayed.

The determination steps performed by the scroll instruction circuit 56 will be described below.

In step 201, it is determined whether the mode is reservation mode. That is, if the reservation mode is set by operating the operation switch 90, the process moves to step 202;
If it is not in reservation mode, it ends.

In step 202, it is determined whether or not a timing signal SR for starting a recording operation has been output, for example, by pressing a recording button (not shown).

If the timing signal SR is detected, the process moves to step 203, where a detection means or a timer (not shown) determines whether or not recording has been made on the magnetic tape. Further, if the timing signal SR is not detected, the process moves to step 205.

In step 203, if the recording operation is started, the process moves to step 204, where the title image is scrolled in the horizontal or vertical direction, as will be described later.

Further, if the recording operation has not been started, the process returns to step 203.

On the other hand, step 205 deals with the case of canceling the pause. That is, as shown in Fig. 5, a VTR with an integrated camera is used as a recycled bag. &115, and this playback device 11
In the case of a system in which a recording device 116 is connected to a magnetic tape 5 and a video signal reproduced by a reproduction device 115 is recorded by the recording device 116, both the reproduction device 115 and the recording device 116 stop the magnetic tape at a specific position. Assume that the object is in a so-called pause state.

A pause release timing signal SP is sent via the terminal 94.
When supplied to the scroll instruction circuit 56, under the control of the scroll instruction circuit 56, the title image signal is added to the video signal played back from the playback device 115 in synchronization with the pause release timing of the playback device 115 and the recording device 116. It is inserted and supplied to the recording device 116 side. and,
A recording device 116 records the video signal and the title image signal. On the other hand, the device that generates this title image signal and scrolls the title image may be either the playback device or the recording device.

In step 205, for example, by pressing a pause release button (not shown), a pause release timing signal S is sent.
A determination is made as to whether P has been output. If the pause release timing signal SP is detected, the pause release timing signal SP is detected.
The process moves to step 206, and ends if the pause release timing signal SP is not detected.

In step 206, a detection means or a timer (not shown) determines whether recording has been made on the magnetic tape. If the recording operation has started, step 2
07, the reproduced title image is scrolled horizontally or vertically as will be described later. When the reproduction title scroll ends, the determination operation also ends. Also,
If the recording operation has not been started, step 206
Return to

In this case, assuming that the operation switch 33h is turned on, the image data stored in the memory 13 is read out in the following manner so that the title image is displayed moving from the right to the left of the screen.

Read instruction data is supplied from the control terminal group 84 to the memory 13, and data for instructing a horizontal scroll operation is supplied from the scroll instruction circuit 56 to the H counter control circuit 53h and the H image range designation circuit 54h.

As a result, the H counter control circuit 53h controls the memory 13
The H address counter 55h is operated so that the horizontal address data supplied to Control. Further, the H image range designation circuit 54h, as shown by hl to hn in FIG.
Only during the period when the image data serving as the title image is read from the memory 13, a signal having a high level (1'') is output, and the gate circuit 51 is kept open only during that period.

At this time, the address counter 55v is 0 as shown in FIG.
As shown in , vertical address data similar to the above-described insertion operation is supplied to the memory 13 .

Therefore, the titleer circuit 1 is read out from the memory 13.
The image data output from 2 as a title image signal becomes a title image that is displayed by scrolling the effective image range from right to left as shown by arrow H3R.

Also, assuming that the operation switch 33v is turned on,
In the following manner, the image data stored in the memory 13 is read out so that the title image is displayed moving upward from the bottom of the screen.

Read instruction data is supplied from the control terminal group 84 to the memory 13, and data for instructing a scroll operation in the horizontal direction is supplied from the scroll instruction circuit 56 to the V counter control circuit 53v and the image range designation circuit 54v.

As a result, the V counter control circuit 53v controls the memory 13
The address counter 55 is configured such that the vertical address data supplied to the address counter 55 changes from the bottom to the top by a predetermined address every one vertical interval (IV), as shown by Vl to Vn in FIG. control. In addition, the image range specifying circuit 54v outputs a signal that remains at the high level (1") only during the period when the image data that becomes the title image is read out from the memory 13, as shown by vl to vn in FIG. , the gate circuit 51 is opened for only that period.

At this time, the H address counter 55h is
As shown at O, horizontal address data similar to the insertion operation described above is supplied to the memory 13.

Therefore, the titleer circuit 1 is read out from the memory 13.
The image data output from 2 as a title image signal becomes a title image that is displayed by scrolling the effective image range from the bottom to the top as shown by the arrow VSR.

Here, a method for controlling the address counters 55h and 55v by the counter control circuits 53h and 53v will be explained using the control of the address counter 55v by the V counter control circuit 53v as an example.

In the above-mentioned insertion operation, the v counter control circuit 53v inputs the address data at the count start point where the address counter 55v outputs address data 0 at a predetermined rate every one vertical interval (lV) as shown in FIG. It is sufficient to preset the address data to be shifted by the value. or,
As shown in FIG. 12, the V counter control circuit 53v
The count start point of the address counter 55v may be shifted by predetermined address data every one vertical interval (1).

Further, the scroll instruction circuit 56 detects the end of the scroll operation based on the output signal of each image range specifying circuit 54h, 54v, and sends the end of the scroll operation to each counter control circuit 53h, 53v and each image range specifying circuit 54h, 54v. instruct.

According to this scrolling operation, the title image formed by the image data read from the memory 13 can be scrolled in synchronization with the recording operation start timing signal or the pause release timing signal. Note that by controlling each counter control circuit 53h, 53v,
By changing the read address data of the image data stored in the memory 13, it is possible to change the scrolling direction and speed of the title image formed from the image data.

Also, in this embodiment, it is explained that a title image that has been recorded in advance is scrolled, but
The present invention is not limited to this, and for example, an image with special effects such as a wipe or a fader may be formed and this may be used as the title image.

In this case, the title image based on the special effect is scrolled at the timing of starting recording or canceling the pause.

Furthermore, the scrolled title image can be scrolled out or stopped at any position within the image.

(G) Color specification operation Note that due to the above-mentioned inserting operation and scrolling operation, the title image signal output from this titler circuit 12 is changed to a three primary color signal (R
, G, B) are specified cyclically. At this time, the electronic viewfinder 40
The specified color will be displayed as text. In addition, the color specification of the title image can also be performed when the insertion operation is specified by operating the operation switch 32, or when the scroll operation is specified by operating the operation switch 33h or 33v. It has become.

(H) Application Example Note that the direction and speed of scrolling the title image using the title image insertion device according to the present invention may have various patterns other than the above-mentioned embodiments. The titler circuit 12 can also be configured to supply the image data supplied from the A/D converter 11 to the memory 13 as serial data. Furthermore, in the embodiment described above, the present invention is applied to a camera-integrated VTR with a built-in title image insertion device, but for example, an image of an input video signal supplied from a playback VTR or the like may be stored in a memory, The present invention can also be applied to a title image insertion device used in a stationary titler, captioner, etc., which forms a title image signal from data and inserts it into an input video signal.

〔Effect of the invention〕

According to the title image insertion device according to the invention of claim (1), since title scrolling is automatically started in synchronization with the timing of the start of recording operation, the operability when performing title scrolling is greatly improved. It has the effect of being able to

According to the title image insertion device according to the invention of claim (2), the title image signal is inserted into the video signal played back by the playback device at a certain timing, and the title image signal and the video signal are inserted into the video signal played back by the playback device. If the playback device and recording device that are paused are in a standby state, title scrolling will automatically start in synchronization with the timing when the standby state is released. This has the effect of greatly improving the operability when scrolling titles.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of the titler circuit of the camera-integrated VTR to which the present invention is applied, FIG. 2 is a diagram showing the switch section and terminal section of the titler circuit, and FIG. Block diagram showing the circuit configuration,
Fig. 4 is a flowchart explaining the operation of title scroll in reservation mode or when canceling the pause, Fig. 5 is a diagram showing the state in which the playback device and the recording device are connected and the title image signal is inserted into the playback signal, and Fig. 6 is a perspective view of the exterior of the camera-integrated VTR, FIG. 7 is a schematic diagram showing title images stored in the memory by the registration operation of the titler circuit, and FIG. 8 explains the registration and insertion operations of the titler circuit. FIG. 9 is a schematic diagram for explaining the horizontal scrolling operation of the titler circuit, FIG. 10 is a schematic diagram for explaining the vertical scrolling operation of the titler circuit, and FIG. 11 is a schematic diagram for explaining the vertical scrolling operation of the titler circuit. 12 is a schematic diagram for explaining the operation of the counter control circuit constituting the titler circuit, and FIG. 12 is a schematic diagram for explaining another operation of the counter control circuit constituting the titler circuit. 56: Scroll instruction circuit, 91: Switch section, 92: Terminal section, 93P, 93h, 93v: Designated input terminal, 98 NOR gate, 115: Playback device, 116: Recording device, SR, SP: Timing signal.

Claims (2)

[Claims] (1) A title image insertion device for inserting and recording a title image signal into a video signal is provided with means for synchronizing the timing of the start of insertion of the title image signal into the video signal and the timing of the start of recording operation. A title image insertion device characterized by. (2) In a title image insertion device that inserts a title image signal into a video signal played by a playback device and recorded by a recording device, when the playback device and the recording device are in a standby state,
A title image insertion device characterized by comprising means for synchronizing the timing at which the standby state is canceled and the timing at which insertion of the title image signal into a video signal is started.