JPH04113637A - Semiconductor package - Google Patents

Abstract

PURPOSE:To enable a chip carrier to be incorporated in a case simply and with a high accuracy, by determining the position of the chip carrier in the case through an arresting means, and by configuring the arresting means with an arresting member and the arresting part whose shape is opposed to the one of the arresting member. CONSTITUTION:A first arresting means comprises pins 11, 12 far positioning, which are provided on a case 1, and pinholes 13, 14, which are formed on a chip carrier 2, and are opposed to the pins 11, 12 respectively. A second arresting means comprises the pin 11 for positioning and the pinhole 14, which are provided on the chip carrier 2, and the pin 12 for positioning and the pinhole 13, which are provided on the case 1. According to this configuration, the sense of the direction of the chip carrier 2 is brought into a fixed one. A third arresting means comprises a protruding part 15, which is provided on the bottom part of the chip carrier 2 and whose plan view is a trapezoid, and a recessed part 16 opposed to the part 15, which is formed on the case 1. In this configuration, the sense of the direction of the chip carrier 2 is fixed, too.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to semiconductor packages. More specifically, L
The present invention relates to a semiconductor package in which a chip carrier on which a semiconductor chip such as an SI chip is mounted is fixed.

BACKGROUND OF THE INVENTION With the diversification of electronic devices, various semiconductor packages are being used. When a plurality of semiconductor chips are assembled into one semiconductor package, the semiconductor chips are mounted in advance on a substrate called a chip carrier, and this chip carrier is fixed to the semiconductor package.

FIG. 3 shows a schematic diagram of a conventional semiconductor package. In FIG. 3, the semiconductor package includes a chip carrier 2 on which a semiconductor chip 5 is mounted, and a chip carrier 2 inside.
The device includes a casing 1 to which the casing 1 is fixed, and a plurality of lead electrodes 3 penetrating the body of the casing 1 through side walls. The chip carrier 2 is fixed at a predetermined position on the bottom of the housing 1 with solder or the like. Thereafter, each electrode of the semiconductor chip 5 mounted on the chip carrier 2 and the lead electrode 3 are connected with bonding wires (not shown).

Problems to be Solved by the Invention The casing of a conventional semiconductor package that includes a chip carrier on which a semiconductor chip is mounted has a simple hollow box shape, and the chip carrier is simply placed on the bottom of the casing. It was glued. The mounting position of the chip carrier must be determined accurately. If the position of the chip carrier is not accurate, the distance between the electrodes of the semiconductor chip and the corresponding lead electrodes will not be constant, resulting in poor wiring or a longer wiring process. In the case of a mounted chip carrier, if the positioning is not performed accurately when mounting it on a semiconductor package, the optical coupling efficiency between the optical element and external optical equipment will decrease.

Conventionally, therefore, the chip carrier was fixed by accurately measuring the relative position of the chip carrier and the semiconductor package, but this method was extremely time-consuming and inefficient.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor package in which a chip carrier that solves the problems of the prior art described above can be easily and accurately assembled.

Means for Solving the Problems According to the present invention, there is provided a chip carrier on which a semiconductor chip is mounted, a hollow casing portion in which the chip carrier is fixed, an external device, and a semiconductor mounted on the chip carrier. In a semiconductor package comprising an electrode for electrically connecting a chip, the position of the chip carrier within the housing is determined by a locking means, and the locking means connects the chip carrier and the housing. A semiconductor package is provided, comprising a locking member complementary to each other and a locking portion having a shape corresponding to the locking member.

Function: In the semiconductor package of the present invention, the position of the chip carrier within the housing is determined by a locking means composed of, for example, a pin and a pin hole.

Therefore, it is possible to accurately and easily incorporate a chip carrier into the semiconductor package of the present invention.

In the semiconductor package of the present invention, it is preferable that the above-mentioned locking means is configured to determine the direction of the chip carrier in a fixed direction. Examples of such locking means include one composed of a plurality of pins and pin holes of different thicknesses, and one composed of a projection having a trapezoidal planar shape and a corresponding recess. Furthermore, even if the chip carrier is composed of a plurality of pins and pin holes of the same diameter, if both the chip carrier and the housing are configured to have at least one pin, the direction of the chip carrier can be uniquely determined. can be determined.

EXAMPLES Hereinafter, the present invention will be explained in more detail with reference to Examples, but the following disclosure is merely an example of the present invention and does not limit the technical scope of the present invention in any way.

Example FIG. 1 shows a schematic diagram of a semiconductor package of the present invention.

The semiconductor package shown in FIG. 1, like the conventional semiconductor package shown in FIG. It includes a plurality of lead electrodes 3 penetrating the side wall of the body part 1. Positioning pins 11 and 12 are provided on the lower surface of the chip carrier 2, and pin holes 13 and 14 corresponding to the positioning pins 11 and 12, respectively, are formed in the portion of the housing 1 to which the chip carrier 2 is attached. .

In the semiconductor package of the present invention, during assembly,
By simply inserting the positioning pins 11 and 12 of the chip carrier 2 into the pin holes 13 and 14, the chip carrier 2
The position of is determined accurately.

FIGS. 2(a) to 2(C) illustrate the locking means of the semiconductor package of the present invention. The locking means in FIG. 2(a) is a positioning pin 11' provided on the housing 1, contrary to the case in FIG.
J6 and 12, and the pin holes 13 formed in the chip carrier 2 and corresponding to the positioning pins 11 and 12, respectively.
and 14.

The locking means shown in FIGS. 2 and 3 is composed of a positioning pin 11 and a pin hole 14 provided on the chip carrier 2, and a positioning pin 12 and a pin hole 13 provided on the casing. According to this configuration, the orientation of the chip carrier 2 is constant.

The locking means in FIG. 2(C) is composed of a projection 15 with a trapezoidal planar shape provided on the bottom of the chip carrier 2, and a recess 16 corresponding to the projection 15 formed on the housing 1. .

Even in this configuration, the direction of the chip carrier 2 remains constant.

As described in detail, according to the present invention, the position of the chip carrier can be accurately determined without performing positioning when the chip carrier is assembled into a semiconductor package. Therefore, the assembly process can be simplified and production efficiency can be increased.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of a semiconductor package of the present invention, FIGS. 2(a) to (C) are schematic diagrams illustrating the locking means of a semiconductor package of the present invention, and FIG. 3 is a schematic diagram of a semiconductor package of the present invention. ,
FIG. 1 is a schematic diagram of a conventional semiconductor package. [Main reference numbers] 1... Semiconductor package, 2... Chip carrier, 3... Lead electrode, 11.12... Positioning pin, 13.14... Pin hole

Claims (1)

[Claims] The chip carrier includes a chip carrier on which a semiconductor chip is mounted, a hollow housing portion in which the chip carrier is fixed, and an electrode that electrically connects an external device and the semiconductor chip mounted on the chip carrier. In the semiconductor package, the position of the chip carrier within the housing is determined by a locking means, and the locking means includes a locking member and a locking member that are complementary to each other on the chip carrier and the housing. A semiconductor package comprising a locking portion having a shape corresponding to a locking member.