JPH04113615A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH04113615A
JPH04113615A JP23354590A JP23354590A JPH04113615A JP H04113615 A JPH04113615 A JP H04113615A JP 23354590 A JP23354590 A JP 23354590A JP 23354590 A JP23354590 A JP 23354590A JP H04113615 A JPH04113615 A JP H04113615A
Authority
JP
Japan
Prior art keywords
thin film
reaction chamber
dust
semiconductor substrate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23354590A
Other languages
Japanese (ja)
Inventor
Kiyoo Fujinaga
藤永 清雄
Kazuhiro Obuse
小伏 和宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP23354590A priority Critical patent/JPH04113615A/en
Publication of JPH04113615A publication Critical patent/JPH04113615A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To reduce dust particles which adhere to a semiconductor substrate and to restrain that the functional defect of a semiconductor device occurs frequently by providing the following: a process to deposit a first thin film on the inner wall surface of a reaction chamber in a manufacturing apparatus; and a process to insert the semiconductor substrate in the reaction chamber on which the first thin film has been deposited and to deposit a second thin film on the substrate. CONSTITUTION:A valve 4 is closed and valves 10, 11 are opened. In this state, the inside of a reaction chamber 1 is evacuated down to 5X10<-3>mbar by using a vacuum pump 5. Then, the number of dust particles immediately after this evacuation operation has been started is counted. When the number of dust particles is less than 100, it is not required to deposit a first thin film 7. When the number is more than 100 pieces, the first thin film 7 is deposited in a state that the valve 4 is opened and that the valves 10, 11 are closed, and the inside of the reaction chamber 1 is purged by using nitrogen gas and is returned to atmospheric pressure. When the number is less than 100 pieces, a semiconductor substrate 6 is inserted in the reaction chamber 1, a second thin film is deposited in the state that the valve 4 is opened and that the valves 10, 11 are closed, the inside of the reaction chamber 1 is purged by using nitorogen gas and is returned to atmospheric pressure. The inside of the reaction chamber 1 is evacuated by using the vacuum pump 5 in the state that the valve 4 is closed and that the valves 10, 11 are opened.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は基板上に付着する塵埃を低減する半導体装置の
製造方法に関するものであム 従来の技術 近鍛 半導体基板上の配線寸法の微細化が進み塵埃の歩
留への影響が以前に増して叫ばれている。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a semiconductor device that reduces dust adhering to a substrate. The impact of dust on yields is being talked about more than ever.

また 製造環境の放像 クリーンルームの無人化により
半導体製造装置からの塵埃が問題となってきていも 従来 半導体製造装置からの塵埃の低減は 半導体基板
搬送系の最適化 材料ガス供給系部品の高性能化及びメ
ンテナンス技術の向上等機械的要因の改善によりなされ
てき九 塵埃発生に1よ プロセス要因もあり以下第4
図を参照しながら半導体装置の製造方法について説明す
も 第4図E  従来の半導体装置の製造方法を示す図であ
も 反応室1に材料ガス2導入部と、排気部3が設けて
あり、排気部3はバルブ4、真空ボンブ5から構成され
ている。また 半導体基板6を反応管1内に挿入し 薄
膜を堆積させる。
In addition, although dust from semiconductor manufacturing equipment has become a problem due to unmanned clean rooms, conventional techniques for reducing dust from semiconductor manufacturing equipment include optimizing the semiconductor substrate transport system and improving the performance of material gas supply system components. Improvements have been made in mechanical factors such as improvements in maintenance technology and improvements in dust generation.
The method for manufacturing a semiconductor device will be explained with reference to the figures. FIG. The exhaust section 3 is composed of a valve 4 and a vacuum bomb 5. Further, a semiconductor substrate 6 is inserted into the reaction tube 1, and a thin film is deposited.

従来の堆積方法は 反応室lを真空ポンプ5でバルブ4
を通して排気すム 次に 材料ガス2を導入し 反応室
1内壁に第1の薄膜7を塵埃が落ちなくなる膜厚まで数
回に分けて堆積させる。その後、反応室1内に半導体基
板6を挿入し 材料ガス2を導入することで第2の薄膜
8を堆積す4第2の薄膜8の累積膜厚が剥がれ落ちるよ
うになると第2の薄膜8の堆積を終了すム また 第1
の薄膜7を堆積させず凶 反応室1内に半導体基板6を
挿入し 材料ガス2を導入することで第2の薄膜8を堆
積する方法もある。
In the conventional deposition method, the reaction chamber 1 is connected to the valve 4 using a vacuum pump 5.
Next, the material gas 2 is introduced and the first thin film 7 is deposited on the inner wall of the reaction chamber 1 in several batches to a thickness that prevents dust from falling off. After that, the semiconductor substrate 6 is inserted into the reaction chamber 1 and the material gas 2 is introduced to deposit the second thin film 8.4 When the cumulative thickness of the second thin film 8 starts to peel off, the second thin film 8 Finishing the deposition of the first
There is also a method of depositing the second thin film 8 by inserting the semiconductor substrate 6 into the reaction chamber 1 and introducing the material gas 2 without depositing the second thin film 7.

発明が解決しようとする課題 従来の薄膜堆積方法で(よ 反応室1内壁に第1の薄膜
7を塵埃が落ちなくなるまで数回に分けて堆積させる爪
 その累積膜厚i′!、、経験に基づくものであa そ
のた八 堆積不充分となり、反応室1内壁面に付着して
いる塵埃9力丈 材料ガス導入により、反応室1内壁面
から剥がれ落ち半導体基板6上に付着し 半導体装置の
機能の欠損の原因となることもある。また 第1の薄膜
7を堆積させずに 反応室l内に半導体基板6を挿入し
 材料ガス2を導入することで第2の薄膜8を堆積する
方法(よ 反応室1内壁面に付着している塵埃9が反応
室1内壁面から剥がれ落ち半導体基板6上に付着する数
を前記方法よりも多くすることになも 半導体基板6に第2の薄膜8を数回に分けて堆積L−膜
厚が厚くなると第2の薄膜s自体が剥がれ落ち半導体装
置の機能の欠損の原因とな4 このように従来の方法だ
と第1の薄膜7、第2の薄膜8の累積膜厚は経験に基づ
いて決めた値で、その取り方によって塵埃9が多く付着
し半導体装置の機能の欠損が多発することになム 本発明は 上記課題を解決するもので、半導体基板6上
に付着する塵埃を低減し半導体装置の機能の欠陥の多発
を抑える半導体装置の製造方法を提供することを目的と
する。
Problems to be Solved by the Invention In the conventional thin film deposition method, the first thin film 7 is deposited on the inner wall of the reaction chamber 1 in several batches until no more dust falls off. Due to insufficient deposition, dust 9 adheres to the inner wall surface of the reaction chamber 1. Due to the introduction of the material gas, it peels off from the inner wall surface of the reaction chamber 1 and adheres to the semiconductor substrate 6, resulting in the formation of semiconductor devices. This may cause loss of functionality.Also, there is a method of depositing the second thin film 8 by inserting the semiconductor substrate 6 into the reaction chamber l and introducing the material gas 2 without depositing the first thin film 7. (The second thin film is applied to the semiconductor substrate 6 to increase the number of dust particles 9 attached to the inner wall surface of the reaction chamber 1 that peel off from the inner wall surface of the reaction chamber 1 and adhere to the semiconductor substrate 6 than in the above method.) 8 is deposited several times. When the film thickness increases, the second thin film s itself peels off, causing loss of functionality of the semiconductor device. 4 In this way, in the conventional method, the first thin film 7, the The cumulative thickness of the thin film 8 in 2 is a value determined based on experience, and depending on how it is taken, a large amount of dust 9 may adhere to it, resulting in frequent loss of functionality of the semiconductor device.The present invention solves the above problems. It is an object of the present invention to provide a method for manufacturing a semiconductor device that reduces dust adhering to a semiconductor substrate 6 and suppresses frequent occurrence of functional defects in the semiconductor device.

課題を解決するための手段 本発明は 前記課題を解決するするため番へ  半導体
装置の製造装置の反応室内壁面に第1の薄膜を堆積させ
る工程と、半導体基板を前記第1の薄膜を堆積させた反
応室内に挿入し 前記半導体基板に第2の薄膜を堆積す
る工程を有する半導体装置の製造方法を提供すも 作用 本発明は 塵埃計数を行ないながぺ 半導体装置の製造
装置の反応室内墾を膜で覆うことにより、必要最小限の
膜で大きな塵埃閉じ込め効果を発揮でき、半導体に付着
する塵埃を大幅に低減でき、塵埃付着による半導体装置
の機能欠損を防止でき、高性能な半導体装置の製造歩留
を向上することができた 実施例 以下本発明を減圧CVD装置を用いた実施例について、
第1は 第2@ 第3図を参照しながら詳細に説明すも 第1図は 減圧CVD装置であり、反応室1と材料ガス
2導入部及び排気部3とからなり、排気部3は バルブ
4もしくはバルブ10、塵埃計数器12、バルブ11を
経て真空ポンプ5へ繋がっていも 半導体基板6にL 
反応室1内に挿入する。以下、その装置の動作について
第2図の流れに沿って説明すも (1)バルブ4人 バルブ10、11間の状態で反応室
1内を真空ポンプ5で5x 10−3mbarまで排気
する[第2図(1)]。
Means for Solving the Problems The present invention is directed to solving the above problems.The present invention includes a step of depositing a first thin film on a wall surface of a reaction chamber of a semiconductor device manufacturing apparatus, and a step of depositing the first thin film on a semiconductor substrate. The present invention also provides a method for manufacturing a semiconductor device, which comprises inserting the semiconductor device into a reaction chamber and depositing a second thin film on the semiconductor substrate. By covering with a film, it is possible to achieve a large dust trapping effect with the minimum necessary film, significantly reducing dust adhering to semiconductors, and preventing loss of functionality of semiconductor devices due to dust adhesion, making it possible to manufacture high-performance semiconductor devices. Examples in which the yield could be improved Below are examples in which the present invention was applied using a low-pressure CVD apparatus.
The first will be explained in detail with reference to Fig. 2 and Fig. 3. Fig. 1 is a reduced pressure CVD apparatus, which consists of a reaction chamber 1, a material gas 2 introduction part, and an exhaust part 3, and the exhaust part 3 is a valve. 4 or connected to the vacuum pump 5 via the valve 10, dust counter 12, and valve 11.L to the semiconductor substrate 6
Insert into reaction chamber 1. Hereinafter, the operation of the apparatus will be explained along the flow shown in Figure 2. Figure 2 (1)].

(2)次いで、排気開始直後の塵埃数を塵埃計数器で計
数する[第2図(2)コ。
(2) Next, the number of dust immediately after the start of exhaust is counted with a dust counter [see Fig. 2 (2).

ここで、塵埃数の判定値について第3図を参照しながら
説明すも 第3図は 反応室1内壁の累積膜厚と塵埃計
数器12で計数した塵埃数の関係を表していa 第1の
薄膜7、第2の薄膜8共に5i02膜で反応室内の温度
(↓ 812℃とすム 累積膜厚が薄いと塵埃の数が多
く、厚すぎても多1.%  塵埃数100個以下の条件
で半導体基板6を処理することにした 累積膜厚力丈 
3μmから10μmの間で堆積すればよl、% (3)計数した塵埃数が100個より少ない場合(判定
値Aより少ない)(ヨ  第1の薄膜7の堆積の必要は
なく (6)へ 多い場合U(4)の工程へ進む[第2
図(3)]。
Here, the judgment value for the number of dust particles will be explained with reference to Fig. 3. Fig. 3 shows the relationship between the cumulative film thickness on the inner wall of the reaction chamber 1 and the number of dust particles counted by the dust counter 12. Thin film 7 and second thin film 8 are both 5i02 films and the temperature inside the reaction chamber is ↓ 812°C. If the cumulative film thickness is thin, there will be a large number of dust particles, and if it is too thick, the number of dust particles will be 1.% or less. Cumulative film thickness
(3) If the number of counted dust particles is less than 100 (less than the judgment value A), there is no need to deposit the first thin film 7, and go to (6). If there are many, proceed to step U(4) [Second
Figure (3)].

〈多い場合〉 (4)バルブ4阻 バルブlO111閉の状態で第1の
薄膜7を堆積する[第2図(4)コ。
<If there are many cases> (4) Valve 4 closed The first thin film 7 is deposited with the valve lO111 closed [see FIG. 2 (4).

(5)反応室l内を窒素ガスでパージし大気圧に戻しく
1)へ戻る[第2図(5)]。
(5) Return to step 1) of purging the inside of the reaction chamber 1 with nitrogen gas and returning it to atmospheric pressure [Figure 2 (5)].

〈少ない場合〉 (6)反応室1内に半導体基板6を挿入する[第2図(
6)コ。
<If the quantity is small> (6) Insert the semiconductor substrate 6 into the reaction chamber 1 [see Fig. 2 (
6) Ko.

(7)バルブ4皿 バルブ10、11閉の状態で、第2
の薄膜8を堆積する[第2図(7)]。
(7) 4 valves When valves 10 and 11 are closed, the second
A thin film 8 is deposited [FIG. 2 (7)].

(8)反応室1内を窒素ガスでパージし大気圧に戻す[
第2図(8)]。1 (9)バルブ4人 バルブ10、11開の状態で反応室
1内を真空ポンプ5で排気する[第2図(9)コ。
(8) Purge the inside of reaction chamber 1 with nitrogen gas and return to atmospheric pressure [
Figure 2 (8)]. 1 (9) 4 valves With valves 10 and 11 open, the inside of the reaction chamber 1 is evacuated using the vacuum pump 5 [see Figure 2 (9).

(10)排気直後の塵埃数を塵埃計数器12で計数する
[第2図(10)]。
(10) The number of dust immediately after exhaust is counted by the dust counter 12 [FIG. 2 (10)].

(11)計数した塵埃数が判定値Bより少ない場合(6
)へ 多い場合!1(12)の工程へ進む[第2図(1
1)]。
(11) If the counted number of dust particles is less than the judgment value B (6
) to many cases! Proceed to step 1 (12) [Figure 2 (1)
1)].

(12)反応室1内を窒素ガスでパージし大気圧に戻す
[第2図(12)]。
(12) Purge the inside of the reaction chamber 1 with nitrogen gas and return it to atmospheric pressure [Figure 2 (12)].

このように本発明の実施例の製造方法によれば第1図に
示すように第1の薄膜が完全に反応室1の内壁のダスト
を覆い材料ガス導入により、半導体基板6上に飛来する
ことがなくなる。また 第2の薄膜8自体の剥がれL 
半導体基板6に第2の薄膜8を堆積させる前にわかる。
As described above, according to the manufacturing method of the embodiment of the present invention, as shown in FIG. 1, the first thin film completely covers the dust on the inner wall of the reaction chamber 1, and when the material gas is introduced, the dust can fly onto the semiconductor substrate 6. disappears. Also, peeling L of the second thin film 8 itself
This is known before depositing the second thin film 8 on the semiconductor substrate 6.

その結果として、歩留の向上を達成することができもな
耘 半導体製造装置として本実施例では 減圧CvD装
置を用いた力丈 他の気相成長装置 赤外吸収装置等反
応室内壁に薄膜が堆積する装置であればよ(t また 
第1の薄膜7と第2の薄膜8(よ本実施例では同種であ
った力(異種であってもよ(℃ 発明の効果 本発明(よ 塵埃計数を行ないなが収 半導体装置の製
造装置の反応室内壁を膜で覆うことにより、必要最小限
の膜で大きな塵埃閉じ込め効果を発揮でき、半導体に付
着する塵埃を大幅に低減でき、塵埃付着による半導体装
置の機能欠損を防止でき、高性能な半導体装置の製造歩
留を向上することができた
As a result, it is not possible to achieve an improvement in yield. As long as it is a deposition device (t or
The force between the first thin film 7 and the second thin film 8 (in this embodiment, the force was of the same type (although it may be different) By covering the walls of the reaction chamber with a film, it is possible to achieve a large dust trapping effect with the minimum necessary film, significantly reducing dust adhering to semiconductors, preventing functional loss of semiconductor devices due to dust adhesion, and achieving high performance. We were able to improve the manufacturing yield of semiconductor devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図1よ 本発明の実施例に用いた半導体装置の製造
装置の概略図 第2図C友  本発明の実施例を示す半
導体装置の製造方法のフローチャート、第3図は 反応
室内壁の累積膜厚と塵埃計数器により測定した塵埃数と
の関係を示したグラフ、第4図(よ 従来の半導体装置
の製造装置の概略図であム ト・・反応室 2・・・材料導入 3・・・排気孔 4
、10、11、   ・パルス 5・真空ポンプ、  
 6・・・半導体基板、 7・・第1の薄WL 8・・
・第2の薄膜 9・・・塵埃12・・・塵埃計数器 代理人の氏名 弁理士 小鍜治 明 ほか2名第1図 第 図 第 図 粟項臘厚(μ犠2
FIG. 1 is a schematic diagram of a semiconductor device manufacturing apparatus used in an embodiment of the present invention. FIG. 2 is a flowchart of a semiconductor device manufacturing method showing an embodiment of the present invention. FIG. Figure 4 is a graph showing the relationship between film thickness and the number of dust particles measured by a dust counter.・Exhaust hole 4
, 10, 11, ・Pulse 5・Vacuum pump,
6... Semiconductor substrate, 7... First thin WL 8...
・Second thin film 9...Dust 12...Dust counter agent's name Patent attorney Akira Okaji and two others Figure 1 Figure Figure 2

Claims (2)

【特許請求の範囲】[Claims] (1)半導体装置の製造装置の反応室内壁に第1の薄膜
を堆積させる工程と、半導体基板を前記第1の薄膜を堆
積させた反応室内に挿入し、前記半導体基板に第2の薄
膜を堆積する工程を有する半導体装置の製造方法
(1) A step of depositing a first thin film on the wall of a reaction chamber of a semiconductor device manufacturing apparatus, inserting a semiconductor substrate into the reaction chamber in which the first thin film has been deposited, and depositing a second thin film on the semiconductor substrate. Method for manufacturing a semiconductor device including a step of depositing
(2)第1の薄膜を堆積させる工程において、反応室内
に存在する塵埃を計数し、前記塵埃があらかじめ設定さ
れた判定値よりも少ないとき第1の薄膜の堆積を終了す
ることを特徴とする特許請求の範囲第1項記載の半導体
装置の製造方法(3)半導体装置を第1の薄膜を堆積さ
せた反応管内に挿入し前記半導体装置に第2の薄膜を堆
積する工程において、反応室内に存在する塵埃を計数し
、前記塵埃があらかじめ設定された判定値より少ない時
、繰り返し第2の薄膜を堆積する工程を行なうことを特
徴とする特許請求の範囲第1項または第2項記載の半導
体装置の製造方法。
(2) In the step of depositing the first thin film, the amount of dust present in the reaction chamber is counted, and when the amount of dust is less than a preset determination value, the deposition of the first thin film is terminated. A method for manufacturing a semiconductor device according to claim 1 (3) In the step of inserting a semiconductor device into a reaction tube in which a first thin film has been deposited and depositing a second thin film on the semiconductor device, in the reaction chamber. The semiconductor according to claim 1 or 2, characterized in that the step of counting the amount of dust present and repeatedly depositing the second thin film when the amount of dust is less than a preset determination value is performed. Method of manufacturing the device.
JP23354590A 1990-09-03 1990-09-03 Manufacture of semiconductor device Pending JPH04113615A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23354590A JPH04113615A (en) 1990-09-03 1990-09-03 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23354590A JPH04113615A (en) 1990-09-03 1990-09-03 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH04113615A true JPH04113615A (en) 1992-04-15

Family

ID=16956740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23354590A Pending JPH04113615A (en) 1990-09-03 1990-09-03 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH04113615A (en)

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US7797984B2 (en) 2004-03-29 2010-09-21 Tokyo Electron Limited Vacuum apparatus including a particle monitoring unit, particle monitoring method and program, and window member for use in the particle monitoring
CN102994979A (en) * 2011-09-09 2013-03-27 台湾积体电路制造股份有限公司 Chamber conditioning method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005317900A (en) * 2004-03-29 2005-11-10 Tokyo Electron Ltd Vacuum equipment, its particle monitoring method, program and particle monitoring window member
US7797984B2 (en) 2004-03-29 2010-09-21 Tokyo Electron Limited Vacuum apparatus including a particle monitoring unit, particle monitoring method and program, and window member for use in the particle monitoring
US7883779B2 (en) 2004-03-29 2011-02-08 Tokyo Electron Limited Vacuum apparatus including a particle monitoring unit, particle monitoring method and program, and window member for use in the particle monitoring
US8854625B2 (en) 2004-03-29 2014-10-07 Tokyo Electron Limited Vacuum apparatus including a particle monitoring unit, particle monitoring method and program, and window member for use in the particle monitoring
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