JPH04109541U - Package cage for storing semiconductor elements - Google Patents
Package cage for storing semiconductor elementsInfo
- Publication number
- JPH04109541U JPH04109541U JP2074091U JP2074091U JPH04109541U JP H04109541 U JPH04109541 U JP H04109541U JP 2074091 U JP2074091 U JP 2074091U JP 2074091 U JP2074091 U JP 2074091U JP H04109541 U JPH04109541 U JP H04109541U
- Authority
- JP
- Japan
- Prior art keywords
- lid
- melting point
- semiconductor element
- package
- point glass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 54
- 239000011521 glass Substances 0.000 claims abstract description 47
- 238000002844 melting Methods 0.000 claims abstract description 41
- 230000008018 melting Effects 0.000 claims abstract description 40
- 239000007769 metal material Substances 0.000 claims abstract description 17
- 238000003466 welding Methods 0.000 claims description 2
- 239000000758 substrate Substances 0.000 description 20
- 238000007789 sealing Methods 0.000 description 19
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 238000003860 storage Methods 0.000 description 8
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 7
- 239000000919 ceramic Substances 0.000 description 7
- 229910000833 kovar Inorganic materials 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- JKWMSGQKBLHBQQ-UHFFFAOYSA-N diboron trioxide Chemical compound O=BOB=O JKWMSGQKBLHBQQ-UHFFFAOYSA-N 0.000 description 3
- 239000012777 electrically insulating material Substances 0.000 description 3
- 230000010365 information processing Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- YEXPOXQUZXUXJW-UHFFFAOYSA-N oxolead Chemical compound [Pb]=O YEXPOXQUZXUXJW-UHFFFAOYSA-N 0.000 description 3
- ODINCKMPIJJUCX-UHFFFAOYSA-N Calcium oxide Chemical compound [Ca]=O ODINCKMPIJJUCX-UHFFFAOYSA-N 0.000 description 2
- 229910017709 Ni Co Inorganic materials 0.000 description 2
- 229910003267 Ni-Co Inorganic materials 0.000 description 2
- 229910003262 Ni‐Co Inorganic materials 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000005304 joining Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N Magnesium oxide Chemical compound [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- QVQLCTNNEUAWMS-UHFFFAOYSA-N barium oxide Chemical compound [Ba]=O QVQLCTNNEUAWMS-UHFFFAOYSA-N 0.000 description 1
- 229910052810 boron oxide Inorganic materials 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910000464 lead oxide Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Abstract
(57)【要約】
【目的】内部に収容する半導体素子を長期間にわたり正
常、且つ安定に作動させることができる薄型の半導体素
子収納用パッケージを提供することにある。
【構成】パッケージの蓋体2 を表面が高融点ガラス2bで
被覆された金属材2aで形成した。パッケージの全体厚み
を薄型化するために蓋体2の厚みを薄くしても蓋体2 の
機械的強度を高いものに維持でき、その結果、蓋体2 の
破損を極小として絶縁基体1 と蓋体2 とから成る容器の
気密封止を完全となし、内部に収容する半導体素子3 の
作動を長期間にわたり正常、且つ安定なものとなすこと
ができる
(57) [Summary] [Objective] The object is to provide a thin package for storing semiconductor elements that allows the semiconductor elements housed inside to operate normally and stably for a long period of time. [Structure] The lid 2 of the package is made of a metal material 2a whose surface is coated with high melting point glass 2b. Even if the thickness of the lid 2 is made thinner in order to reduce the overall thickness of the package, the mechanical strength of the lid 2 can be maintained at a high level. The container consisting of the body 2 can be completely hermetically sealed, and the semiconductor element 3 housed inside can operate normally and stably for a long period of time.
Description
【０００１】0001
本考案は半導体素子を収容するため半導体素子収納用パッケージの改良に関す るものである。 This invention relates to the improvement of semiconductor device storage packages to accommodate semiconductor devices. It is something that
【０００２】0002
従来、半導体素子、特に半導体集積回路素子を収容するためのパッケージは図 ２に示すように、アルミナセラミックス等の電気絶縁材料から成り、中央部に半 導体素子を収容する空所を形成するための凹部を有し、上面に封止用の低融点ガ ラス層12が被着された絶縁基体11と、同じくアルミナセラミックス等の電気絶縁 材料から成り、中央部に半導体素子を収容する空所を形成するための凹部を有し 、下面に封止用の低融点ガラス層14が被着させた蓋体13と、内部に収容する半導 体素子15を外部の電気回路に電気的に接続するための外部リード端子16とから構 成されており、絶縁基体11の上面に外部リード端子16を載置させるととも予め被 着させておいた封止用の低融点ガラス層12を溶融させることによって外部リード 端子16を絶縁基体11に仮止めし、次に前記絶縁基体11の凹部に半導体素子15を取 着するとともに該半導体素子15の各電極（入出力電極）をボンディングワイヤ17 を介して外部リード端子16に接続し、しかる後、絶縁基体11と蓋体13とをその相 対向する各々の主面に被着させておいた封止用の低融点ガラス層12、14を溶融一 体化させ、絶縁基体11と蓋体13とから成る容器を気密に封止することによって製 品としての半導体装置となる。 Conventionally, packages for accommodating semiconductor devices, especially semiconductor integrated circuit devices, are As shown in Figure 2, it is made of an electrically insulating material such as alumina ceramics, and has a semicircular structure in the center. It has a recess to form a cavity for accommodating the conductor element, and a low melting point glass for sealing is provided on the top surface. An insulating substrate 11 on which a lath layer 12 is adhered, and an electrically insulating substrate made of alumina ceramics, etc. material, and has a recess in the center to form a cavity for accommodating the semiconductor element. , a lid body 13 with a low melting point glass layer 14 for sealing on the bottom surface, and a semiconductor housed inside. It consists of an external lead terminal 16 for electrically connecting the body element 15 to an external electric circuit. The external lead terminals 16 are placed on the top surface of the insulating base 11 and are covered in advance. External leads are formed by melting the low melting point glass layer 12 for sealing. The terminal 16 is temporarily fixed to the insulating base 11, and then the semiconductor element 15 is placed in the recess of the insulating base 11. At the same time, each electrode (input/output electrode) of the semiconductor element 15 is connected to the bonding wire 17. and then connect the insulating base 11 and the lid 13 to the external lead terminal 16 through the The low melting point glass layers 12 and 14 for sealing, which have been applied to each of the opposing main surfaces, are melted together. The container made of the insulating base 11 and the lid 13 is hermetically sealed. It becomes a semiconductor device as a product.
【０００３】0003
しかしながら、近時、ＩＣカード等、情報処理装置は薄型化が急激に進み、該 情報処理装置に搭載される半導体装置もその厚みを薄くしたものが要求されるよ うになり、同時に半導体装置を構成する半導体素子収納用パッケージもその蓋体 の厚みを0.2mm 程度としてパッケージ全体の厚みを薄型化することが要求される ようになってきた。 However, in recent years, information processing devices such as IC cards have become rapidly thinner, and Semiconductor devices installed in information processing equipment will also be required to be thinner. At the same time, the package for storing semiconductor elements that constitutes the semiconductor device also has its lid. It is required to reduce the overall thickness of the package by reducing the thickness to approximately 0.2mm. It's starting to look like this.
【０００４】 そこで上述した従来の半導体素子収納用パッケージの蓋体厚みを0.2mm 程度と し、パッケージ全体の厚みを薄くした場合、パッケージの蓋体は通常、アルミナ セラミックス等の電気絶縁材料より成り、該アルミナセラミックスは脆弱で機械 的強度が弱いことから蓋体の厚みを薄くすると蓋体の機械的強度が大幅に低下し てしまい、その結果、絶縁基体と蓋体とから成る容器内部に半導体素子を気密に 封止し、半導体装置となした後、蓋体に外力が印加されると該外力によって蓋体 が容易に破損し、容器内部の気密封止が破れて内部に収容する半導体素子を長期 間にわたり正常、且つ安定に作動させることができなくなるという欠点を有して いた。0004 Therefore, the thickness of the lid of the conventional semiconductor device storage package mentioned above is set to about 0.2 mm. However, when the overall thickness of the package is reduced, the package lid is usually made of alumina. It is made of electrically insulating materials such as ceramics, and alumina ceramics are brittle and mechanically resistant. Since the mechanical strength of the lid is weak, reducing the thickness of the lid significantly reduces the mechanical strength of the lid. As a result, the semiconductor device is airtightly placed inside the container consisting of the insulating base and the lid. After sealing and forming a semiconductor device, if an external force is applied to the lid, the external force will cause the lid to close. The container is easily damaged and the hermetic seal inside the container is broken, causing the semiconductor devices housed inside to be damaged for a long period of time. It has the disadvantage that it cannot operate normally and stably for a long period of time. there was.
【０００５】[0005]
本考案は絶縁基体と蓋体との間に半導体素子及び該半導体素子の各電極がボン ディングワイヤにより接続された外部リード端子とを挟持し、ガラス溶着によっ て内部に半導体素子を気密に封止する半導体素子収納用パッケージにおいて、前 記蓋体を表面が高融点ガラスで被覆された金属材により形成されていることを特 徴とするものである。 In the present invention, a semiconductor element and each electrode of the semiconductor element are bonded between an insulating base and a lid. Sandwich the external lead terminal connected with the ding wire, and use glass welding to In semiconductor device storage packages that hermetically seal semiconductor devices inside, The recording cover is made of a metal material whose surface is coated with high melting point glass. It is a sign.
【０００６】[0006]
次に本考案を添付図面に基づき詳細に説明する。 Next, the present invention will be explained in detail based on the accompanying drawings.
【０００７】 図１は本考案の半導体素子収納用パッケージの一実施例を示す断面図であり、 1 は絶縁基体、2 は蓋体である。この絶縁基体1 と蓋体2 とで半導体素子3 を収 容するための容器が構成される。[0007] FIG. 1 is a sectional view showing an embodiment of the semiconductor element storage package of the present invention. 1 is the insulating base and 2 is the lid. A semiconductor element 3 is housed in this insulating base 1 and lid 2. A container is constructed to contain the
【０００８】 前記絶縁基体1 はアルミナセラミックス等の電気絶縁材料から成り、その上面 中央部に半導体素子3 を収容するための凹部1aが設けてあり、該凹部1a底面には 半導体素子3 がガラス、樹脂、ロウ材等の接着材を介して取着固定される。[0008] The insulating substrate 1 is made of an electrically insulating material such as alumina ceramics, and its upper surface A recess 1a for accommodating the semiconductor element 3 is provided in the center, and the bottom of the recess 1a has a The semiconductor element 3 is attached and fixed via an adhesive such as glass, resin, or brazing material.
【０００９】 前記絶縁基体1 は例えば、酸化アルミニウム（Al2 O 3 ) 、シリカ(SiO2 ) 、 マグネシア(MgO) 、カルシア(CaO) 等の原料粉末を図1 に示す絶縁基体1 の形状 に対応したプレス型内に充填させるとともに一定圧力を印加して成形し、しかる 後、成形品を約15000 ℃の温度で焼成することによって製作される。[0009] The insulating substrate 1 is formed by forming a raw material powder of aluminum oxide (Al 2 O 3 ), silica (SiO 2 ), magnesia (MgO), calcia (CaO), etc. into the shape of the insulating substrate 1 shown in FIG. 1, for example. The molded product is then filled into a press mold, molded by applying a constant pressure, and then fired at a temperature of about 15,000°C.
【００１０】 また前記絶縁基体1 の上面にはコバール金属(Fe-Ni-Co 合金) や42アロイ(Fe- Ni合金) 等の金属から成る外部リード端子4 の一端が封止用の低融点ガラス5 を 介して仮止めされており、該外部リード端子４はコバール金属等のインゴット（ 塊）を従来周知の圧延加工法及び打ち抜き加工法を採用し所定の板状に形成する ことによって製作される。0010 Further, the upper surface of the insulating substrate 1 is coated with Kovar metal (Fe-Ni-Co alloy) or 42 alloy (Fe-Ni-Co alloy). One end of the external lead terminal 4 made of metal such as Ni alloy) is covered with low melting point glass 5 for sealing. The external lead terminal 4 is made of an ingot (such as Kovar metal). A block) is formed into a predetermined plate shape using conventionally well-known rolling and punching methods. It is produced by
【００１１】 前記外部リード端子４は内部に収容する半導体素子３を外部電気回路に接続す る作用を為し、その一端には半導体素子３の各電極がボンディングワイヤ6 を介 して接続され、外部リード端子4 を外部電気回路に接続することによって半導体 素子3 は外部電気回路と電気的に接続されることとなる。[0011] The external lead terminal 4 is used to connect the semiconductor element 3 housed inside to an external electric circuit. Each electrode of the semiconductor element 3 is connected to one end via a bonding wire 6. By connecting the external lead terminal 4 to an external electrical circuit, the semiconductor Element 3 will be electrically connected to an external electrical circuit.
【００１２】 尚、前記外部リード端子４はその表面にニッケル、金等から成る良導電性で、 且つ耐蝕性に優れた金属をメッキにより1.0 乃至20.0μm 厚みに層着させておく と外部リード端子4 の酸化腐食を有効に防止するとともに外部リード端子4 とボ ンディングワイヤ6 、外部電気回路との電気的接続を良好となすことができる。 そのため外部リード端子4 はその表面にニッケル、金等をメッキにより1.0 乃至 20.0μm の厚みに層着させておくことが好ましい。0012 The external lead terminal 4 has a good conductivity made of nickel, gold, etc. on its surface. In addition, a layer of metal with excellent corrosion resistance is applied by plating to a thickness of 1.0 to 20.0 μm. This effectively prevents oxidation corrosion of the external lead terminal 4 and the external lead terminal 4. The ending wire 6 can provide a good electrical connection with an external electric circuit. Therefore, the surface of the external lead terminal 4 is plated with nickel, gold, etc. It is preferable to form a layer with a thickness of 20.0 μm.
【００１３】 また前記絶縁基体1 に外部リード端子4 を仮止めする封止用の低融点ガラス5 は例えば、酸化鉛(PbO)75.0 重量％、酸化チタン(TiO2 )9.0重量％、酸化ホウ素 (B2 O 3 )7.5重量％、酸化亜鉛(ZnO)2.0重量％から成り、該ガラス組成粉末に適 当な有機溶剤、溶媒を添加混合して得たガラスペーストを従来周知のスクリーン 印刷法により絶縁基体1 の上面に所定厚みに印刷塗布し、しかる後、これを約40 0 ℃の温度で焼成することによって絶縁基体1 の上面所定位置に被着される。ま た低融点ガラス5 を用いて外部リード端子4 を絶縁基体1 の上面に仮止めする方 法としては、絶縁基体1 の上面に被着させた低融点ガラス5 の上に外部リード端 子4 の一端を載置し、しかる後、これを約400 ℃の温度に加熱し、低融点ガラス 5 を加熱溶融させることによって行われる。[0013] Furthermore, the low melting point glass 5 for sealing which temporarily fastens the external lead terminals 4 to the insulating substrate 1 is made of, for example, 75.0% by weight of lead oxide (PbO), 9.0% by weight of titanium oxide (TiO 2 ), and boron oxide ( A glass paste consisting of 7.5% by weight of B 2 O 3 ) and 2.0% by weight of zinc oxide (ZnO) is prepared by adding and mixing an appropriate organic solvent and solvent to the glass composition powder, and then applying the glass paste to an insulating substrate using a well-known screen printing method. 1 to a predetermined thickness, and then baked at a temperature of approximately 400° C. to adhere to a predetermined position on the upper surface of the insulating substrate 1. Furthermore, as a method for temporarily fixing the external lead terminal 4 to the upper surface of the insulating substrate 1 using the low melting point glass 5, one end of the external lead terminal 4 is placed on the low melting point glass 5 adhered to the upper surface of the insulating substrate 1. This is carried out by placing the glass on the glass and then heating it to a temperature of about 400° C. to heat and melt the low-melting glass 5.
【００１４】 前記外部リード端子4 が仮止めされた絶縁基体1 はまたその上面に蓋体2 が、 該蓋体2 の下面に被着させた封止用の低融点ガラス7 と絶縁基体1 の上面に被着 させた封止用の低融点ガラス5 とを溶融一体化させることよって接合され、これ によって絶縁基体1 と蓋体2 とから成る容器内部に半導体素子3 が気密に封止さ れる。[0014] The insulating base 1 to which the external lead terminals 4 are temporarily fixed also has a lid 2 on its top surface. A low melting point glass 7 for sealing is adhered to the lower surface of the lid 2 and the upper surface of the insulating substrate 1. It is joined by melting and integrating low melting point glass5 for sealing. The semiconductor element 3 is hermetically sealed inside the container consisting of the insulating substrate 1 and the lid 2. It will be done.
【００１５】 前記蓋体2 は表面が高融点ガラス2bで被覆された金属材2aにより形成されてお り、その下面に封止用の低融点ガラス7 が予め被着されている。[0015] The lid body 2 is formed of a metal material 2a whose surface is coated with high melting point glass 2b. A low melting point glass 7 for sealing is previously adhered to the lower surface.
【００１６】 前記蓋体2 を構成する金属材2aは、例えばコバール金属や４２アロイ等の金属 から成り、該コバール金属等は絶縁基体１を構成するアルミナセラミックスと熱 膨張係数が近似し、絶縁基体１上に蓋体２を接合させた後、両者に熱が印加され ても両者の熱膨張量は実質的に同一となって両者の接合が極めて強固なものとな る。[0016] The metal material 2a constituting the lid body 2 is, for example, a metal such as Kovar metal or 42 alloy. The Kovar metal, etc. is made of alumina ceramics that constitutes the insulating substrate 1, and the heat The expansion coefficients are similar, and after bonding the lid 2 to the insulating base 1, heat is applied to both. However, the amount of thermal expansion between the two is essentially the same, making the bond between the two extremely strong. Ru.
【００１７】 また前記蓋体2 を構成する金属材2aはコバール金属等から成り、該コバール金 属等はアルミナセラミックス等の脆性材料ではないためその厚みを0.2mm 程度と しても外力印加によって破損することはない。従って、蓋体2 の厚みを0.2mm 程 度としパッケージの全体厚みを薄型化しても容器内部の気密封止を維持すること ができ容器内部に収容する半導体素子3 を長期間にわたり正常、且つ安定に作動 させることが可能となる。[0017] Further, the metal material 2a constituting the lid body 2 is made of Kovar metal, etc. Since metals are not brittle materials such as alumina ceramics, the thickness should be approximately 0.2 mm. However, it will not be damaged by external force applied. Therefore, the thickness of the lid body 2 should be reduced to about 0.2mm. Even if the overall thickness of the package is reduced, the airtight seal inside the container can be maintained. The semiconductor device3 housed inside the container can operate normally and stably for a long period of time. It becomes possible to do so.
【００１８】 前記蓋体2 を構成する金属材2aはまたその表面が高融点ガラス2bで被覆されて おり、該高融点ガラス2bは導電性である金属材2aの電気的絶縁を図り、金属材2a に半導体素子3 の電極を外部リード端子4 に接続するボンディングワイヤ6 が接 触し、半導体素子3 の電極間に短絡を生じたり、半導体素子3 に外部から不要な 電気が流れ、半導体素子3 の特性に変化が生じるのを有効に防止する作用を為す 。[0018] The surface of the metal material 2a constituting the lid 2 is coated with high melting point glass 2b. The high melting point glass 2b is designed to electrically insulate the conductive metal material 2a. A bonding wire 6 connecting the electrode of the semiconductor element 3 to the external lead terminal 4 is connected to the touching the semiconductor element 3, causing a short circuit between the electrodes of the semiconductor element 3, or exposing the semiconductor element 3 to unnecessary external contact. It acts to effectively prevent changes in the characteristics of the semiconductor element 3 due to the flow of electricity. .
【００１９】 前記高融点ガラス2bは、例えば酸化鉛(PbO) 40.0乃至60.0重量％、酸化ケイ素 (SiO 2)20.0 乃至40.0重量％、酸化ホウ素(B2 O 3 )5.0乃至10.0重量％を含むガ ラス、或いは酸化ケイ素(SiO 2)40.0 乃至60.0重量％、酸化バリウム(BaO)20.0 乃至35.0重量％、酸化カルシウム(CaO) 5.0 乃至15.0重量％を含むガラスから成 り、これらのガラスは融点が600 乃至900 ℃と高いことから絶縁基体1 と蓋体2 とを封止用の低融点ガラス5 、7 を加熱溶融させて接合させる際、封止用低融点 ガラス5 、7 を加熱溶融させるための熱が印加されたとしても溶融することはな く、金属材2aの電気的絶縁を維持することが可能となる。The high melting point glass 2b is a glass containing, for example, 40.0 to 60.0% by weight of lead oxide (PbO), 20.0 to 40.0% by weight of silicon oxide (SiO 2 ), and 5.0 to 10.0% by weight of boron oxide (B 2 O 3 ). , or a glass containing 40.0 to 60.0% by weight of silicon oxide (SiO 2 ), 20.0 to 35.0% by weight of barium oxide (BaO), and 5.0 to 15.0% by weight of calcium oxide (CaO), and these glasses have a melting point of 600 to 900. ℃, so when the insulating substrate 1 and the lid 2 are joined by heating and melting the low melting point glasses 5 and 7 for sealing, the heat for heating and melting the low melting point glasses 5 and 7 for sealing is Even if the voltage is applied, the metal material 2a will not melt, and the electrical insulation of the metal material 2a can be maintained.
【００２０】 尚、上述した組成の高融点ガラスはまたその熱膨張係数が金属材2aの熱膨張係 数に近似しており、金属材2aの表面に被覆させた後、例えば蓋体2 を絶縁基体1 に接合させる際等の熱が印加されても金属材2aと高融点ガラス2bとの間には両者 の熱膨張係数の相違に起因した大きな熱応力が発生することは殆どなく、高融点 ガラス2bを金属材2aの表面に強固に被覆させておくことが可能となる。従って、 金属材2aの表面に高融点ガラス2bを強固に被覆させておくには高融点ガラス2bと して上述した組成のガラスを使用することが好ましい。[0020] Furthermore, the high melting point glass having the above-mentioned composition also has a coefficient of thermal expansion that is similar to that of the metal material 2a. After coating the surface of the metal material 2a, for example, cover 2 is coated with insulating base 1. Even if heat is applied when joining the metal material 2a and the high melting point glass 2b, Large thermal stresses due to differences in thermal expansion coefficients are unlikely to occur, and the high melting point It becomes possible to firmly cover the surface of the metal material 2a with the glass 2b. Therefore, In order to firmly cover the surface of the metal material 2a with the high melting point glass 2b, It is preferable to use a glass having the composition described above.
【００２１】 また前記蓋体2 の下面に被着させた封止用の低融点ガラス7 は、例えば絶縁基 体1 の上面に被着させた封止用の低融点ガラス5 と同じガラス、即ち、酸化鉛(P bO)75.0 重量％、酸化チタン(TiO2 )9.0重量％、酸化ホウ素(B2 O 3 )7.5重量％ 、酸化亜鉛(ZnO)2.0重量％から成るガラスが使用され、絶縁基体1 の上面に封止 用の低融点ガラス5 を被着させる方法と同じ方法によって蓋体2 の下面に被着さ れる。Furthermore, the low melting point glass 7 for sealing applied to the lower surface of the lid 2 is the same glass as the low melting point glass 5 for sealing applied to the upper surface of the insulating substrate 1, ie, A glass consisting of 75.0% by weight of lead oxide (P bO), 9.0% by weight of titanium oxide (TiO 2 ), 7.5% by weight of boron oxide (B 2 O 3 ), and 2.0% by weight of zinc oxide (ZnO) was used, and the insulating substrate 1 The low melting point glass 5 for sealing is applied to the lower surface of the lid body 2 by the same method as that applied to the upper surface of the lid body 2.
【００２２】 前記蓋体２の下面に被着させた封止用の低融点ガラス7 は絶縁基体1 の上面に 被着させた封止用の低融点ガラス5 と溶融一体化させることによって絶縁基体1 と蓋体2 とを接合させ、絶縁基体1 と蓋体2 とから成る容器内部に半導体素子3 を気密に封止する作用を為す。[0022] A low melting point glass 7 for sealing is attached to the lower surface of the lid 2 and is attached to the upper surface of the insulating base 1. The insulating substrate 1 is formed by melting and integrating it with the low melting point glass 5 for sealing. and the lid body 2, and the semiconductor element 3 is placed inside the container consisting of the insulating base body 1 and the lid body 2. It acts to airtightly seal the
【００２３】 かくして本考案の半導体素子収納用パッケージによれば、絶縁基体1 の凹部1a 底面に半導体素子3 を接着材を介して取着固定するとともに該半導体素子3 の各 電極をボンディングワイヤ6 により外部リード端子4 に接続させ、しかる後、絶 縁基体1 と蓋体2 とをその各々の相対向する主面に予め被着させておいた封止用 の低融点ガラス5 、7 を加熱溶融させ、接合させることによって、絶縁基体1 と 蓋体2 とから成る容器内部に半導体素子3 を気密に封止し、これによって製品と しての半導体装置が完成する。[0023] Thus, according to the semiconductor device storage package of the present invention, the recess 1a of the insulating substrate 1 A semiconductor element 3 is attached and fixed to the bottom surface via an adhesive, and each of the semiconductor elements 3 is Connect the electrode to the external lead terminal 4 using the bonding wire 6, and then For sealing, the edge base 1 and the lid 2 are preliminarily attached to their respective opposing main surfaces. By heating and melting the low melting point glasses 5 and 7 and joining them, the insulating substrate 1 and The semiconductor element 3 is hermetically sealed inside the container consisting of the lid 2, thereby separating the product and the product. The semiconductor device is completed.
【００２４】[0024]
本考案の半導体素子収納用パッケージによれば、蓋体を表面が高融点ガラスで 被覆された金属材により形成したことから蓋体の厚みを薄くしてもその機械的強 度を高いものに維持することができ、その結果、蓋体が破損し、絶縁基体と蓋体 とから成る容器の気密封止が破れるのを極小として内部に収容する半導体素子を 長期間にわたり正常、且つ安定に作動させることが可能となる。 According to the semiconductor device storage package of the present invention, the lid body is made of high melting point glass. Since it is made of coated metal material, its mechanical strength is maintained even if the thickness of the lid is made thin. The temperature can be maintained at a high level, and as a result, the lid body will be damaged, and the insulating base and lid body will be damaged. The semiconductor element housed inside is minimized so that the hermetic seal of the container consisting of It becomes possible to operate normally and stably for a long period of time.
【００２５】 また蓋体の厚みを薄くすることが可能なことからパッケージの全体厚みも薄型 化でき、近時の薄型化が進む情報処理装置に搭載される半導体装置への適用も可 能となる。[0025] In addition, since the thickness of the lid can be made thinner, the overall thickness of the package is also thinner. It can also be applied to semiconductor devices installed in information processing equipment, which is becoming thinner in recent years. Becomes Noh.
【図１】本考案の半導体素子収納用パッケージの一実施
例を示す断面図である。FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor device storage package of the present invention.
【図２】従来の半導体素子収納用パッケージの一実施例
を示す断面図である。FIG. 2 is a sectional view showing an example of a conventional semiconductor device storage package.
１・・・・絶縁基体 ２・・・・蓋体 ２ａ・・・金属材 ２ｂ・・・高融点ガラス ３・・・・半導体素子 ４・・・・外部リード端子 ５，７・・封止用の低融点ガラス 1...Insulating base 2... Lid body 2a...metal material 2b...High melting point glass 3...Semiconductor element 4...External lead terminal 5,7...Low melting point glass for sealing
Claims (1)
半導体素子の各電極がボンディングワイヤにより接続さ
れた外部リード端子とを挟持し、ガラス溶着によって内
部に半導体素子を気密に封止する半導体素子収納用パッ
ケージにおいて、前記蓋体を表面が高融点ガラスで被覆
された金属材により形成されていることを特徴とする半
導体素子収納用パッケージ。Claim 1: A semiconductor element and an external lead terminal to which each electrode of the semiconductor element is connected by a bonding wire are sandwiched between an insulating base and a lid, and the semiconductor element is hermetically sealed inside by glass welding. What is claimed is: 1. A package for accommodating semiconductor elements, characterized in that the lid body is formed of a metal material whose surface is coated with high melting point glass.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1991020740U JP2555178Y2 (en) | 1991-03-08 | 1991-03-08 | Package for storing semiconductor elements |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1991020740U JP2555178Y2 (en) | 1991-03-08 | 1991-03-08 | Package for storing semiconductor elements |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04109541U true JPH04109541U (en) | 1992-09-22 |
| JP2555178Y2 JP2555178Y2 (en) | 1997-11-19 |
Family
ID=31906742
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1991020740U Expired - Fee Related JP2555178Y2 (en) | 1991-03-08 | 1991-03-08 | Package for storing semiconductor elements |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2555178Y2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5322661U (en) * | 1976-08-05 | 1978-02-25 | ||
| JPS5667946A (en) * | 1979-11-07 | 1981-06-08 | Nec Corp | Semiconductor system |
| JPS60190041U (en) * | 1984-05-25 | 1985-12-16 | 関西日本電気株式会社 | flat package |
-
1991
- 1991-03-08 JP JP1991020740U patent/JP2555178Y2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5322661U (en) * | 1976-08-05 | 1978-02-25 | ||
| JPS5667946A (en) * | 1979-11-07 | 1981-06-08 | Nec Corp | Semiconductor system |
| JPS60190041U (en) * | 1984-05-25 | 1985-12-16 | 関西日本電気株式会社 | flat package |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2555178Y2 (en) | 1997-11-19 |
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