JPH04106950A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPH04106950A
JPH04106950A JP22548890A JP22548890A JPH04106950A JP H04106950 A JPH04106950 A JP H04106950A JP 22548890 A JP22548890 A JP 22548890A JP 22548890 A JP22548890 A JP 22548890A JP H04106950 A JPH04106950 A JP H04106950A
Authority
JP
Japan
Prior art keywords
film
insulating film
dicing line
substrate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22548890A
Other languages
Japanese (ja)
Inventor
Atsushi Ishii
敦司 石井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP22548890A priority Critical patent/JPH04106950A/en
Publication of JPH04106950A publication Critical patent/JPH04106950A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable a measurement of a film thickness without complicating structures and increasing number of processes, and to ensure the reliability of the quality of a product, by introducing the structure of leaving an insulating film at a part of a dicing line section. CONSTITUTION:After forming an insulation film on a substrate 1, a first insulation film 2a is formed on a device section 8. At this time, the first insulating film 2b is left on a partial region of a dicing line section 5 too. Then, after forming a metallic thin film on the film 2a, a first wiring film 3 is formed on the film 2a. Further, the film 3 is covered with an insulating film, and this film comes into a second insulating film 4. When in the section 5, the film thickness of the film 4 is measured using a measuring instrument of an optical system, a beam 7a is projected on the film 2b in the section 5, from the measuring instrument of the optical system. Then, the reflection bean 7b thereof is observed, and the film thickness is measured. Thereby, the substrate in the section 5 is prevented from roughening, and the impossibility of measuring film thickness is made avoidable. Further, it is made possible to manage the film thickness with a high accuracy and reliability, and without complicating structures and increasing number of Processes.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置及びその製造方法に関し、特にダイ
シングライン部の構造及びその製造方法に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly relates to a structure of a dicing line portion and a method of manufacturing the same.

〔従来の技術〕[Conventional technology]

第3図は従来の半導体装置のダイシングライン部の断面
図である。
FIG. 3 is a cross-sectional view of a dicing line portion of a conventional semiconductor device.

図において、1は例えば単結晶Si等から成る半導体基
板(以下、単に基板と称す)、2aは基板1上に形成さ
れた第1の絶縁膜、3は第1の絶縁膜2a上に形成され
た第1の配線膜、4は第1の配線膜を被覆するように形
成された第2の絶縁膜、5はダイシングのために絶縁膜
を除去して形成されるダイシングライン部、6はダイシ
ングライン部5のSi基板荒れ、7aは膜厚測定のため
に用いられる光学系膜厚測定器の入射光(以下、入射光
と称す)、7bは光学系膜厚測定器の入射光7aの反射
光(以下、反射光と称す)、8は素子を形成する素子部
である。同図に示すようにダイシングライン部5では第
1の絶縁膜2aは完全ムこ除去されている。
In the figure, 1 is a semiconductor substrate (hereinafter simply referred to as a substrate) made of, for example, single crystal Si, 2a is a first insulating film formed on the substrate 1, and 3 is a semiconductor substrate formed on the first insulating film 2a. 4 is a second insulating film formed to cover the first wiring film, 5 is a dicing line portion formed by removing the insulating film for dicing, and 6 is a dicing film. Roughness of the Si substrate in the line part 5, 7a is the incident light of the optical film thickness measuring device used for film thickness measurement (hereinafter referred to as incident light), 7b is the reflection of the incident light 7a of the optical film thickness measuring device Light (hereinafter referred to as reflected light), 8 is an element part forming an element. As shown in the figure, in the dicing line portion 5, the first insulating film 2a is completely removed.

以下、このような構造の半導体装置の製造工程を第4図
二こついて説明する。
Hereinafter, the manufacturing process of a semiconductor device having such a structure will be explained with reference to FIG.

まず、基板1上に熱酸化法もしくはCVD法により絶縁
膜を形成後、写真製版工程を経てパターニングすること
によって、第1の絶縁膜2aが形成される。この時、ダ
イシングライン部5では絶縁膜は完全に除去されSi基
板1が露出している(第4図(a))。
First, the first insulating film 2a is formed by forming an insulating film on the substrate 1 by a thermal oxidation method or a CVD method, and then patterning it through a photolithography process. At this time, the insulating film is completely removed at the dicing line portion 5, and the Si substrate 1 is exposed (FIG. 4(a)).

次に、金属薄膜を第1の絶縁膜2a上にスパッタ法等に
より形成後、写真製版工程を経てバターニングすること
によって、第1の配線膜3が形成される。この場合パタ
ーニングの際用いられるCF4系ガスにより、ダイシン
グライン部5で露出した基板1もエツチングされるため
、表面は基板荒れ6の状態となる(第4図(b))。
Next, the first wiring film 3 is formed by forming a metal thin film on the first insulating film 2a by sputtering or the like, and then patterning it through a photolithography process. In this case, the substrate 1 exposed at the dicing line portion 5 is also etched by the CF4 gas used during patterning, so that the surface becomes rough 6 (FIG. 4(b)).

さらに、第1の配線膜3を被覆するように、例えばCV
D法等により絶縁膜が形成される。それが第2の絶縁膜
4となる(第4図(C))。
Furthermore, for example, CV
An insulating film is formed by the D method or the like. This becomes the second insulating film 4 (FIG. 4(C)).

なお、この第2の絶縁膜4の膜厚管理のため、光学系の
膜厚測定器の入射光7a及び反射光7bを用いて、ダイ
シングライン部5で膜厚を測定する。
In order to control the film thickness of the second insulating film 4, the film thickness is measured at the dicing line section 5 using the incident light 7a and the reflected light 7b of an optical film thickness measuring device.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

このように、従来の半導体装置ではダイソングライン部
5上の絶縁膜を完全に除去している。これはダイシング
の際、同部の全面に絶縁膜があるとダイシングカンタの
消耗が激しくなるのに加え、同部に生じる絶縁膜の割れ
が素子部8に及ぶのを防(ためである。
In this manner, in the conventional semiconductor device, the insulating film on the Dyson line portion 5 is completely removed. This is because, during dicing, if there is an insulating film on the entire surface of the same part, the dicing counter will be severely worn out, and also to prevent cracks in the insulating film that occur in the same part from reaching the element part 8.

従って、ダイシングライン部5ではS1面が露出してお
り、例えばアルミ合金等を用いた配線の加工時に用いら
れるCF、系ガスによってこのSlはエツチングされて
しまう。この時、S1表面を微小領域で被覆している炭
素、酸化膜等がマイクロマスクとなって凸凹が生じ、表
面モホロジの劣化、いわゆる基板荒れが生じる。
Therefore, the S1 surface is exposed in the dicing line portion 5, and this S1 is etched by CF and other gases used when processing wiring using, for example, aluminum alloy. At this time, the carbon, oxide film, etc. that cover the S1 surface in minute regions act as a micromask, causing unevenness, resulting in deterioration of the surface morphology, so-called substrate roughness.

よってこの後、第2の絶縁膜の膜厚管理のためダイシン
グライン部5で膜厚を測定する際には、測定光の入射光
7aに対し基板で反射される反射光7bjま基板荒れの
ために散乱され、測定が不可能になるか、もしくは正確
に測定できなくなり、プロセス管理上大きな問題となっ
ていた。
Therefore, after this, when measuring the thickness of the second insulating film at the dicing line section 5 to control the thickness of the second insulating film, the reflected light 7bj reflected by the substrate with respect to the incident light 7a of the measurement light will be affected by the roughness of the substrate. The particles are scattered, making measurements impossible or impossible to measure accurately, which poses a major problem in process control.

さらに、サブミクロン時代となり、成膜装置がこれまで
のバッチ式から板葉式の装置に代わりつつある。従って
、ハツチ式では可能であったモニタウェハによる膜厚管
理は不可能となるため、パターンの付いた実ウェハによ
る膜厚管理は必須であり、この膜厚モニタが不可能とな
ると製品の信頼性上重大な問題となる。
Furthermore, in the submicron era, film forming equipment is replacing the previous batch type with plate type. Therefore, film thickness control using a monitor wafer, which was possible with the hatch method, is no longer possible, so film thickness control using a patterned actual wafer is essential, and if this film thickness monitoring becomes impossible, product reliability This is a serious problem.

本発明はこのような問題を解消するためになされたもの
で、構造を複雑にしたり、工程数を増やすことな(膜厚
測定ができ、その結果製品の品賞信転性が確保された半
導体装置及びその製造方法を提供することを目的とする
The present invention was made in order to solve these problems. The purpose is to provide a device and a method for manufacturing the same.

5課題を解決するための手段〕 この発明に係る半導体装置は、Si基板の荒れを防ぎ、
膜厚測定ができるようにダイシングライン部の一部に絶
縁膜を残す構造としたものである。
Means for Solving 5 Problems] A semiconductor device according to the present invention prevents roughness of a Si substrate,
This structure leaves an insulating film in a part of the dicing line so that film thickness can be measured.

この発明に係る半導体装置の製造方法は、半導体基板上
の素子形成領域に第1の絶縁膜を形成すると同時にダイ
シングライン部の一部の領域にも該第1の絶縁膜を残し
、その後、全面に金属薄膜を設け、前記素子形成領域の
第1の絶縁膜上にのみこれを残すようにエツチングし、
さらに全面に第2の絶縁膜を形成し、前記ダイシングラ
イン部の第1の絶縁膜上で、前記第2の絶縁膜の膜厚測
定を行うものである。
In the method for manufacturing a semiconductor device according to the present invention, a first insulating film is formed in an element formation region on a semiconductor substrate, the first insulating film is also left in a part of a dicing line portion, and then the entire surface is a metal thin film is provided on the first insulating film and etched so as to leave it only on the first insulating film in the element forming region;
Further, a second insulating film is formed on the entire surface, and the thickness of the second insulating film is measured on the first insulating film in the dicing line portion.

〔作用〕[Effect]

この発明の半導体装置においては、ダイシングライン部
の一部に絶縁膜を残す構造としたので、CF4系のエン
チングガスによるダイシングライン部のSi基板荒れを
防ぎ、これに起因する膜厚測定器からの測定光の乱反射
を防止するので、膜厚測定が可能となる。
In the semiconductor device of the present invention, since the structure is such that an insulating film is left in a part of the dicing line part, it is possible to prevent roughness of the Si substrate in the dicing line part due to CF4-based etching gas. Since diffuse reflection of light is prevented, film thickness measurement becomes possible.

また、この発明の半導体装置の製造方法においては、素
子形成頭載の第1の絶縁膜を形成時二こ、ダイシングラ
イン部の一部の領域二こ従来除去していた第1のw!、
縁膜を残丁よう二こ′−たので、その後の工程の金属薄
膜エノチンク時二こ第1の絶縁膜を残′−たダイシング
ライン部の一部の領域でz;; S j基板荒れが生し
ない。よって、構造を複雑;こ二tす、工程を増やすこ
となくダイシングライン部で精変のよい膜厚測定が実現
できる。
In addition, in the method for manufacturing a semiconductor device of the present invention, when forming the first insulating film on top of the element formation, two regions of the dicing line portion are removed in the first w! ,
Since two parts of the edge film were left behind, during the metal thin film etching process in the subsequent process, some areas of the dicing lines where the first insulating film was left were roughened. Not alive. Therefore, precise film thickness measurement can be achieved at the dicing line portion without complicating the structure or increasing the number of steps.

:実施例〕 以下、この発明の一実施例を図について説明する。:Example〕 An embodiment of the present invention will be described below with reference to the drawings.

なお、従来の技術の説明と重複する部分:よ、適宜その
説明を省略する。
Note that the description of parts that overlap with the description of the conventional technology will be omitted as appropriate.

第1図はこの発明の一実施例による半導体装置の主要部
の構造を示す断面図である。図Sこおいて、1.2a、
3〜8は従来のものと同じもの、2b;よダイシングラ
イン部5に形成された第1の絶縁膜である。
FIG. 1 is a sectional view showing the structure of the main part of a semiconductor device according to an embodiment of the present invention. In Figure S, 1.2a,
3 to 8 are the same as the conventional one; 2b; the first insulating film formed on the dicing line portion 5;

以下、このような構造の半導体装置の製造方法を第2図
について説明する。
Hereinafter, a method for manufacturing a semiconductor device having such a structure will be explained with reference to FIG.

第2図(a)〜(C)はこの発明の一実施例による半導
体装置の製造工程を示す各主要工程の断面図である。
FIGS. 2(a) to 2(C) are cross-sectional views of each main process showing the manufacturing process of a semiconductor device according to an embodiment of the present invention.

まず、基板1に絶縁膜を熱酸化法もしくはCVD法によ
り形成する。この後、写真製版工程を経て、バターニン
グすることによって素子部8に第1の絶縁膜2aを形成
する。この時、ダイシングライン部5の一部の領域にも
第1の絶縁膜2bを残す(第2図(a))。
First, an insulating film is formed on the substrate 1 by a thermal oxidation method or a CVD method. Thereafter, a first insulating film 2a is formed on the element portion 8 by patterning through a photolithography process. At this time, the first insulating film 2b is also left in a part of the dicing line portion 5 (FIG. 2(a)).

次に、金属薄膜を第1の絶縁膜2a上にスパッタ法等に
より形成後、例えばCF、系のガス等から成るガスでパ
ターニングすることによって、第1の絶縁膜2a上に第
1の配線膜3を形成する(第2図ら))。
Next, a metal thin film is formed on the first insulating film 2a by a sputtering method or the like, and then patterned with a gas such as CF or other gases, thereby forming a first wiring film on the first insulating film 2a. 3 (Fig. 2 et al.)).

さらに、第1の配線膜3を被覆するように、例えばCV
D法等により絶縁膜を形成する。それが第2の絶縁膜4
となる(第2図(C))。
Furthermore, for example, CV
An insulating film is formed by the D method or the like. That is the second insulating film 4
(Figure 2 (C)).

以上の工程を経て第1図に示す半導体装置が完成する。Through the above steps, the semiconductor device shown in FIG. 1 is completed.

しかるのち、ダイシングライン部5で光学系の測定器を
用いて第2の絶縁膜4の膜厚測定を行う際には、第1図
に示すようにダイノングライン部5上の第1の絶縁膜2
b上に、光学系膜厚測定器から光7aを入射し、その反
射光7bを観測し、膜厚を測定する。
Thereafter, when measuring the film thickness of the second insulating film 4 using an optical measuring device at the dicing line section 5, as shown in FIG. membrane 2
Light 7a from an optical film thickness measuring device is incident on the film 7b, and the reflected light 7b is observed to measure the film thickness.

このような本実施例では上述のように、ダイシングライ
ン部5の一部を第1の絶縁膜2bで被覆するようにした
ので、その工程基原の製造工程(第2図(b))で用い
られるCF4系のガスから第1の絶縁膜2bで被覆した
Si面を保護でき、これにより基板荒れを防止できる効
果がある。その結果、上述の膜厚測定では、膜厚測定器
からの入射光7aに対して反射光7bが正反射されるこ
ととなり、従来の乱反射による測定不能の不都合が回避
される。従って、パターンの付いた実ウェハでの膜厚管
理を高精度に行うことができ、信顛性の向上を図ること
ができる。
In this embodiment, as described above, a part of the dicing line portion 5 is covered with the first insulating film 2b, so that the basic manufacturing process (FIG. 2(b)) The Si surface covered with the first insulating film 2b can be protected from the CF4-based gas used, which has the effect of preventing substrate roughness. As a result, in the above-mentioned film thickness measurement, the reflected light 7b is specularly reflected with respect to the incident light 7a from the film thickness measuring device, and the conventional problem of inability to measure due to diffuse reflection is avoided. Therefore, the film thickness of an actual wafer with a pattern can be controlled with high precision, and reliability can be improved.

なお、第1の絶縁膜2bは、ダイシングライン部5の一
部の領域のみに残したものであるため、該第1の絶縁膜
2b部でのダイシング時に絶縁膜2bに割れが生したと
してもその割れが素子部8にまで影響を及ぼすという事
はない。
Note that since the first insulating film 2b is left only in a part of the dicing line section 5, even if a crack occurs in the insulating film 2b during dicing in the first insulating film 2b section, The cracks do not affect the element section 8.

また、この絶縁膜2bは素子部の第1の絶縁膜2aと同
時に形成するので、特に製造工程を増加する必要はなく
、従来と同様の工程数で容易に本構造を得ることができ
る。
Further, since this insulating film 2b is formed at the same time as the first insulating film 2a of the element section, there is no need to increase the number of manufacturing steps, and the present structure can be easily obtained with the same number of steps as in the prior art.

以上、上記実施例では配線層が一層の場合を示したが、
絶縁膜を介した配線膜を順次多層に形成して構成される
多層配線においても、第2図(a)の工程でダイシング
ライン部5に絶縁膜を残せば、後工程でも同様の効果が
得られる。
In the above embodiments, the case where the wiring layer is one layer is shown, but
Even in a multilayer wiring constructed by successively forming multiple layers of wiring films with insulating films interposed therebetween, if the insulating film is left on the dicing line portion 5 in the process shown in FIG. 2(a), the same effect can be obtained in the subsequent process. It will be done.

なお、ダイシングライン部5に形成する第1の絶縁膜2
bは、オーバーエツチングされることを考慮して厚い方
が好ましい。
Note that the first insulating film 2 formed on the dicing line portion 5
It is preferable that b be thicker in consideration of over-etching.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明に係る半導体装置によれば、ダイ
シングライン部の一部に絶縁膜を残す構造としたので、
CF4系ガスによるエツチングの際マスクとなってダイ
シングライン部での基板荒れを防止する上、これに起因
する光学系膜厚測定装置での測定不能の不都合を回避で
き、製品の品質信顛性を向上できる効果がある。
As described above, according to the semiconductor device according to the present invention, since the insulating film is left in a part of the dicing line part,
It acts as a mask during etching with CF4 gas and prevents substrate roughness at the dicing line, and also avoids the inconvenience of being unable to measure with an optical film thickness measurement device due to this, improving product quality reliability. There is an effect that can be improved.

さらにこの発明に係る半導体装置の製造方法二こよれば
、素子形成領域の第1の絶縁膜形成時↓こ、同時にダイ
シングライン部の一部領域に第1の絶縁膜を残すように
したので、構造を複雑にしたり、工程数を増やすことな
く、ダイシングライン部で高精度5高信転性に膜厚管理
を行うことができる構造が得られるという効果がある。
Furthermore, according to the method for manufacturing a semiconductor device according to the present invention, when forming the first insulating film in the element formation region, the first insulating film is simultaneously left in a part of the dicing line portion. This has the effect of providing a structure in which film thickness can be controlled with high precision and high reliability at the dicing line portion without complicating the structure or increasing the number of steps.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例の半導体装置のダイシング
ライン部の構造を示す断面図、第2図(a)〜(C)は
第1図に示す半導体装置の製造工程を示す断面図、第3
図は従来の半導体装置のダイシングライン部の断面図、
第4図(a)〜(C)は従来の半導体装置の製造工程を
示す断面図である。 図において、1は基板、2aは第1の絶縁膜、2bはダ
イシングライン部5に形成された第1の絶縁膜、3は第
1の配線膜、4は第2の絶縁膜、5はダイシングライン
部、6は基板荒れ、7aは光学系膜厚測定器の入射光、
7bは光学系膜厚測定器の反射光、8は素子部である。 なお図中同一符号;ま同−又は相当部分を示す。
FIG. 1 is a cross-sectional view showing the structure of a dicing line portion of a semiconductor device according to an embodiment of the present invention, and FIGS. 2(a) to (C) are cross-sectional views showing the manufacturing process of the semiconductor device shown in FIG. Third
The figure is a cross-sectional view of the dicing line part of a conventional semiconductor device.
FIGS. 4A to 4C are cross-sectional views showing the manufacturing process of a conventional semiconductor device. In the figure, 1 is a substrate, 2a is a first insulating film, 2b is a first insulating film formed in the dicing line portion 5, 3 is a first wiring film, 4 is a second insulating film, and 5 is a dicing film. Line part, 6 is substrate roughness, 7a is incident light of optical film thickness measuring device,
Reference numeral 7b indicates reflected light from an optical film thickness measuring device, and 8 indicates an element section. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (2)

【特許請求の範囲】[Claims] (1)半導体基板上にダイシングライン部を備えた半導
体装置において、 前記ダイシングライン部の一部の基板上に絶縁膜が形成
され、 該絶縁膜は後工程のエッチングガスから基板を保護して
基板表面を平坦に保ち、該絶縁膜部での光照射による膜
厚測定を可能とするものであることを特徴とする半導体
装置。
(1) In a semiconductor device having a dicing line section on a semiconductor substrate, an insulating film is formed on a part of the substrate in the dicing line section, and the insulating film protects the substrate from etching gas in a later process. 1. A semiconductor device, characterized in that the surface is kept flat and the thickness of the insulating film can be measured by irradiating the insulating film with light.
(2)半導体基板上の素子形成領域に第1の絶縁膜を形
成すると同時に、ダイシングライン部の一部の領域に該
第1の絶縁膜を形成する工程と、全面に金属薄膜を形成
後、エッチングにより前記素子形成領域の第1の絶縁膜
上にのみこれを残す工程と、 全面に第2の絶縁膜を形成する工程と、 前記ダイシングライン部の第1の絶縁膜上で、光学機器
による前記第2の絶縁膜の膜厚測定を行う工程とを有す
ることを特徴とする半導体装置の製造方法。
(2) forming a first insulating film in the element formation region on the semiconductor substrate and simultaneously forming the first insulating film in a part of the dicing line portion; and after forming a metal thin film on the entire surface; a step of leaving it only on the first insulating film in the element formation region by etching; a step of forming a second insulating film on the entire surface; and a step of etching the first insulating film on the dicing line portion using an optical device. A method for manufacturing a semiconductor device, comprising the step of measuring the thickness of the second insulating film.
JP22548890A 1990-08-27 1990-08-27 Semiconductor device and manufacture thereof Pending JPH04106950A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22548890A JPH04106950A (en) 1990-08-27 1990-08-27 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22548890A JPH04106950A (en) 1990-08-27 1990-08-27 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH04106950A true JPH04106950A (en) 1992-04-08

Family

ID=16830110

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22548890A Pending JPH04106950A (en) 1990-08-27 1990-08-27 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH04106950A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8274080B2 (en) 2008-10-24 2012-09-25 Samsung Electronics Co., Ltd. Semiconductor wafer including guard ring patterns and process monitoring patterns

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8274080B2 (en) 2008-10-24 2012-09-25 Samsung Electronics Co., Ltd. Semiconductor wafer including guard ring patterns and process monitoring patterns

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