JPH0410581A - Optical position detection semiconductor device - Google Patents

Optical position detection semiconductor device

Info

Publication number
JPH0410581A
JPH0410581A JP2110084A JP11008490A JPH0410581A JP H0410581 A JPH0410581 A JP H0410581A JP 2110084 A JP2110084 A JP 2110084A JP 11008490 A JP11008490 A JP 11008490A JP H0410581 A JPH0410581 A JP H0410581A
Authority
JP
Japan
Prior art keywords
conductivity type
electrodes
gate
electrode
position detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2110084A
Other languages
Japanese (ja)
Other versions
JPH0766983B2 (en
Inventor
Kazuhiko Kawamura
和彦 河村
Yoji Morikawa
森川 陽二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Nippon Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Steel Corp filed Critical Nippon Steel Corp
Priority to JP11008490A priority Critical patent/JPH0766983B2/en
Publication of JPH0410581A publication Critical patent/JPH0410581A/en
Publication of JPH0766983B2 publication Critical patent/JPH0766983B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/02016Circuit arrangements of general character for the devices
    • H01L31/02019Circuit arrangements of general character for the devices for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02024Position sensitive and lateral effect photodetectors; Quadrant photodiodes

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)

Abstract

PURPOSE:To obtain a two-dimensional PSD excellent in position detection characteristic by a method wherein a field effect transistor is interposed between a second conductivity type layer region which functions as a photocurrent splitting layer and a belt-shaped electrode so as to electrically connect them together or to electrically disconnect them from each other. CONSTITUTION:When a positive voltage is applied onto a back electrode 5 on the basis of current lead-out electrodes 12, 13, 14, and 15 which are kept at the same potential to start a PSD operating, a positive voltage is applied to gate electrodes 18 and 19 to electrically separate the electrodes 12 and 13 from a current splitting layer 8, an optical position detector serves equivalent to a one-dimensional PSD, which is provided with only the lead-out electrodes 14 and 15 and detects a vertical position, and positional coordinates are accurately calculated. When the positional coordinates of a light beam in a direction vertical to it is obtained, a positive voltage is applied to gate electrodes 16 and 17 the same as above to electrically separate the electrodes 14 and 15 from the current splitting layer 8, then the optical position detector serves equivalent to a one-dimensional PSD which detects a horizontal position and positional coordinates are precisely calculated. In result, a two dimensional optical position detector excellent in characteristics can be obtained.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は半導体素子の表面に照射された入射光あるいは
放射m(以下光という)の位置を検出する光位置検出用
半導体装置に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device for optical position detection that detects the position of incident light or radiation m (hereinafter referred to as light) irradiated onto the surface of a semiconductor element. .

[従来の技術] 半導体光ビーム位置検出素子(以下PSDPositi
on 5ensitive Ditectorという)
は、半導体素子表面に照射された光ビームの位置検出を
主たる機能とする半導体センサの一種である。
[Prior art] Semiconductor optical beam position detection element (hereinafter referred to as PSDPositi)
on 5ensistive Detector)
is a type of semiconductor sensor whose main function is to detect the position of a light beam irradiated onto the surface of a semiconductor element.

PSDによる光ビーム位置検出の原理は、半導体表面に
おけるLateral Photo Effectを利
用したもので、その概略は以下の通りである。
The principle of light beam position detection by PSD utilizes lateral photo effect on the semiconductor surface, and its outline is as follows.

即ち、この素子に入射してくる光のエネルギーによって
半導体素子の中に電流か生成され、この電流か素子端部
に少くとも二つ以上設けられた電極に向って流れる際に
、その電流の大きさか電極までの距離に反比例して変る
ため、発生する光電流の大きさを各電極において別々に
測り、簡単な演算を行えば、入射光ビーム位置を知るこ
とかてきる。
In other words, a current is generated in the semiconductor device by the energy of the light incident on the device, and when this current flows toward at least two or more electrodes provided at the end of the device, the magnitude of the current increases. Since it changes in inverse proportion to the distance to the inverted electrode, the incident light beam position can be determined by measuring the magnitude of the generated photocurrent at each electrode separately and performing a simple calculation.

第6図(a)は従来のPSDを説明するための平面図、
同図(b)は同図(a)のB−BIIr面図である。第
6図において、低濃度のn−型半導体ウェハ31の第一
面にP型層32の正方形33の部分を形成し、この正方
形33を受光面とし、このp型の正方形33の端部の対
向する2辺に沿って高濃度のp″″領域34.35を形
成し、p1領域34.35の表面に金属電極37.38
を設けて出力電極とし、この電極以外の正方形33から
なる第1面上に透明な絶縁層36か形成されている。そ
して、n−型半導体ウェハ1の第1面の裏側の第2面に
n3層39を形成し、このn′″層39の一部に電極4
0か設けである。
FIG. 6(a) is a plan view for explaining the conventional PSD,
The same figure (b) is a B-BIIr plane view of the same figure (a). In FIG. 6, a square 33 of a P-type layer 32 is formed on the first surface of a low-concentration n-type semiconductor wafer 31, and this square 33 is used as a light-receiving surface. A high concentration p'' region 34.35 is formed along two opposing sides, and a metal electrode 37.38 is formed on the surface of the p1 region 34.35.
is provided as an output electrode, and a transparent insulating layer 36 is formed on the first surface of the square 33 other than this electrode. Then, an n3 layer 39 is formed on the second surface behind the first surface of the n-type semiconductor wafer 1, and an electrode 4 is formed on a part of this n'' layer 39.
It is set to 0.

この結果、第6図(a)、(b)のPSDは受光面の中
心を原点0とし、電極のない2辺41゜42に並行にX
軸を、電極37.38に並行にY軸をとり、電極37と
38の間隔を2Lとすると受光面の点Q(x、y)に点
状の光か入射したとき各電極37.38に流れる電流り
、I8は、IT +r、=I。
As a result, the PSD in Figures 6(a) and (b) has the origin 0 at the center of the light-receiving surface, and the X
If the Y-axis is parallel to the electrodes 37.38, and the distance between the electrodes 37 and 38 is 2L, then when a point of light is incident on the point Q (x, y) of the light receiving surface, each electrode 37.38 The flowing current, I8, is IT +r, =I.

とすると、 I 7= I o(l  x/ L) / 2I a 
” I o  (1+ X / L ) / 2となり
、 Ia   I7= Io  ” x/Lx−L (18
IT )/IO から、位置座標Xは x=L (Ia  IT)/ (Ia +I7)”−”
 (+)から求められる。
Then, I 7 = I o (l x / L) / 2I a
"Io (1+X/L)/2, and Ia I7=Io"x/Lx-L (18
From IT)/IO, the position coordinate X is x=L (Ia IT)/(Ia +I7)"-"
Determined from (+).

また、第6図(c)に示すように、PSDの2層33上
に、電極37.38の辺とは異る2辺41.42に沿っ
て対向する高濃度P″″″領域びその表面に金属電極4
3.44を設けて、同様な原理てy座標を求めることに
より2次元PSDとして機能させることか可能である。
Further, as shown in FIG. 6(c), on the two layers 33 of the PSD, there are high concentration P'''' regions facing each other along two sides 41.42 different from the sides of the electrodes 37.38, and the surface thereof. metal electrode 4
It is possible to function as a two-dimensional PSD by providing 3.44 and determining the y-coordinate using the same principle.

[発明か解決しようとする課題] しかしながら、この2次元PSDの場合には、電極37
.38および電極41.42か相互に影響を及ぼし合い
、すなわち、例えばX方向の位置を求めるのに用いる電
流I6.I7の大きさか電極43.44の影響を受け、
その度合か光ビームのY方向の入射位置によって変化す
るため、位置座標Xかもはや(1)式によっては表され
ず、その結果、位置検出特性か第4図(b)に示すよう
に、光ビーム位置を中心部で広く、周辺部て狭く検出す
る非直線的な光位置検出特性を示すという問題をもって
いた。
[Problem to be solved by the invention] However, in the case of this two-dimensional PSD, the electrode 37
.. 38 and electrodes 41.42 influence each other, i.e. the current I6.38 used for determining the position in the X direction, for example. Influenced by the size of I7 or electrodes 43.44,
Since the degree changes depending on the incident position of the light beam in the Y direction, the position coordinate X can no longer be expressed by equation (1), and as a result, the position detection characteristic The problem was that the beam position was detected broadly at the center and narrowly at the periphery, exhibiting non-linear optical position detection characteristics.

二次元光位置検出器におけるこのような非直線性の問題
を改善するために、雑誌「光学」第12巻第5号(19
83年)367〜373頁に記述されているように、電
流分割層を表面と裏面にもつ両面分割型PSDと、Ge
arの提案による、分割抵抗面の周辺を特定の抵抗値を
持つ線抵抗て囲んだ、通称ビンクツション型PSDか考
案され既に市販されている。
In order to improve such non-linearity problems in two-dimensional optical position detectors, the magazine "Optics" Vol. 12 No. 5 (19
1983), pages 367-373, a double-sided split type PSD with current splitting layers on the front and back sides and a Ge
A so-called vinction type PSD, in which a dividing resistor surface is surrounded by a wire resistor having a specific resistance value, has been devised and is already on the market, as proposed by Ar.

しかしながら、前者は検出器の漏れ電流が大きい2枚の
均一性の高い分割抵抗層を必要とするので、製作歩留り
か低いという欠点を持つ。
However, the former method requires two highly uniform divided resistance layers with a large leakage current of the detector, and therefore has the disadvantage of a low manufacturing yield.

また、後者は分割抵抗層の面抵抗と線抵抗の比率を厳密
に一致させる必要があることから、製作か難しく、一致
度か悪いと光位置検出特性が劣化する問題点を持ってい
る。
In addition, the latter method is difficult to manufacture because it is necessary to strictly match the ratio between the sheet resistance and the line resistance of the divided resistance layer, and there is a problem that the optical position detection characteristics deteriorate if the matching is poor.

本発明は上記問題点を解決し、位置検出特性の良い2次
元PSDを提供することを目的とする。
The present invention aims to solve the above problems and provide a two-dimensional PSD with good position detection characteristics.

[課題を解決するための手段] 本発明は、結晶質半導体の第一導電型基板。[Means to solve the problem] The present invention relates to a first conductivity type substrate made of a crystalline semiconductor.

該基板の第一面の中心領域に形成された第二導電型層、
該第二導電型層の周辺端部あるいは周辺端部に隣接する
第一導電型基板第一面上に、辺に沿って形成された対向
する二対の帯状電極、および第一導電型基板の第二面に
形成された電極を基本構造とする二次元光位置検出装置
において、光電流分割層として機能する第二導電型層領
域と、該帯状電極との間に電界効果トランジスタを介在
させ、両者を電気的に連結あるいは遮断可能とし、各対
向電極間の影響をなくし、上記問題点を解決したもので
ある。
a second conductivity type layer formed in the central region of the first surface of the substrate;
two pairs of opposing strip-shaped electrodes formed along the sides on the peripheral edge of the second conductivity type layer or the first surface of the first conductivity type substrate adjacent to the peripheral edge; In a two-dimensional optical position detection device whose basic structure is an electrode formed on a second surface, a field effect transistor is interposed between a second conductivity type layer region functioning as a photocurrent splitting layer and the strip electrode, The above problems are solved by making it possible to electrically connect or disconnect the two, thereby eliminating the influence between the opposing electrodes.

[作用] 以上説明したように、本発明により、従来大きな位置検
出の非直線性を有していた、表面分割型二次元光位置検
出器の特性か格段に改善される。
[Operation] As described above, the present invention significantly improves the characteristics of the surface-divided two-dimensional optical position detector, which conventionally had large non-linearity in position detection.

従来型の素子に対して、付加した構造か単純なため製造
プロセスの追加か少く、また、付加する機能がアナログ
的ではなく、オン/オフのデジタル的機能であるため、
設計パラメータとプロセスパラメータの許容範囲か広く
製作も容易である。
Compared to conventional elements, the added structure is simple, so there are few additional manufacturing processes, and the added functions are not analog but digital on/off functions.
The design parameters and process parameters have a wide allowable range, and manufacturing is easy.

[実施例] 第1図はこの発明の一実施例であるPSDの構造を示し
た図で、同図(a)は平面図、同図(b)は同図(a)
のA−A断面図である。
[Example] Fig. 1 is a diagram showing the structure of a PSD which is an embodiment of the present invention, in which (a) is a plan view, and (b) is a plan view of the PSD.
It is an AA sectional view of.

第1図において、1は第一導電型基板としてのn型Si
単結晶基板、2は第二導電型層としてのP型層、13は
電流取出し用金属電極、4は電流取出し用金属電極13
かp型層2と良好な電気的接触を得るための低抵抗10
層、5は裏面側電極用低抵抗n+層、6はフィールド酸
化膜、18゜19は電圧印加用金属電極からなるゲート
電極。
In FIG. 1, 1 is an n-type Si substrate as a first conductivity type substrate.
A single crystal substrate, 2 a P-type layer as a second conductivity type layer, 13 a metal electrode for current extraction, 4 a metal electrode 13 for current extraction
low resistance 10 to obtain good electrical contact with the p-type layer 2
5 is a low-resistance n+ layer for the backside electrode, 6 is a field oxide film, and 18.degree. 19 is a gate electrode consisting of a metal electrode for voltage application.

7は絶縁膜である。ゲート電極19およびp型層2と絶
縁膜7のうち10で示される領域か電界効果トランジス
タ(以下FETという)を形成し、p型層2の8に示す
電流分割層領域と、9て示される電流取出し電極領域を
電気的に連結あるいは遮断可能なスイッチとして機能す
る。即ち、図に示す構造の場合、トランジスタはデプレ
ッション型FET特性を示し、ゲート電極19に正の電
圧を印加することにより、ゲート電極19の直下のp型
層2の領域か高抵抗化し、8と9の領域か電気的に遮断
される。
7 is an insulating film. A field effect transistor (hereinafter referred to as FET) is formed between the gate electrode 19, the p-type layer 2, and the region indicated by 10 of the insulating film 7, and the current dividing layer region indicated by 8 of the p-type layer 2 and the current dividing layer region indicated by 9. It functions as a switch that can electrically connect or disconnect the current extraction electrode area. That is, in the case of the structure shown in the figure, the transistor exhibits depletion type FET characteristics, and by applying a positive voltage to the gate electrode 19, the region of the p-type layer 2 directly under the gate electrode 19 becomes highly resistive, and becomes 8 and 8. Area 9 is electrically cut off.

即ち、第1図において、同電位に保たれた帯状電極であ
る電流取出し用の電極12,13゜14.15を基準に
して裏面電極5に正の電圧を印加し、装置をPSDとし
て動作させる場合に於て、帯状電極であるゲート電極1
8と19に正の電圧を印加することにより、電極12と
13が電流分割層8から電気的に切離され、光発生電流
かこれら電極に流出することがないので、光位置検出装
置は電流取出し電極として14と15だけを持つ、図の
垂直方向の位置を検出する1次元のPSDと等価となり
、電極12と13による悪影響のない、(1)式て位置
座標か正確に計算される特性を示す。光ビームの、これ
と直交する方向の位置座標を求めるには、同様に帯状電
極であるゲート電極16と17に正の電圧を印加すれば
、電極14と15が8から電気的に切離された光位置検
出装置は、電流取出し電極として12と13だけを持つ
、図の水平方向の位置を検出する1次元のPSDと等価
となり電極14と15による悪影響のない、(1)式で
位置座標か正確に計算される特性を示す。
That is, in FIG. 1, a positive voltage is applied to the back electrode 5 with reference to the current extraction electrodes 12, 13, 14, 15, which are strip-shaped electrodes kept at the same potential, and the device is operated as a PSD. In this case, the gate electrode 1 is a strip-shaped electrode.
By applying a positive voltage to 8 and 19, electrodes 12 and 13 are electrically decoupled from current splitting layer 8 and no photogenerated current can flow into these electrodes, so that the optical position sensing device It is equivalent to a one-dimensional PSD that has only 14 and 15 as extraction electrodes and detects the position in the vertical direction of the figure, and there is no adverse effect from electrodes 12 and 13, and the position coordinates can be calculated accurately using equation (1). shows. To find the positional coordinates of the light beam in the direction perpendicular to it, apply a positive voltage to the gate electrodes 16 and 17, which are strip-shaped electrodes, to electrically separate electrodes 14 and 15 from 8. The optical position detection device shown in FIG. or accurately calculated properties.

従って、対向するゲート電極の組に交互に正の電圧を印
加して、一対の電流取出し電極を電気的に切離す一方、
電気的に連結されている電流取出し電極からの電流から
位置情報を交互に求めることにより、正確な二次元位置
座標を得ることかできる。
Therefore, while applying a positive voltage alternately to the pair of opposing gate electrodes to electrically disconnect the pair of current extraction electrodes,
Accurate two-dimensional position coordinates can be obtained by alternately obtaining position information from currents from electrically connected current extraction electrodes.

第4図(a)は、このようにして動作させた本発明によ
る2次元PSDの、格子模様状に光ビームを振った場合
の特性を評価した時の結果である。
FIG. 4(a) shows the results of evaluating the characteristics of the two-dimensional PSD according to the present invention operated in this manner when a light beam is swung in a lattice pattern.

第4図(b)は、同し装置をゲート電極に電圧を印加し
ないて、従来型素子と同様の動作をさせたときの、同様
な特性の評価結果を示す。第4図(b)から分るように
、中心部分て広く周辺部分て狭い位置検出特性の非直線
性が、同図(a)では著しく小さくなり、格子模様の間
隔か中心部。
FIG. 4(b) shows the evaluation results of similar characteristics when the same device was operated in the same manner as the conventional device without applying a voltage to the gate electrode. As can be seen from FIG. 4(b), the nonlinearity of the position detection characteristic, which is wide at the center and narrow at the periphery, becomes significantly smaller in FIG.

周辺部とも一様で、この装置の場合、非直線性は2桁以
上改善されている。
It is also uniform in the peripheral area, and in the case of this device, the nonlinearity has been improved by more than two orders of magnitude.

以上の説明は、FETとしてテブレ、yジョン型の場合
、さらにそのうちても構造か単純て製作か容易な、光電
流分割層をそのままソース、ドレイン、チャネルとして
利用する型について記述したが、ドレイン、チャネルの
うち、1つ以上を光電流分割層とは独立に形成するデプ
レッション型FETを採用することも勿論可能である。
The above description has been made of the Tebre and Y-John type FETs, as well as the type that uses the photocurrent splitting layer as it is as the source, drain, and channel, which has a simple structure and is easy to manufacture. Of course, it is also possible to employ a depletion type FET in which one or more of the channels is formed independently of the photocurrent splitting layer.

この構造の一例を第2図に示す。この例てはチャネル領
域20のみソース領域と同様に光電流分割層をそのまま
利用し、ドレインが専用の低抵抗p+領領域2から構成
されている。
An example of this structure is shown in FIG. In this example, only the channel region 20 utilizes the photocurrent dividing layer as it is in the same way as the source region, and the drain is composed of a dedicated low resistance p+ region 2.

また、FETとしてエンハンスメント型を用いることも
勿論可能である。
Furthermore, it is of course possible to use an enhancement type FET.

この構造の一例を第3図に示す。この例ては、ソース領
域21は光電流分割層をそのまま利用しチャネル領域2
3はn型基板lか利用され、ドレインが専用の低抵抗p
+領領域2から構成されている。この場合には、ゲート
電極に電圧を印加しない場合に電気的接続が実効的にな
い電流分割領域と電流取出し電極が、負の電圧印加によ
り電気的に連結され、ゲート電極に印加する電圧の向き
か逆になるが、機能上はデプレッション型と同等の動作
をさせることか可能となる。
An example of this structure is shown in FIG. In this example, the source region 21 uses the photocurrent splitting layer as is, and the channel region 2
3 uses an n-type substrate l, and the drain is a dedicated low-resistance p
It consists of + territory area 2. In this case, the current dividing region and the current extraction electrode, which have no effective electrical connection when no voltage is applied to the gate electrode, are electrically connected by applying a negative voltage, and the direction of the voltage applied to the gate electrode is Although it is the opposite, functionally it is possible to perform the same operation as the depression type.

さらに、FETのケートとしてポリシリコンゲートな、
また、FETとしてショットキーケート型FET、Pn
接合型FETを用いることも勿論可能である。
In addition, a polysilicon gate is used as the FET gate.
In addition, Schottky Cate type FET, Pn
Of course, it is also possible to use a junction type FET.

また、以上の説明はn型基板を用いる場合について記述
したが、P型基板を用いることも勿論可能である。この
場合、以上の説明においてn型。
Further, although the above description has been made regarding the case where an n-type substrate is used, it is of course possible to use a p-type substrate. In this case, the above description refers to n-type.

P型を入換え、必要に応じて電圧の極性を逆転すれば良
い。
All you have to do is replace the P type and reverse the voltage polarity if necessary.

さらに、この発明における考え方は、素材として結晶質
てあればSiに限定されるものてはなく、Ge等の単元
素半導体、GaAs、InPに代表される■−v族化合
物半導体、更にはこれらの元素の一部を周期律表の同族
の元素て置換えた半導体、およびCdTe、ZnSに代
表されるII−VI族化合物半導体、更にはこれらの元
素の一部を周期律表の同族の元素で置換えた半導体を用
いることも勿論可能である。
Furthermore, the idea in this invention is not limited to Si as long as the material is crystalline, but also single-element semiconductors such as Ge, ■-V group compound semiconductors represented by GaAs and InP, and even these Semiconductors in which some of the elements are replaced with elements in the same group of the periodic table, and group II-VI compound semiconductors represented by CdTe and ZnS, and furthermore, in which some of these elements are replaced with elements in the same group in the periodic table. Of course, it is also possible to use other semiconductors.

以下に製造方法の一例を第1図を用いて説明する。An example of the manufacturing method will be described below with reference to FIG.

第1図において、1はn型Si単結晶基板である。湿式
および乾式熱酸化により、6000人の酸化膜を形成し
、表面のp型層2となる領域の酸化膜と裏面の酸化膜を
フォトエッチンクにより除去して、2000人の酸化膜
を乾式酸化により形成し、p型層2となる部分にボロン
を2.5×1012/cm2の濃度にイオン注入する。
In FIG. 1, 1 is an n-type Si single crystal substrate. A 6,000-layer oxide film was formed by wet and dry thermal oxidation, and the oxide film in the area that will become the p-type layer 2 on the front surface and the oxide film on the back surface was removed by photoetching, and the 2,000-layer oxide film was dry-oxidized. Boron ions are implanted into the portion that will become the p-type layer 2 at a concentration of 2.5×10 12 /cm 2 .

さらにフォトエッチンクによりフォトレジストをパター
ニングしてこれに窓を開け、ボロンを3、 ox l 
O”/c■2の濃度にイオン注入して、低抵抗p+層4
を形成する。裏面にリンを3.Ox 1015/cm2
の濃度にイオン注入して裏面側電極用低抵抗n゛層5を
形成する。低抵抗p゛層4の上部の酸化膜をエツチング
により除去する0次に1000°Cてアニールし、注入
不純物を活性化する。エツチングにより2000人の酸
化膜厚を1000人まて薄くする。アルミニウムを表面
前面に蒸着し、フォトエツチングにより電流取出し用電
極13と、電圧印加用のゲート電極19を形成し、熱処
理してアルミニウムをシンターする。
Furthermore, the photoresist was patterned by photoetching, a window was opened in it, and boron was added at 3 ox l.
Ions are implanted to a concentration of O''/c■2 to form a low resistance p+ layer 4.
form. 3. Add phosphorus on the back side. Ox 1015/cm2
A low resistance n' layer 5 for the back side electrode is formed by ion implantation to a concentration of . The oxide film on the upper part of the low-resistance p' layer 4 is removed by etching, and the implanted impurity is activated by annealing at 1000°C. The oxide film thickness of 2,000 layers is reduced by 1,000 layers by etching. Aluminum is vapor deposited on the front surface, a current extraction electrode 13 and a voltage application gate electrode 19 are formed by photoetching, and the aluminum is sintered by heat treatment.

最後にこうして一枚のウェハ上に作られた多数のPSD
チップを個々のチップに分割し、透明ガラス窓付きケー
スにマウントして配線を施し完成する。
Finally, a large number of PSDs were created on one wafer.
The chip is divided into individual chips, mounted in a case with a transparent glass window, and completed with wiring.

次に、本発明装置の動作について説明する。Next, the operation of the device of the present invention will be explained.

第1図(b)において、ゲート電極19およびp型層2
と絶縁膜7のうち10て示される領域かFETを形成し
、P型層2の8に示す電流分割領域と9て示される電流
取出し電極領域を電気的に連結あるいは遮断可能なスイ
ッチとして機能する。即ち、図に示す構造の場合、FE
Tはデプレッション型FET特性を示し、ゲート電極1
9に正の電圧を印加することによりp型層2のうち、ケ
ート電極19の直下のp型層2の領域の可動電荷が空乏
化することにより高抵抗化し、8と9の領域か電気的に
遮断される。
In FIG. 1(b), the gate electrode 19 and the p-type layer 2
A region indicated by 10 of the insulating film 7 forms an FET, and functions as a switch that can electrically connect or disconnect the current dividing region indicated by 8 and the current extraction electrode region indicated by 9 of the P-type layer 2. . That is, for the structure shown in the figure, FE
T indicates depletion type FET characteristics, and gate electrode 1
By applying a positive voltage to 9, the movable charges in the region of the p-type layer 2 directly under the gate electrode 19 are depleted, resulting in high resistance, and the regions 8 and 9 become electrically is blocked by.

第5図は、ゲート電極19に電圧を印加したときにp型
層2に流れる電流が変化する様子を示す。即ち、ケート
電極19の電圧かOvのとき、97u、Aの電流か12
.OVては殆ど0になる。
FIG. 5 shows how the current flowing through the p-type layer 2 changes when a voltage is applied to the gate electrode 19. That is, when the voltage of the gate electrode 19 is Ov, the current of 97u, A is 12
.. OV is almost 0.

この時のp型層2の実効的抵抗値は前者の場合10.3
にΩ、後者の場合294MΩと測定され、後者の場合十
分に8と9の間か電気的に遮断されていることが分る。
In this case, the effective resistance value of the p-type layer 2 is 10.3 in the former case.
In the latter case, it was measured to be 294 MΩ, and it can be seen that in the latter case, it is sufficiently electrically isolated between 8 and 9.

第1図において、同電位に保たれた電流取出し電極12
,13,14.15を基準にして(以下電圧はこの電圧
を基準にして測った値を用いる)裏面電極5に正の電圧
、例えば、6■を印加し、光ビームを照射すると、発生
した光電流は電流取出し電極12,13,14.15に
光ビームの位置に応じて分割されて流れる。この時ゲー
ト電極18と19に正の電圧、例えば、12Vを印加す
ると、p型電流分割層のこれらのゲート電極直下の領域
が高抵抗化し、電極12と13か電流分割層8から電気
的に切離され、光発生電流かこれら電極に流出すること
がないので、光位置検出装置は電流取出し電極として、
14と15だけを持つ図の垂直方向の位置を検出する1
次元のPSDと等価となり、電極12と13による悪影
響のない、(1)式で位置座標か正確に計算される特性
を示す。
In FIG. 1, the current extraction electrode 12 kept at the same potential
, 13, 14.15 (hereinafter, voltages are measured using this voltage as a reference) When a positive voltage, for example 6■, is applied to the back electrode 5 and a light beam is irradiated, the following occurs. The photocurrent flows through the current extraction electrodes 12, 13, 14, and 15 divided according to the position of the light beam. At this time, when a positive voltage, for example 12V, is applied to the gate electrodes 18 and 19, the regions of the p-type current splitting layer directly under these gate electrodes become highly resistive, and the electrodes 12 and 13 are electrically disconnected from the current splitting layer 8. Since the optical position detection device is disconnected and no photogenerated current flows to these electrodes, the optical position detection device can be used as a current extraction electrode.
1 to detect the vertical position of a figure with only 14 and 15
It is equivalent to the dimensional PSD, has no adverse effects from the electrodes 12 and 13, and exhibits a characteristic in which the position coordinates can be accurately calculated using equation (1).

次にゲート電極18と19をOVに戻し、ゲート電極1
6と17に正の電圧12Vを印加すれば、同様な機構で
電極14と15か8から電気的に切離され、光位置検出
装置は電流取出し電極として12と13だけを持つ1図
の水平方向の位置を検出する1次元のPSDと等価とな
り、電極14と15による悪影響のない、(1)式で位
置座標か正確に計算される特性を示す。
Next, gate electrodes 18 and 19 are returned to OV, and gate electrode 1
If a positive voltage of 12V is applied to electrodes 6 and 17, they are electrically disconnected from electrodes 14 and 15 or 8 by a similar mechanism, and the optical position detection device has only 12 and 13 as current extraction electrodes. It is equivalent to a one-dimensional PSD that detects the position in the direction, and exhibits a characteristic that the position coordinates can be accurately calculated using equation (1) without any adverse effects from the electrodes 14 and 15.

このように、対向するゲート電極の組に第7図に示すよ
うな交番電圧を交互に印加して一対の電流取出し電極を
電気的に切離す一方、電気的に連結されている電流取出
し電極からの電流から位置情報を交互に求めることによ
り、正確な二次元位置座標を得ることがてきる。
In this way, alternating voltages as shown in FIG. 7 are applied alternately to the pair of opposing gate electrodes to electrically separate the pair of current extraction electrodes, while at the same time disconnecting them from the electrically connected current extraction electrodes. By alternately obtaining position information from the currents, accurate two-dimensional position coordinates can be obtained.

第4図(a)は、このようにして動作させた本発明によ
る電流取出し電極間距離4.8■■をもつ正方形の2次
元PSDの1面積4×4■■2の範囲て光ビームを50
gm間隔て格子模様状に振った場合の位置検出特性を示
す。第4図(b)は同し装置をゲート電極に電圧を印加
しないて従来型素子と同様の動作をさせた時の同様な特
性を示す。
FIG. 4(a) shows a light beam emitted over an area of 4×4×2 of a square two-dimensional PSD with a distance of 4.8×2 between the current extraction electrodes according to the present invention operated in this manner. 50
The position detection characteristics are shown when the graph is swung in a grid pattern at intervals of gm. FIG. 4(b) shows similar characteristics when the same device is operated in the same manner as the conventional device without applying a voltage to the gate electrode.

第4図から分るように(b)に見られるような中心部分
て広く、周辺部分て狭い位置検出特性の非直線性が、(
a)ては著しく小さくなり、格子模様の間隔か中心部9
周辺部ともほぼ一様になっていることか分る。図に示す
素子の場合、中心を原点にして水平にX軸、垂直にY軸
をとった時、4■■の範囲内における両軸上の非直線性
は、約7%から0.05%に2桁以上改善されている。
As can be seen from Figure 4, the non-linearity of the position detection characteristic, which is wide in the center and narrow in the periphery as seen in (b), is caused by (
a) It becomes noticeably smaller, and the spacing of the checkered pattern or the central part 9
It can be seen that the surrounding areas are almost uniform. In the case of the element shown in the figure, when the center is the origin and the X axis is horizontal and the Y axis is vertical, the nonlinearity on both axes within the range of 4■■ is approximately 7% to 0.05%. has improved by more than two orders of magnitude.

以上の説明は、FETとしてデプレッション型の場合、
さらにそのうちても構造か単純て製作か容易な、光電流
分割層をそのままソース、ドレイン、チャネルとして利
用する型について記述したが、ドレイン、チャネルの1
つ以上を光電流分割層とは独立に形成するデプレッショ
ン型FETを採用することも勿論可能である。
The above explanation is for depression type FET.
Furthermore, we have described a type that uses the photocurrent splitting layer as it is as the source, drain, and channel, which has a simple structure and is easy to manufacture.
Of course, it is also possible to employ a depletion type FET in which two or more photocurrent splitting layers are formed independently.

この構造の一例を第2図に示す。この例ては、光電流分
割層2の周辺部をソースおよびチャネルにそのまま利用
し、ドレインは専用の低抵抗P゛層22から構成されて
いる。この構造は、実施例1て説明した製造方法におい
て、低抵抗p゛層4を形成するための酸化膜のフォトエ
ツチングのパターンを第2図の低抵抗29層22に変更
することにより製作した。
An example of this structure is shown in FIG. In this example, the peripheral portion of the photocurrent splitting layer 2 is used as it is for the source and channel, and the drain is constructed from a dedicated low-resistance P layer 22. This structure was manufactured by changing the photoetching pattern of the oxide film for forming the low-resistance p layer 4 to the low-resistance 29 layer 22 shown in FIG. 2 in the manufacturing method described in Example 1.

光ビーム位置検出特性は第4図(a)とほぼ同様な結果
が得られた。
Regarding the light beam position detection characteristics, almost the same results as those shown in FIG. 4(a) were obtained.

さらに、FETとしてエンハンスメント型を用いること
も勿論可能である。この構造の一例を第3図に示す。
Furthermore, it is of course possible to use an enhancement type FET. An example of this structure is shown in FIG.

この例では、ソース領域21には光電流分割層2の周辺
部をそのまま利用し、チャネル領域23はn型基板かそ
のまま利用され、ドレインは専用の低抵抗p+層22か
ら構成されている。この場合には、ゲート電極に電圧を
印加しない場合に、電気的接続か実効的にない電流分割
領域と電流取出し電極間が、負の電圧印加により電気的
に連結され、デプレッション型と機能上は同等の動作を
させることか可能となる。この構造は、実施例2て説明
した製造方法において、P型層2を形成するための酸化
膜のフォトエツチングのパターンを第3図のp型層2の
ように、周辺部をソース領域21に留める位置に変更す
ることにより製作した。光ビーム位置検出特性は第4図
(a)とほぼ同様な結果が得られた。
In this example, the peripheral part of the photocurrent splitting layer 2 is used as it is for the source region 21, the n-type substrate is used as it is for the channel region 23, and the drain is composed of a dedicated low-resistance p+ layer 22. In this case, when no voltage is applied to the gate electrode, there is no effective electrical connection between the current dividing region and the current extraction electrode, but the current dividing region and the current extraction electrode are electrically connected by applying a negative voltage, and are functionally different from the depression type. It is possible to perform the same operation. In the manufacturing method described in Example 2, this structure is made by changing the photo-etching pattern of the oxide film for forming the P-type layer 2 so that the peripheral part is placed in the source region 21 as shown in the p-type layer 2 in FIG. I made it by changing the fastening position. Regarding the light beam position detection characteristics, almost the same results as those shown in FIG. 4(a) were obtained.

[発明の効果] 以上説明したように、本発明により、従来大きな位置検
出の非直線性を有していた表面分割型二次元光位置検出
器の特性か格段に改善された。
[Effects of the Invention] As explained above, according to the present invention, the characteristics of the surface-divided two-dimensional optical position detector, which conventionally had large non-linearity in position detection, have been significantly improved.

二次元光位置検出器における非直線性の問題を改善する
ために、従来から考えられている電流分割層を表面と裏
面にもつ両面分割型PSDや、G e a rの提案に
よる分割抵抗面の周辺を特定の抵抗値を持つ線抵抗て囲
んだ、通称ビンクツション型PSDが、前者においては
漏れ電流が大きくなる欠点や、製作歩留りか低くなる欠
点、後者においては分割抵抗層の面抵抗と線抵抗の比率
を厳密に一致させる必要かあり、一致度か悪いと光位置
検出特性か劣化する欠点を持つのに対し、本発明による
PSDは従来型の素子に対して付加した構造か単純なた
め、製造プロセスの追加か少く、また付加する機能かア
ナロク的てはなく、オン/オフのデジタル的槻能である
ため、設計パラメータとプロセスパラメータの許容範囲
か広く、設計か簡単て製作も容易てあり、高い歩留りで
製作可能である。
In order to improve the problem of non-linearity in two-dimensional optical position detectors, we have developed a double-sided split type PSD with a current splitting layer on the front and back sides, which has been considered in the past, and a split resistor surface proposed by G.A.R. The so-called vinction type PSD is surrounded by a wire resistor with a specific resistance value, but the former has the drawbacks of large leakage current and low manufacturing yield, and the latter has the disadvantage of increasing the sheet resistance and wire resistance of the divided resistor layer. It is necessary to match the ratio exactly, and if the matching is poor, the optical position detection characteristics deteriorate, whereas the PSD according to the present invention has a simple structure added to the conventional element. There are only a few additions to the manufacturing process, and the added functions are not analog, but digital on/off capabilities, so the tolerance range for design parameters and process parameters is wide, and the design is simple and easy to manufacture. , can be manufactured with high yield.

また、副次的効果として、任意の一対のゲート電極に十
分な大きさの直流電圧を印加することにより、所望する
方向の一次元のPSDとして動作させることも可能であ
る。
Furthermore, as a side effect, by applying a DC voltage of sufficient magnitude to any pair of gate electrodes, it is possible to operate as a one-dimensional PSD in a desired direction.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例であるPSDの構造を示し
た図で、同図(a)は平面図、同図(b)は同図(a)
のA−A断面図、第2図は本発明の他の実施例であるデ
プレッション型FETを採用した構造の一例の断面図、
第3図は本発明のさらに他の実施例であるエンハンスメ
ント型FETを用いた構造の一例の断面図、第4図(a
)は本発明による2次元光位置検出装置の特性を評価し
た吟の結果を示す図、同図(b)は同し装置をゲート電
極に電圧を印加しないて、従来型素子と同様の動作をさ
せた時の特性の評価結果を示す図、第5図はゲートに電
圧を印加した時に電流分割層に流れる電流か変化する様
子を示す図、第6図(a)は従来のPSDを説明するた
めの平面図、同図(b)は同図(a)のB−B%面図、
同図(c)は同図(a)の詳細を示した図、第7図は本
発明における必要なゲート電圧波形を示す図である。 図中、 1:n型Si単結晶基板 2:P型層 4:低抵抗21層 5:裏面側電極用低抵抗n+層 6:フイールト酸化膜 7:絶縁膜 8:電流分割層領域 9.電流取出し電極領域 lO0電界効果トランジスタ領域 12.13,14,15:電流取出し電極16.17,
18,19:ゲート電極 20:チャネル用p領域 21:ソース領域 22ニドレイン用低抵抗p0領域 23:チャネル領域 32:p型層 33:P型層受光面 34.35:p”層 36:絶縁層 37.38:金属電極 39:n+層 40:電極 41.42:電極のない2辺 43.44:金属電極 代理人 弁理士 1)北 嵩 晴 第 図 第 図 (b) 第1図 (a) 第4図 (a) (b) 第 図 (b) 第 図
FIG. 1 is a diagram showing the structure of a PSD that is an embodiment of the present invention, in which (a) is a plan view, and (b) is a plan view of the same.
2 is a sectional view of an example of a structure employing a depression type FET, which is another embodiment of the present invention,
FIG. 3 is a sectional view of an example of a structure using an enhancement type FET, which is still another embodiment of the present invention, and FIG.
) is a diagram showing the results of evaluation of the characteristics of the two-dimensional optical position detection device according to the present invention, and (b) of the same diagram shows the same operation as the conventional device without applying voltage to the gate electrode. Figure 5 shows how the current flowing through the current dividing layer changes when voltage is applied to the gate. Figure 6 (a) explains the conventional PSD. A plan view of the same figure (b) is a BB% sectional view of the same figure (a),
FIG. 7(c) is a diagram showing details of FIG. 7(a), and FIG. 7 is a diagram showing necessary gate voltage waveforms in the present invention. In the figure, 1: n-type Si single crystal substrate 2: P-type layer 4: low resistance 21 layer 5: low resistance n+ layer for back side electrode 6: felt oxide film 7: insulating film 8: current dividing layer region 9. Current extraction electrode region lO0 field effect transistor region 12.13, 14, 15: current extraction electrode 16.17,
18, 19: Gate electrode 20: P region for channel 21: Source region 22 Low resistance p0 region for drain 23: Channel region 32: P type layer 33: P type layer Light receiving surface 34.35: P'' layer 36: Insulating layer 37. 38: Metal electrode 39: N+ layer 40: Electrode 41. 42: 2 sides without electrode 43. 44: Metal electrode Representative Patent attorney 1) Haru Kitatake Figure (b) Figure 1 (a) Figure 4 (a) (b) Figure (b) Figure 4

Claims (3)

【特許請求の範囲】[Claims] (1)方形の結晶質半導体の第一導電型基板、該第一導
電型基板の第一面の中心領域に形成された第二導電型層
、該第二導電型層の周辺端部あるいは周辺端部に隣接す
る第一導電型基板第一面上に、各辺に沿って形成された
対向する二対の帯状電極群、及び前記第一導電型基板の
第二面に形成された電極を基本構造とする二次元光位置
検出装置であって、光電流分割層として機能する前記第
二導電型層領域と、前記二対の帯状電極との間に電界効
果トランジスタを介在させ、両者を電気的に連結あるい
は遮断可能としたことを特徴とする光位置検出用半導体
装置。
(1) A rectangular crystalline semiconductor first conductivity type substrate, a second conductivity type layer formed in the central region of the first surface of the first conductivity type substrate, and a peripheral edge or periphery of the second conductivity type layer. Two pairs of opposing band-shaped electrode groups formed along each side on the first surface of the first conductivity type substrate adjacent to the end, and electrodes formed on the second surface of the first conductivity type substrate. A two-dimensional optical position detection device having a basic structure, in which a field effect transistor is interposed between the second conductivity type layer region functioning as a photocurrent splitting layer and the two pairs of strip electrodes, and both are electrically connected. What is claimed is: 1. A semiconductor device for optical position detection, characterized in that it can be electrically connected or interrupted.
(2)光電流分割層として機能する第二導電型層領域と
、帯状電極との間に介在させる電界効果トランジスタが
、前記第二導電型層領域の幅の全域あるいは80%以上
の幅をもつ第二導電型のソース、ドレイン、チャネルお
よびチャネル上に絶縁膜を介して形成されたゲートから
成り、ゲート電極にゲート電圧を印加しない時、ソース
、ドレイン間の抵抗が実効的に導通状態にあり、必要な
電圧をゲートに印加することにより、ソース、ドレイン
間が実効的に遮断するいわゆるデプレッション型電界効
果トランジスタであることを特徴とする請求項(1)に
記載の光位置検出用半導体装置。
(2) The field effect transistor interposed between the second conductivity type layer region functioning as a photocurrent splitting layer and the strip-shaped electrode has a width of the entire width of the second conductivity type layer region or 80% or more of the width of the second conductivity type layer region. Consists of a second conductivity type source, drain, channel, and gate formed on the channel via an insulating film, and when no gate voltage is applied to the gate electrode, the resistance between the source and drain is effectively in a conductive state. 2. The semiconductor device for optical position detection according to claim 1, wherein the semiconductor device is a so-called depletion type field effect transistor in which the source and drain are effectively cut off by applying a necessary voltage to the gate.
(3)光電流分割層として機能する第二導電型層領域と
、帯状電極との間に介在させる電界効果トランジスタが
、ゲート電極にゲート電圧を印加しない時、ソース、ド
レイン間の抵抗が実効的に導通状態にある、いわゆるデ
プレッション型電界効果トランジスタであり、光電流分
割層の周辺部が該トランジスタのソース領域、ドレイン
領域、チャネル領域を構成し、チャネル領域の上に絶縁
膜を介して形成された帯状ゲート電極とで該電界効果ト
ランジスタを構成することを特徴とする請求項(1)に
記載の光位置検出用半導体装置。(4)光電流分割層と
して機能する第二導電型層領域と、帯状電極との間に介
在させる電界効果トランジスタが、前記第二導電型層領
域の幅の全域あるいは80%以上の幅をもつ第二導電型
のソース、ドレインと、第一導電型チャネルおよびチャ
ネル上に絶縁膜を介して形成されたゲートから成り、ゲ
ート電極にゲート電圧を印加しない時、ソース、ドレイ
ン間の抵抗が実効的に遮断状態にあり、必要な電圧をゲ
ートに印加することによリソース、ドレイン間が実効的
に導通する、いわゆるエンハンスメント型電界効果トラ
ンジスタであることを特徴とする請求項(1)に記載の
光位置検出用半導体装置。
(3) When the field effect transistor interposed between the second conductivity type layer region that functions as a photocurrent splitting layer and the strip electrode has no gate voltage applied to the gate electrode, the effective resistance between the source and drain increases. It is a so-called depletion field effect transistor, which is in a conductive state when 2. The semiconductor device for optical position detection according to claim 1, wherein the field effect transistor is constituted by a band-shaped gate electrode. (4) The field effect transistor interposed between the second conductivity type layer region functioning as a photocurrent splitting layer and the strip electrode has a width of the entire width of the second conductivity type layer region or 80% or more of the width of the second conductivity type layer region. Consists of a second conductivity type source and drain, a first conductivity type channel, and a gate formed on the channel via an insulating film, and when no gate voltage is applied to the gate electrode, the effective resistance between the source and drain is The light source according to claim 1, wherein the transistor is a so-called enhancement field effect transistor, which is in a cut-off state and is effectively electrically connected between the resource and the drain by applying a necessary voltage to the gate. Semiconductor device for position detection.
JP11008490A 1990-04-27 1990-04-27 Semiconductor device for optical position detection Expired - Lifetime JPH0766983B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11008490A JPH0766983B2 (en) 1990-04-27 1990-04-27 Semiconductor device for optical position detection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11008490A JPH0766983B2 (en) 1990-04-27 1990-04-27 Semiconductor device for optical position detection

Publications (2)

Publication Number Publication Date
JPH0410581A true JPH0410581A (en) 1992-01-14
JPH0766983B2 JPH0766983B2 (en) 1995-07-19

Family

ID=14526626

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000001018A1 (en) * 1998-06-30 2000-01-06 Hamamatsu Photonics K.K. Semiconductor position sensor
EP1837918A2 (en) 2006-03-23 2007-09-26 Prüftechnik Dieter Busch Ag Photodetector assembly, measurement set-up with a photo detector assembly and method for operating a measurement set-up
US7723668B2 (en) 2006-03-23 2010-05-25 Prueftechnik Dieter Busch Ag Photodetector arrangement, measurement arrangement with a photodetector arrangement and process for operating a measurement arrangement
EP2434945B1 (en) * 2009-05-27 2018-12-19 Analog Devices, Inc. Multiuse optical sensor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000001018A1 (en) * 1998-06-30 2000-01-06 Hamamatsu Photonics K.K. Semiconductor position sensor
US6459109B2 (en) 1998-06-30 2002-10-01 Hamamatsu Photonics K.K. Semiconductor position sensor
EP1837918A2 (en) 2006-03-23 2007-09-26 Prüftechnik Dieter Busch Ag Photodetector assembly, measurement set-up with a photo detector assembly and method for operating a measurement set-up
EP1837918A3 (en) * 2006-03-23 2008-05-28 Prüftechnik Dieter Busch Ag Photodetector assembly, measurement set-up with a photo detector assembly and method for operating a measurement set-up
US7705285B2 (en) 2006-03-23 2010-04-27 Prueftechnik Dieter Busch Ag Photodetector arrangement having a semiconductor body with plural layers and transistors, measurement arrangement with a photodetector arrangement and process for operating a measurement arrangement
US7723668B2 (en) 2006-03-23 2010-05-25 Prueftechnik Dieter Busch Ag Photodetector arrangement, measurement arrangement with a photodetector arrangement and process for operating a measurement arrangement
EP2434945B1 (en) * 2009-05-27 2018-12-19 Analog Devices, Inc. Multiuse optical sensor

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