JPH04105333A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH04105333A
JPH04105333A JP2222921A JP22292190A JPH04105333A JP H04105333 A JPH04105333 A JP H04105333A JP 2222921 A JP2222921 A JP 2222921A JP 22292190 A JP22292190 A JP 22292190A JP H04105333 A JPH04105333 A JP H04105333A
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
semiconductor chip
chip
adhesion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2222921A
Other languages
Japanese (ja)
Inventor
Katsushi Terajima
克司 寺島
Kenichi Kaneda
金田 賢一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2222921A priority Critical patent/JPH04105333A/en
Publication of JPH04105333A publication Critical patent/JPH04105333A/en
Pending legal-status Critical Current

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    • HELECTRICITY
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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29075Plural core members
    • H01L2224/29078Plural core members being disposed next to each other, e.g. side-to-side arrangements
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    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
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    • H01L2224/29299Base material
    • H01L2224/29393Base material with a principal constituent of the material being a solid not provided for in groups H01L2224/293 - H01L2224/29391, e.g. allotropes of carbon, fullerene, graphite, carbon-nanotubes, diamond
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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Abstract

PURPOSE:To obtain a structure wherein selection width of resin for adhesion is widen, and characteristics such as bonding strength of a semiconductor device, relief of stress, and reduction of thermal resistance are improved, by using two or more kinds of resin for adhesion to fix a semiconductor chip. CONSTITUTION:In a semiconductor device wherein a semiconductor chip 1 is fixed on a semiconductor device substrate 2, two or more kinds of resin 41, 42 for adhesion is used at the part where the semiconductor chip 1 is mounted and fixed on a semiconductor device substrate 2. For example, the chip 1 is fixed by using two kinds of resin for adhesion. The first resin 41 for adhesion is arranged only at the lower main central part of the chip. The second resin 42 for adhesion is arranged on the lower periphery and the side surface of the chip. As the first resin 41 for adhesion, the following is used; resin for adhesion excellent in thermal conductivity whose main component is epoxy or polyimide containing, as filler, stable metal and the like of high thermal conductivity like Ag, Au, Al and C. As the second resin 42 for adhesion, the following is used; resin for adhesion wherein bond strength is large, elasticity is low, and heat resitance is high.

Description

【発明の詳細な説明】 1、半導体装置基板上に樹脂を用いて半導体チップを取
り付ける半導体装置において、半導体チップを半導体装
置基板に搭載固着する部分に二種類以上の接着用樹脂を
用いたことを特徴とする半導体装置。
[Detailed Description of the Invention] 1. In a semiconductor device in which a semiconductor chip is mounted on a semiconductor device substrate using a resin, two or more types of adhesive resins are used in the part where the semiconductor chip is mounted and fixed on the semiconductor device substrate. Characteristic semiconductor devices.

2、半導体チップ下部の主中央には、熱伝導の良い接着
用樹脂を用い、半導体チップ下部の周囲または側壁には
、接着強度が高く、弾性率が低く、且つ、耐熱性の高い
接着用樹脂を用いたことを特徴とする特許請求の範囲第
1項記載の半導体装置。
2. An adhesive resin with good thermal conductivity is used at the main center of the lower part of the semiconductor chip, and an adhesive resin with high adhesive strength, low elastic modulus, and high heat resistance is used around the lower part of the semiconductor chip or on the side walls. A semiconductor device according to claim 1, characterized in that the semiconductor device uses:

3、半導体チップ下部の主中央には、Ag、Au、A!
2またはC等の熱伝導の良いフィラーを含有した接着用
樹脂を用い、半導体チップの周囲または外周には、該フ
ィラーを含有しないか、または接着用樹脂を用いたこと
を特徴とする特許請求の範囲第1項記載の半導体装置。
3. In the main center of the lower part of the semiconductor chip, Ag, Au, A!
2 or C, etc., and the periphery or outer periphery of the semiconductor chip does not contain the filler or the adhesive resin is used. A semiconductor device according to scope 1.

発明の詳細な説明 〔産業上の利用分野〕 本発明は、半導体チップを装置基板に接着用樹脂を用い
て搭載する半導体装置に関し、半導体チップ搭載部の接
着用樹脂の構成に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which a semiconductor chip is mounted on a device substrate using an adhesive resin, and more particularly to the configuration of the adhesive resin of a semiconductor chip mounting portion.

〔従来の技術〕[Conventional technology]

従来の半導体装置は第4図に示すように半導体チップ1
は半導体装置基板2のチップ搭載部3に接着用樹脂4に
て固着マウントされ、装置基板の端子リード5とワイヤ
ボンティングされ、蓋材6により封止されている。
A conventional semiconductor device has a semiconductor chip 1 as shown in FIG.
is fixedly mounted on the chip mounting portion 3 of the semiconductor device substrate 2 with an adhesive resin 4, wire-bonded to the terminal leads 5 of the device substrate, and sealed with a lid member 6.

半導体チップを固着する接着用樹脂は、半導体装置基板
のチップ搭載部に滴下供給され、半導体チップをその上
に載せて押圧した後、熱硬化され半導体チップの固着を
行う。この時の接着用樹脂は一種類のみであった。
The adhesive resin for fixing the semiconductor chip is supplied dropwise to the chip mounting portion of the semiconductor device substrate, and after the semiconductor chip is placed thereon and pressed, it is thermoset to fix the semiconductor chip. At this time, only one type of adhesive resin was used.

二め樹脂には、信頼性の観点から次の特性が要求されて
いる6高接着強度、耐熱性、低ボイド、半導体チップと
の熱膨張率の合致、低弾性低熱抵抗、低電気抵抗、低不
純物イオン濃度、高作業性及び低価格等である。しかし
、以上の諸特性を十分満足する接着用樹脂は無い。そこ
で実際の使用に当っては、半導体チップの性能、半導体
装置の特徴に合った樹脂を選択しなくてはならない。例
えば、高集積化のため大型化した半導体チップには、熟
gaの合致、低弾性、低熱抵抗が最も要求される。その
理由は、半導体チップ及び固着した樹脂に過大な応力を
与えないためと、半導体チップ表面で消費された熱を効
率良くチップ裏面を通して半導体装置基板に逃がさなけ
ればならないためである。
The second resin is required to have the following properties from the viewpoint of reliability: 6 high adhesive strength, heat resistance, low voids, matching coefficient of thermal expansion with semiconductor chips, low elasticity, low thermal resistance, low electrical resistance, and low These include impurity ion concentration, high workability, and low cost. However, there is no adhesive resin that fully satisfies the above characteristics. Therefore, in actual use, it is necessary to select a resin that matches the performance of the semiconductor chip and the characteristics of the semiconductor device. For example, semiconductor chips that have become larger due to higher integration are most required to have a close Ga match, low elasticity, and low thermal resistance. This is because excessive stress is not applied to the semiconductor chip and the fixed resin, and the heat consumed on the semiconductor chip surface must be efficiently released to the semiconductor device substrate through the back surface of the chip.

一般のチップ接着用樹脂は、エポキシ樹脂またはポリイ
ミド樹脂を主剤とし、熱抵抗及び電気抵抗を低減させる
なめに貴金属等の安定な高熱伝導体をフィラーとして含
有している。接着用樹脂は取材の樹脂が樹脂特性のうち
の、接着強度、耐熱性、熱膨張率、不純物イオン濃度を
支配し、高熱伝導のフィラーの含有は、量に比例して接
着剤としての熱抵抗低減に寄与している。一般にフィラ
ーの含有量を増加させると樹脂の前記特性は低下する傾
向にあり、樹脂主剤の選択とフィラーの含有量の選択が
、接着用樹脂選択の要所となっていた。
Typical chip bonding resins have epoxy resin or polyimide resin as their main ingredient, and contain a stable high thermal conductor such as a noble metal as a filler to reduce thermal resistance and electrical resistance. For adhesive resins, the resin used controls the adhesive strength, heat resistance, coefficient of thermal expansion, and impurity ion concentration among the resin properties, and the content of highly thermally conductive filler increases the thermal resistance as an adhesive in proportion to the amount. This contributes to the reduction. Generally, when the filler content is increased, the above-mentioned properties of the resin tend to deteriorate, and the selection of the resin base and the filler content have been the key points in selecting the adhesive resin.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

この従来の半導体装置は、接着用樹脂を一種類のみ用い
ていた。その主な理由は、作業性が良いためである。一
種類の接着用樹脂を用いれば、半導体チップのマウント
工程もその樹脂の熱硬化条件−つでよいからである。し
かし、その骨接着用樹脂には多くの特性をその一つの接
着用樹脂に要求した。例えば耐熱性の高い樹脂を用いな
がら、高接着強度、低熱抵抗を求めた。しかし、半導体
チップの高集積化、大型化は、従来の一種類の接着用樹
脂ではこれらの特性を十分満足出来なくなって来た。
This conventional semiconductor device uses only one type of adhesive resin. The main reason for this is that it has good workability. This is because if one type of adhesive resin is used, the semiconductor chip mounting process can also be carried out under the thermosetting conditions of that resin. However, many characteristics were required for the bone adhesion resin. For example, we sought to achieve high adhesive strength and low thermal resistance while using a resin with high heat resistance. However, as semiconductor chips become more highly integrated and larger, it is no longer possible to fully satisfy these characteristics with a single type of conventional adhesive resin.

樹脂厚を厚くすれば、応力は弾性率が相対的に小さい樹
脂部にかかり、半導体チップへの応力を低減出来、半導
体チップのクラック等を防止するとか出来る。しかし、
樹脂厚を厚くすることは、熱抵抗の増大を招き、半導体
チップの温度が高くなり、機能の低下を招くことになる
。そこで、半導体チップの熱放散性を保ちながら半導体
チップへの応力を緩和出来る接着用樹脂が必要となった
。以上より、従来の半導体装置では半導体チップの熱を
放散するには、チップ裏面から接着用樹脂を介して半導
体装置基板に伝導させることが最も効果的であり、熱伝
導の良い接着用樹脂をチップ下部の主中央にできるだけ
広い面積で薄く配置する機能と樹脂に発生する応力をチ
ップ周囲部で吸収緩和し、安定な固着を確保するために
低弾性、高接着強度及び高耐熱性の機能が一種類の接着
用樹脂では得られないという問題点があった。
By increasing the thickness of the resin, stress is applied to the resin portion with a relatively small modulus of elasticity, reducing stress on the semiconductor chip and preventing cracks in the semiconductor chip. but,
Increasing the thickness of the resin causes an increase in thermal resistance, which increases the temperature of the semiconductor chip, leading to a decrease in functionality. Therefore, there is a need for an adhesive resin that can relieve stress on the semiconductor chip while maintaining its heat dissipation properties. From the above, in order to dissipate heat from the semiconductor chip in conventional semiconductor devices, the most effective way to dissipate heat from the semiconductor chip is to conduct it from the back side of the chip to the semiconductor device substrate via the adhesive resin. The main center of the lower part has the function of being thinly placed in the widest possible area, and the stress generated in the resin is absorbed and alleviated around the chip, and the functions of low elasticity, high adhesive strength, and high heat resistance are combined to ensure stable adhesion. There was a problem in that it could not be obtained with other types of adhesive resins.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体装置は、半導体チップを半導体装置基板
に搭載固着する部分において、二種類以上の接着用樹脂
をそれぞれの特性を十分発揮できる部分に用いることで
それぞれの樹脂の短所を補い、接着用樹脂の選択の幅を
広げ、且つ、半導体装置の接着強度の向上、応力の緩和
、熱抵抗の低減等の特性を改善できる構造を提供するこ
とである。
The semiconductor device of the present invention compensates for the shortcomings of each resin by using two or more types of adhesive resin in the area where the semiconductor chip is mounted and fixed on the semiconductor device substrate in the area where the characteristics of each adhesive can be fully demonstrated. It is an object of the present invention to provide a structure that can widen the range of resin selections and improve the characteristics of semiconductor devices, such as improving adhesive strength, relaxing stress, and reducing thermal resistance.

半導体チップ下部の主中央には、熱伝導の良い接着用樹
脂を用い半導体チップ下部の周囲または側壁には接着強
度が高く、弾性率が低く、且つ耐熱性の高い接着用樹脂
を用いる。熱伝導を良くするためには、その箇所として
チップ下部の主中央に熱伝導の良いフィラーを含有させ
た構成の接着用樹脂を、そしてっ半導体チップの接着を
安定化し、半導体チップの応力を低減するためには、チ
ップ下部の周囲に接着強度が強く、応力を吸収し易く且
つ、熱的に安定な接着用樹脂を構成させる。
An adhesive resin with good thermal conductivity is used at the main center of the lower part of the semiconductor chip, and an adhesive resin with high adhesive strength, low elastic modulus, and high heat resistance is used around the lower part of the semiconductor chip or on the side walls. In order to improve heat conduction, adhesive resin containing a filler with good thermal conductivity is placed in the main center of the bottom of the chip, which stabilizes the adhesion of the semiconductor chips and reduces stress on the semiconductor chips. In order to do this, an adhesive resin that has strong adhesive strength, can easily absorb stress, and is thermally stable is formed around the lower part of the chip.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の半導体装置の断面図である
。基本構造は、半導体装置基板2の片面上にチップ搭載
部3が設けられており、半導体チ、・/ブ1か2種類の
接着用樹脂で固着されている。第1の接着用樹脂41は
半導体チップの下部主中央にのみ配置し、第2の接着用
樹脂42は半導体チップの下部周囲及び側面に配置され
ている。第1の接着用樹脂にはAg、Au、Agまたは
C等の高熱伝導性で安定な金属等をフィラーとして含有
するエポキシまたはポリイミドを主材とする熱伝導の良
い接着用樹脂を用い、第2の接着用樹脂42には、接着
強度が強く、低弾性で耐熱性の高い接着用樹脂を用いる
。例えば、第1の接着用樹脂にフィラー含有のエポキシ
を使ったらフィラー無しのエポキシを第2の接着用樹脂
に使う。ポリイミドでも同様である。この場合の第2の
接着用樹脂は、特性を十分発揮できるようにフィラー等
は含まないものとする。さらに半導体チップは端子リー
ドとワイヤボンディングされ、置割6で封止される。
FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention. The basic structure is that a chip mounting section 3 is provided on one side of a semiconductor device substrate 2, and is fixed with a semiconductor chip or two types of adhesive resin. The first adhesive resin 41 is placed only at the main center of the lower part of the semiconductor chip, and the second adhesive resin 42 is placed around the lower part and on the side surfaces of the semiconductor chip. The first adhesive resin is a highly thermally conductive adhesive resin mainly composed of epoxy or polyimide containing a highly thermally conductive and stable metal such as Ag, Au, Ag or C as a filler, and the second For the adhesive resin 42, an adhesive resin with strong adhesive strength, low elasticity, and high heat resistance is used. For example, if filler-containing epoxy is used as the first adhesive resin, filler-free epoxy is used as the second adhesive resin. The same applies to polyimide. In this case, the second adhesive resin does not contain filler or the like so that its properties can be fully exhibited. Further, the semiconductor chip is wire-bonded to the terminal leads and sealed with a mounting plate 6.

なお、接着用樹脂の滴下方法は、種類別にディスペンス
ノズルを用いて別々に滴下し、半導体チップ載置後、−
度に硬化させる。
Note that the method of dropping the adhesive resin is to drop each type separately using a dispense nozzle, and after placing the semiconductor chip, -
Allow to harden.

また種類別に硬化条件が異なる場合は、第1の接着用樹
脂を半導体チップを仮固着後、チップ側壁及び下部周囲
に第2の接着用樹脂を滴下して、硬化固着を行う。
If the curing conditions are different depending on the type, after temporarily fixing the semiconductor chip with the first adhesive resin, the second adhesive resin is dropped around the side wall and lower part of the chip to perform curing and fixing.

第2図に半導体チップ搭載部の断面(第2図(b))と
チップ下面の接着用樹脂の配置を示す状態(第2図(a
))を示す。
Figure 2 shows a cross section of the semiconductor chip mounting area (Figure 2(b)) and the arrangement of adhesive resin on the bottom surface of the chip (Figure 2(a)).
)).

次に、第3図に本発明の第2の実施例の半導体チップ搭
載部のチップ下面の接着用樹脂配置の状態図(第3図(
a〉)と断面図く第3図(b))を示す。本実施例では
、第1の接着用樹脂41が半導体チップの下部主中央に
位置し半導体装置基板2と接合しているが、半導体チッ
プ1とは直接1接合せず、第2の接着用樹脂42がチッ
プ下面全域とチップ側壁において接合固着している。こ
の場合は、第1の接着用樹脂41に第1の実施例と同様
熱伝導の良いものを用い、−度硬化させた後、第2の接
着用樹脂42を第1の接着用樹脂の上から滴下した後、
半導体チップ1を載置固着すれば良い。この時の第2の
接着用樹脂は、フィラーの含有を第1のそれより減らす
か、無くしたらのを用いる。この場合は第1の実施例と
比べ、作業が簡易な上、比較的大きな熱抵抗の増加を起
こさずして、低応力且つ高接着強度の半導体チップ搭載
を可能とする利点がある。
Next, FIG. 3 is a state diagram of the adhesive resin arrangement on the lower surface of the chip in the semiconductor chip mounting part of the second embodiment of the present invention (see FIG. 3).
a>) and a cross-sectional view (FIG. 3(b)) are shown. In this embodiment, the first adhesive resin 41 is located at the center of the lower part of the semiconductor chip and is bonded to the semiconductor device substrate 2, but it is not directly bonded to the semiconductor chip 1, and the second adhesive resin 41 is 42 is bonded and fixed on the entire lower surface of the chip and on the side wall of the chip. In this case, the first adhesive resin 41 is made of a material with good thermal conductivity as in the first embodiment, and after being cured, the second adhesive resin 42 is applied on top of the first adhesive resin. After dripping from
The semiconductor chip 1 may be placed and fixed. At this time, the second adhesive resin contains less or no filler than the first one. In this case, compared to the first embodiment, there are advantages that the work is simpler and that it is possible to mount a semiconductor chip with low stress and high adhesive strength without causing a relatively large increase in thermal resistance.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、半導体チップ固着用の接
着用樹脂を2種類以上用いることで、接着用樹脂の特性
に合わせて、チップ下部の樹脂構成を選択することがで
きる。チップ下部主中央においては、熱放散を主に行い
、半導体チップ周囲においては低弾性、高耐熱で且つ接
着強度を高くした半導体チップ搭載固着が可能となる。
As explained above, in the present invention, by using two or more types of adhesive resins for fixing semiconductor chips, it is possible to select the resin composition of the lower part of the chip according to the characteristics of the adhesive resins. At the center of the lower part of the chip, heat is mainly dissipated, and at the periphery of the semiconductor chip, it is possible to mount and fix the semiconductor chip with low elasticity, high heat resistance, and high adhesive strength.

チップ表面より発する熱はチップ下部中央より放散した
方が最も効率が良い。また、半導体チップ、半導体装置
基板及び接着用樹脂の各々の熱膨張率から発生する応力
は主に接着用樹脂の周囲に働くから、半導体チップ下部
の周囲及び側壁に低弾性高接着強度化を行えば、半導体
チップのクラック、剥れ等を防止することが可能となる
。以上より得られる効果により、半導体チップの消費電
力は12割程度から倍近くまで、また半導体チップサイ
ズも少なくとも5割程度まで大きくすることが可能とい
う効果を有する。
It is most efficient if the heat generated from the chip surface is dissipated from the bottom center of the chip. In addition, since stress generated from the respective thermal expansion coefficients of the semiconductor chip, semiconductor device substrate, and adhesive resin acts mainly around the adhesive resin, low elasticity and high adhesive strength is applied to the periphery and side walls of the lower part of the semiconductor chip. For example, it becomes possible to prevent cracks, peeling, etc. of semiconductor chips. As a result of the above-described effects, the power consumption of the semiconductor chip can be increased from about 120% to nearly double, and the semiconductor chip size can be increased by at least 50%.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の半導体装置の断面図、第2
図は本発明の一実施例の半導体装置の半導体チップ搭載
部の一部を示す概略図、第3図は本発明の第2の実施例
の半導体装置の半導体チップ搭載部の一部を示す概略図
である。第4図は従来の半導体装置の断面図である。 1・・・半導体チップ、2・・・半導体装置基板、3・
・・チップ搭載部、4,41.42・・・接着用樹脂、
5・・・端子リード、6・・・置割。
FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIG.
The figure is a schematic diagram showing a part of a semiconductor chip mounting part of a semiconductor device according to an embodiment of the present invention, and FIG. 3 is a schematic diagram showing a part of a semiconductor chip mounting part of a semiconductor device according to a second embodiment of the invention. It is a diagram. FIG. 4 is a sectional view of a conventional semiconductor device. 1... Semiconductor chip, 2... Semiconductor device substrate, 3.
...Chip mounting part, 4,41.42...Adhesive resin,
5...terminal lead, 6...placement split.

Claims (1)

【特許請求の範囲】 1、半導体装置基板上に樹脂を用いて半導体チップを取
り付ける半導体装置において、半導体チップを半導体装
置基板に搭載固着する部分に二種類以上の接着用樹脂を
用いたことを特徴とする半導体装置。 2、半導体チップ下部の主中央には、熱伝導の良い接着
用樹脂を用い、半導体チップ下部の周囲または側壁には
、接着強度が高く、弾性率が低く、且つ、耐熱性の高い
接着用樹脂を用いたことを特徴とする特許請求の範囲第
1項記載の半導体装置。 3、半導体チップ下部の主中央には、Ag、Au、Al
またはC等の熱伝導の良いフィラーを含有した接着用樹
脂を用い、半導体チップの周囲または外周には、該フィ
ラーを含有しないか、または接着用樹脂を用いたことを
特徴とする特許請求の範囲第1項記載の半導体装置。
[Claims] 1. A semiconductor device in which a semiconductor chip is mounted on a semiconductor device substrate using a resin, characterized in that two or more types of adhesive resins are used in the portion where the semiconductor chip is mounted and fixed on the semiconductor device substrate. semiconductor device. 2. An adhesive resin with good thermal conductivity is used at the main center of the lower part of the semiconductor chip, and an adhesive resin with high adhesive strength, low elastic modulus, and high heat resistance is used around the lower part of the semiconductor chip or on the side walls. A semiconductor device according to claim 1, characterized in that the semiconductor device uses: 3. In the main center of the lower part of the semiconductor chip, Ag, Au, Al
Claims characterized in that an adhesive resin containing a filler with good thermal conductivity such as or C is used, and the filler is not contained or the adhesive resin is used around or on the outer periphery of the semiconductor chip. The semiconductor device according to item 1.
JP2222921A 1990-08-24 1990-08-24 Semiconductor device Pending JPH04105333A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2222921A JPH04105333A (en) 1990-08-24 1990-08-24 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2222921A JPH04105333A (en) 1990-08-24 1990-08-24 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH04105333A true JPH04105333A (en) 1992-04-07

Family

ID=16789952

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2222921A Pending JPH04105333A (en) 1990-08-24 1990-08-24 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH04105333A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011233782A (en) * 2010-04-28 2011-11-17 Toshiba Corp Semiconductor device and method for manufacturing the same
JP2012234910A (en) * 2011-04-28 2012-11-29 Toshiba Corp Semiconductor device and manufacturing method of the same
WO2016085561A1 (en) * 2014-11-24 2016-06-02 Raytheon Company Patterned conductive epoxy heat-sink attachment in a monolithic microwave integrated circuit (mmic)
JP2018032830A (en) * 2016-08-26 2018-03-01 トヨタ自動車株式会社 Semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011233782A (en) * 2010-04-28 2011-11-17 Toshiba Corp Semiconductor device and method for manufacturing the same
JP2012234910A (en) * 2011-04-28 2012-11-29 Toshiba Corp Semiconductor device and manufacturing method of the same
WO2016085561A1 (en) * 2014-11-24 2016-06-02 Raytheon Company Patterned conductive epoxy heat-sink attachment in a monolithic microwave integrated circuit (mmic)
JP2018032830A (en) * 2016-08-26 2018-03-01 トヨタ自動車株式会社 Semiconductor device

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