JPH0399537A - System for eliminating interference between cross-polarized waves - Google Patents

Abstract

PURPOSE:To stabilize the operation and to miniaturize a system by providing a transversal filter with delay circuits where 1/2 periods of clock signals of different polarization signals are units of the delay time and controlling the weighting in accordance with a clock signal having the double frequency. CONSTITUTION:In circuits 100a and 100b which eliminate the interference between cross-polarized waves, delay circuits 12 and 13 of a transversal filter 1 are constituted with 1/2 periods (T/2) of clock signals (period T) of different polarization signals as units of the delay time, and a control signal generating circuit 14 generates control signals (R0, R+ or -1, I0, and I+ or -1) in accordance with 1 clock signal CLK (2f) having the double frequency. Demodulating circuits 200a and 200b are provided with a 2-multiplying circuit 15 which multiplies the clock signal reproduced on the polarization side by 2, and FF circuits 16 and 17 discriminate outputs P and Q of a synchronous detecting circuit 701 on the local polarization side by the signal CLK (2f). Thus, the phase difference between input signals of weighting circuits 63, 68, 64, 67, 65, and 66 is 180 deg.C. Thus, the degradation in characteristic is removed.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to a cross-polarization interference cancellation system in a digital wireless communication system using two mutually orthogonal polarizations, and in particular to an intermediate frequency (IF) type cross-polarization interference cancellation system. The present invention relates to a cross-polarization interference cancellation system including a cross-polarization interference cancellation circuit.

(Prior art) In recent years, microwave wireless communication has been developed to transmit separate information to 2-fi waves (vertical polarization and horizontal polarization, or left-handed circular polarization and right-handed circular polarization) that are orthogonal to each other, and to make the frequency effective. The orthogonal polarization digital wireless communication system used is attracting attention. When such orthogonally polarized waves are used, anisotropy of the medium caused by rain or the like causes, for example, cross-polarized interference in which vertically polarized waves interfere with horizontally polarized waves. Various cross-polarization interference cancellation methods have been proposed to eliminate this cross-polarization interference. The one shown in the figure is known.

In FIG. 7, this cross-polarization interference cancellation system is
Cross-polarized interference elimination circuits 600a and 600h, each having the same configuration, receive received signals (IF modulated waves) of two orthogonal polarized waves (for example, vertical polarization and horizontal polarization), and cross-polarized interference elimination circuits (600a60Qb). ) Demodulation circuits 700a and 700! having the same configuration receive the outputs of the corresponding ones. +, and is configured to remove cross-polarized interference for each of two orthogonal polarized waves.

In the cross-polarization interference removal circuit (600a, 600b),
The IF modulated wave signal (i.e., the signal subjected to cross-polarization interference: confidence wave signal), which is the input signal on the - side, undergoes a delay operation for a predetermined time in the delay circuit 601 and becomes one input of the adder 602. . Delay circuit 601 is provided to compensate for delays in transversal filter 603.

Further, the other input signal, the IP modulated wave signal (that is, the signal of the cross-polarization interference source: the different polarization signal), is input to the transversal filter 603 , and its output becomes the other input of the adder 602 .

The transversal filter 603 is illustrated as having, for example, three taps. The delay circuits 61 and 62, which are input circuits, have a delay time T equal to 1 of the clock signal of the different polarization signal.
The time is equal to the period. This delay circuit (61,
Each tap output of 62) is input to one of the corresponding weighting circuits (63 to 68).
~68) has the control signal (R-1, Ro, R+
,.

I-1, I. , I+t) is given from the control signal generation circuit 604, and a signal weighted in proportion to the control signal is output to the corresponding one of the combiners (605, 606). The combined outputs of the combiners 605 and 606 are combined by an orthogonal combiner 607 with a phase difference of 90°. That is, a signal having the same amplitude and opposite phase as the different polarization signal leaked into the self-wave signal is output from the orthogonal combiner 607 to the other input of the adder 602.

As a result, the adder 602 outputs a confident wave signal (IF modulated wave signal) from which cross-polarization interference has been removed to the corresponding demodulation circuit (700a, 700b).

In the demodulation circuit (700a, 700b), the input IF
The modulated wave signal is first synchronously detected by a synchronous detection circuit 701. The synchronous detection circuit 701 includes a carrier recovery circuit 71, a π/2 phase shifter 72 that shifts the phase of the recovered carrier signal by π/2, and a multiplier that multiplies the input IP modulated wave signal by the output of the carrier recovery circuit 71. 73, input IF modulated wave signal and π
A demodulated baseband signal P which is the output of a 0 multiplier 73 consisting of a multiplier 74 that multiplies the output of a /2 phase shifter 72;
is applied to an A/D converter 702 which is an identification/reproduction circuit and an FF (flip-flop) circuit 703 which is a quadrant determination circuit, and the demodulated baseband signal Q which is the output of the multiplier 74 is applied to an A/D converter which is an identification/regeneration circuit. The signal is applied to a converter 704 and an FF circuit 705 which is a quadrant determination circuit.

Then, the A/D converters 702 and 704 identify the corresponding demodulated baseband signals (P, Q>) according to the output of the clock signal regeneration circuit 707 on the self-polarization side, and convert them into data signals and error signals (EP, EQ). Play and output.

The error signal (Ep, 'Eo) is the next bit of the reproduced data signal and is a binary signal containing a cross-polarization interference component.

Error signals (EP, E
Q) is supplied to the control signal generation circuit 604 of the cross-polarization interference removal circuit on the self-polarized side together with the reproduced clock signal CLK on the self-polarized side.

On the other hand, the FF circuits 703 and 705 identify the corresponding demodulated baseband signals (P, Q) according to the output of the clock signal generation circuit 707 on the equipped wave side, and the quadrant determination signals (DP, DQ), which are the most significant bits, identify the corresponding demodulated baseband signals (P, Q). ) is output. As is clear from FIG. 7, the control signal generation circuit 604 of the cross-polarization interference remover on the self-polarization side has the F-F of the demodulation circuit on the different polarization side.
The quadrant determination signals (DP, DQ) identified and reproduced by the circuits (703, 705) are input.

Note that the control signal generation circuit 604 is configured as shown in FIG. 2, for example. In FIG. 2, input quadrant determination signals (Dp, Do) and error signals (E p, E
o) is taken into the corresponding FF circuit 25 according to the reproduced clock signal CLK.

Then, the output of each FF circuit 25 (DPO, DQO.

Epo, Epus, EQO・EQ+1) and the input (Ept・EQ−1>) are correlated in the corresponding exclusive OR circuit (EX-OR) 21, and the adder 2
3 and a subtracter 24, and the sum or difference is taken by an integrator 22 to obtain the control signal (R
it, I tl+ RO+ I o) is obtained.

As described above, the output of the adder 602 is thereby compensated so that the error due to cross-polarization interference is minimized.

(Problems to be Solved by the Invention) In the conventional cross-polarization interference removal system described above, the delay circuit of the transversal filter is configured with a period T equal to the period of the clock signal of the different polarization signal, and the quadrant determination signal and error Since the signal is detected with a period of T, the improvement characteristic is as shown by the solid line in Figure 3, for example, and the delay time difference between the cross-polarization interference component and the signal for compensation is T/2.
When this happens, there is a problem that the cross-polarization interference removal ability deteriorates significantly.

Therefore, in order to solve this problem, a delay circuit of T/2
A cross-compensated inter-wave interference removal system using a transversal filter configured with
LARIZATION INTERFERENCE
CANCELLATION IN THE
PRESENCE 0FDELAY EFFE
CTS” (Il, Ranklj, A, No-5se
A specific example of the configuration of the 0-wire system proposed in
g, 4. Although not repeated here, this system is of a baseband type, and transversal filters are provided on the in-phase side and the orthogonal side to remove cross-polarization interference, respectively. And the same Fig, 4
Among them, C0RRvo (C○RRFIV) corresponds to the control signal generation circuit 604, but it is equipped with two identification and reproducing circuits (i.e., A/D converters), and one is connected to the frequency fv (f
The most significant bit of the reproduced data signal obtained by operating with the clock signal of
The next bit of the reproduced data signal obtained by operating with the clock signal v(2f o) is used as an error signal.

However, the system shown in the above document has the following problems.

First, the synchronous detection output is set to twice the frequency (2fv).

2fn) clock signal to obtain the error signal, the information on the shift point of the synchronous detection output is used as the error signal, and the probability of obtaining incorrect information including quantization error is reduced. high, and operation becomes unstable.

Furthermore, since two systems of identification and reproducing circuits are provided for each received signal, the circuit scale becomes complicated and large, making it difficult to miniaturize.

Furthermore, since the identification and reproducing circuit for obtaining the error signal is used at a high frequency, there is limited room for selection of the frequency of the tarok signal. Further, although this identification/reproduction circuit is for obtaining an error signal, unnecessary bits are also identified and reproduced, resulting in wasteful power consumption.

In addition, since this system is a baseband type,
It is necessary to provide a transversal filter on each of the in-phase side and the orthogonal side, which increases the circuit scale and also makes it difficult to downsize.

The present invention was made in view of such problems, and its purpose is to improve the characteristic deterioration when the phase difference between the confident wave signal and the different polarization signal becomes 1/2 period of the clock signal, and to An object of the present invention is to provide a cross-polarization interference cancellation system that operates stably, is compact, and has low power consumption.

(Means for Solving the Problems) In order to achieve the above object, the cross-polarization interference removal system of the present invention has the following configuration.

That is, the cross-polarization interference cancellation system of the present invention has orthogonal two
When one of the received signals of each polarization is a confident wave signal and the other is a different polarization signal, the recovered clock signal of either the confident wave signal or the different polarization signal is converted into a clock signal with twice the frequency.2 Multiplier circuit: Receives the confident wave signal and the different polarization signal, and performs an operation of removing the different polarization signal leaked into the confident wave signal, and weights each tap of the transversal filter using an error signal and a quadrant determination signal. The cross-polarization interference removal circuit is configured to perform control based on the transversal filter, and the transversal filter has a delay circuit that removes 1/2 period of the clock signal of the different polarization signal, which is the input signal. a cross-polarization interference elimination circuit configured as a unit of delay time, and wherein the weighting control is performed according to the output signal of the doubling circuit; a self-polarization side synchronous detection circuit that performs synchronous detection; and a different polarization side synchronous detection circuit that synchronously detects the different polarization signal using a regenerated carrier signal; an identification and reproducing circuit that identifies the data signal and the error signal according to the reproduced clock signal; identifies the output of the different polarization side synchronous detection circuit according to the output signal of the doubling circuit and reproduces the quadrant determination signal; The present invention is characterized by comprising: a quadrant determination circuit that outputs an output;

(Function) Next, the function of the crossing old wave interference removal system of the present invention configured as described above will be explained.

In the present invention, cross-polarization interference is removed in the IF band. Therefore, one transversal filter needs to be provided for each received signal, which contributes to miniaturization of the circuit scale. The transversal filter is equipped with a delay circuit whose delay time is 1/2 period of the clock signal of the different polarization signal, and the weighting control is performed according to the clock signal of twice the frequency. This improves characteristic deterioration when the phase difference between the polarized signal and the different polarization signal becomes 1/2 period.

At this time, at least one of the error signal and the quadrant determination signal is identified and reproduced using a double frequency clock signal, but in the present invention, only the quadrant determination signal is identified using the double frequency. The quadrant judgment signal is the most significant bit, and there is no need to reproduce all the data as in the case of obtaining the error signal.In other words, the probability of error due to quantization error is zero even with information on the shift point of the output of the synchronous detection circuit. This ensures stable operation and no unnecessary power consumption. Since the quadrant determination circuit can be constructed from a well-known flip-flop circuit, there is a wide range of options for operating frequencies to be used, and miniaturization is facilitated.

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. FIG. 1 shows a crossing old wave interference cancellation system according to a first embodiment of the present invention. Components that are the same as those of the conventional system shown in FIG. 7 are given the same reference numerals and their explanations will be omitted.

In Figure 1, the crossing old wave interference removal circuit < 100a
, 100b), the transversal filter 1 is configured such that the delay circuits 12 and 13 are configured with a delay time unit of 1/2 period (T/2) of the clock signal (period T) of the different polarization signal, and the control The signal generation circuit 14 generates control signals (Ro,
R4x, Io, Iths). The control signal generating circuit 14 is constructed as shown in FIG. 2, similar to the conventional circuit 604. The clock signal CLK has a double frequency (2f), and the quadrant determination signals (DP, DQ) have a clock signal C with a double frequency.
The only difference from the conventional circuit 604 is that it is identified by LK (2f).

In addition, in the demodulation circuits (200a, 200b), a doubling circuit 15 that doubles the clock signal reproduced on the side of different polarization.
are provided respectively, and the F-F circuits (16, 17> identify the outputs (P, Q) of the self-polarized side synchronous detection circuit 701 using the tally clock signal CLK (2f>) having a double frequency.

With the above configuration, the weighting circuit <63.68
), (64, 67), and (6566) are each 180°, and as a result, the delay time difference of the compensation signal for the cross-polarization interference component (interference wave) is T/2. The improvement characteristic when it becomes (an integer multiple of) seconds is
For example, as shown by the broken line in Figure 3, ±T/2, ±3
The degree of improvement deterioration at T/2 is significantly improved, and a constant degree of improvement can be obtained regardless of the phase difference.

As is clear from the above configuration, the quadrant determination circuit only needs to identify the most significant bit, so the F-F circuit (16, 17)
The circuit is simple, small-scale, and has low power consumption because it does not identify unnecessary bits.The F-F circuit can be used at a sufficiently high frequency compared to the A/D converter, which is an identification and regeneration circuit. Therefore, there is no restriction as in the above-mentioned document, and the operating frequency can be significantly widened.

Also, since the quadrant determination signal is the most significant 1 bit,
Even in the information on the shift point of the output of the synchronous detection circuit 701, the probability of error due to quantization error is zero, and stable operation can be expected.

Furthermore, since the cross-polarization interference is removed in the IF band, it is sufficient to provide one transversal filter for each received signal, and from this point as well, it can be seen that the configuration is suitable for miniaturization.

In addition to the system of the first embodiment described above, various modes shown in FIGS. 4 to 6 are conceivable for the generation method of the quadrant determination signals (D p, D Q).

In the second embodiment system shown in FIG.
0a, 300b), the doubler circuit 15 is arranged to double the clock signal CLK regenerated on the self-polarized side, and the FF circuit (16, 17) is arranged to double the clock signal CLK reproduced on the self-polarized side, and the F-F circuit (16, 17) is arranged to double the clock signal CLK reproduced on the self-polarized side. This is to identify the signals (P, Q). Therefore, the quadrant determination signals (DP, DQ) generated in the demodulation circuit 300aDOOb) are applied to the control signal generation circuit 14 of the cross-polarization interference remover 100a<100b) on the self-polarization side.
It will be given to

In addition, in the third embodiment system shown in FIG. 5, a synchronous detection circuit 401 that shares the recovered carrier signal is newly installed in the demodulation circuit (400a, 400b), and the input IF modulated wave signal of this synchronous detection circuit 401 is delayed. It is obtained from the center taps of the circuits (2, 3) and is in phase with the input IP modulated wave signal of the synchronous detection circuit 701. Then, the output (P) of this synchronous detection circuit 401.

Q) is identified by the FF circuit (16, 17).

The arrangement of the doubler circuit 15 is the same as that of the first embodiment system, but the sixth embodiment is similar to the second embodiment system.
This is a fourth embodiment system shown in the figure.

It should be noted that the reason why the doubler circuit 15 multiplies two types, the self-polarized wave side and the different polarized wave side, is that the frequencies of the clock signals of the two types are generally different.

(Effects of the Invention) As explained above, according to the cross-polarization interference removal system of the present invention, in the system that performs the cross-polarization interference removal operation in the IF band, the transversal filter is configured to clock a different polarization signal. It is equipped with a delay circuit whose delay time is 1/2 period of the signal, and the weighting control is performed according to a clock signal of double the frequency, so that the phase difference between the confident wave signal and the different polarization signal is 1. /2 cycles can be improved.

At this time, the error signal is obtained by a normal clock signal,
Since the quadrant determination signal is obtained using a clock signal with double the frequency, operation is stable, miniaturization and low power consumption can be achieved.
In addition, it is possible to provide a cross-polarization interference removal system that can be used over a wide range of operating frequencies.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the cross-polarization interference cancellation system according to the first embodiment of the present invention, FIG. 2 is a block diagram of the control signal generation circuit, FIG. 3 is a comparison diagram of the degree of improvement, and FIG. 4 is a configuration block diagram of a system according to a second embodiment of the present invention, FIG. 5 is a configuration block diagram of a system according to a third embodiment of the present invention, and FIG.
The figure is a block diagram of the configuration of a system according to a fourth embodiment of the present invention, and FIG. 7 is a block diagram of the configuration of a conventional system. 1...transversal filter, 12,
13... Delay circuit, 14... Control signal generation circuit, 15... Double multiplier circuit, 16.
17... Flip-flop (FF) circuit (quadrant judgment circuit), 18.19.73.74... Multiplier, 20,72... π/2 shift Aiki, 63
~68...Weighting circuit, 71...
Carrier wave regeneration circuit, l00a, l00t+...
Cross polarization interference removal circuit, 200a, 200b, 30
0a. 300b, 400a, 400b, 600a, 600b-
----- Demodulation circuit, 601...Delay circuit,
602...Adder, 605,606...
... combiner, 607 ... orthogonal combiner, 7
01,401... Synchronous detection circuit, 702,7
04...A,/D converter (identification regeneration circuit)
, 707...Clock regeneration circuit.

Claims (1)

[Claims] When receiving signals of two orthogonal polarizations, one is an auto-polarization signal and the other is a different-polarization signal, the recovered clock signal of either the auto-polarization signal or the different-polarization signal is a clock signal with twice the frequency. a doubling circuit that receives the self-polarized signal and the different polarized signal and performs an operation for removing the different polarized signal leaking into the self-polarized signal, and weights each tap of the transversal filter. A cross-polarization interference removal circuit configured to perform control based on an error signal and a quadrant determination signal, wherein the transversal filter has a delay circuit that removes the cross-polarization signal as an input signal. a cross-polarization interference elimination circuit configured to have a 1/2 cycle of a clock signal as a unit of delay time, and wherein the weighting control is performed in accordance with an output signal of the doubling circuit; the cross-polarization interference elimination circuit; self-polarization side synchronous detection circuit that synchronously detects the output of the
and a different polarization side synchronous detection circuit that synchronously detects the different polarization signal using a regenerated carrier signal; and a different polarization side synchronous detection circuit that identifies the output of the self polarization side synchronous detection circuit according to the self polarization regenerated clock signal and detects the data signal and the other polarization side synchronous detection circuit. an identification and reproduction circuit that reproduces and outputs the error signal; and a quadrant determination circuit that identifies the output of the different polarization side synchronous detection circuit according to the output signal of the doubling circuit and reproduces and outputs the quadrant determination signal. A cross-polarization interference cancellation system characterized by: