JPH0396138A - Code generator - Google Patents

Abstract

PURPOSE:To improve anti-disturbing wave characteristic and anti-fading characteristic by using a PN clock and a PN code synchronously with each other so as to generate a PN code subject to RZ processing at a base band. CONSTITUTION:A logic circuit 2 comprising gates G1, G2 receiving a PN clock and a PN code synchronously with each other and applying prescribed logical operation between the clock and the code so as to obtain 1st and 2nd outputs and a switching means 3 comprising a couple of transistors(TRs) QA, QB, capacitors C1, C2 and resistors R1-R7 whose output varies with the state of 1st and 2nd outputs. Even when an NRZ PN code is inputted, the switching means 3 outputs a PN code subject to RZ processing. Thus, anti-disturbing wave characteristic and anti-fading characteristic are improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a code generation device, and relates to an improvement for generating an RZ-converted PN code at baseband. C. Summary of the Invention] This is a coding device that generates an RZ PN code in the baseband using a synchronized PN clock and PN code. [Conventional technology] The conventional RZ (Return to Zero) code is RF (Radio Freq) as shown in FIG.
The modulated BPSK code B was generated by gating the amplitude of the second half of each bit of the BPSK code to O using suitable gating means G.

The gate means G is driven by the illustrated gate signal to obtain an RZ BPSK code.

[Problems to be Solved by the Invention] According to the conventional RZ conversion method described above, it is not possible to generate an RZ code in the baseband, and if a mixer, for example, is used as a gate means, harmonic components etc. are generated. There was a problem.

Furthermore, conventionally, PN codes used in spread spectrum communications have mainly been NR Z (Non Return to Ze
ro) code, and in particular, there was no device suitable for generating an RZ code.

[Object of the invention] Accordingly, an object of the present invention is to convert a PN code used in spread spectrum communication into an RZ code in the baseband using a simple structure.

[Means for Solving the Problem] In order to achieve the above object, the present invention receives a synchronized PN clock and a PN code, performs a predetermined logical operation on the clock and the code, and generates a first output and a second output. The present invention is characterized in that the present invention is provided with a logic circuit that obtains the output value, and a switching means that changes the output value depending on the states of the first and second outputs. [Operation] Even if the input PN code is an NRZ code, the RZ converted PN code is output from the above-mentioned switching means.

[Embodiments] The present invention will be described below with reference to embodiments shown in the drawings. FIG. 1 shows an embodiment of a code generator according to the present invention,
is an NRZ-PN code generator, 2 is a logic circuit, and 3 is a switching circuit. FIG. 2 shows an example of the structure of the above logic circuit, consisting of gates G and G2, and FIG. 3 shows the above switch? This is an example of the configuration of a switching circuit.
Qa, capacitors Ce, C2, and resistors R1 to R7.

From the NRZ-PN code generator 1, <PN
An NRZ PN code synchronized with the clock is output.

The synchronized PN clock and the NRZ PN code are applied to gates Ge and G2 that constitute the logic circuit 2, and the logic operations by these gates produce the two signals a shown in FIG.
d and bi are generated.

The above signal at+b is given to the switching circuit shown in Fig. 3, but since the above PN code pattern has a property that the number of O's and 1's are almost equal, the capacitor C
■ Signals a1 and b are extracted via C2 and C2.
By removing a certain amount of DC in (2), the signal az+b2 shown in FIG.
get. In addition, in the signal azt bz of FIG. 4, +v. I valve lvi'lt Iv21 given Iv2'
l,IVil v2'' is established.Next, in Fig. 3, in the state of te of the signal ag+b, the transistor QA is on and QB is off, and in the state of t2, the transistors QA?QB are both In the off state, t, transistor QA is off and transistor QB is on, and in the state t4, both transistors QAt and QB are off.As a result, an RZ-converted PN code can be obtained as shown in Fig. 4. Note that the swing circuit described above can also be replaced with an adder.

[Effect of the invention] As explained above, according to the present invention, by converting the PN code used in spread spectrum communication etc. into RZ, the fifth
As shown in the figure, even if the PN clock frequency is the same, the transmission spectrum can be made wider (B→2B), and the fading characteristics and anti-jamming characteristics are improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing an example of the configuration of a logic circuit in the embodiment, and FIG. 3 is a diagram showing an example of the configuration of a switching circuit in the above embodiment. 4 is a time chart for explaining the operation of the above embodiment, FIG. 5 is a diagram for explaining the effects of the present invention, and FIG. 6 is a diagram for explaining the prior art. 1...NZR-PN code generator, 2...
・・・・・・Logic circuit, 3・・・・・・・・・Switching circuit.

Claims (1)

[Scope of Claims] A logic circuit that receives a synchronized PN clock and a PN code, performs a predetermined logical operation on the clock and the code, and obtains first and second outputs; and the first and second outputs. A code generator comprising: a switching means whose output value changes according to the state of the code generator;