JPH0395661U - - Google Patents
Info
- Publication number
- JPH0395661U JPH0395661U JP1990002096U JP209690U JPH0395661U JP H0395661 U JPH0395661 U JP H0395661U JP 1990002096 U JP1990002096 U JP 1990002096U JP 209690 U JP209690 U JP 209690U JP H0395661 U JPH0395661 U JP H0395661U
- Authority
- JP
- Japan
- Prior art keywords
- slits
- large number
- lead frame
- semiconductors
- partitioned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000008188 pellet Substances 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990002096U JPH0395661U (US20100012521A1-20100121-C00001.png) | 1990-01-12 | 1990-01-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990002096U JPH0395661U (US20100012521A1-20100121-C00001.png) | 1990-01-12 | 1990-01-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0395661U true JPH0395661U (US20100012521A1-20100121-C00001.png) | 1991-09-30 |
Family
ID=31505977
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990002096U Pending JPH0395661U (US20100012521A1-20100121-C00001.png) | 1990-01-12 | 1990-01-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0395661U (US20100012521A1-20100121-C00001.png) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009117819A (ja) * | 2007-10-16 | 2009-05-28 | Toshiba Corp | 半導体装置とそれに用いられるリードフレーム |
JP2015070161A (ja) * | 2013-09-30 | 2015-04-13 | ローム株式会社 | リードフレーム、半導体装置および半導体装置の製造方法 |
JP2019071488A (ja) * | 2019-02-06 | 2019-05-09 | ローム株式会社 | 半導体装置 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4945192A (US20100012521A1-20100121-C00001.png) * | 1972-09-06 | 1974-04-30 | ||
JPS61279160A (ja) * | 1985-06-05 | 1986-12-09 | Sumitomo Electric Ind Ltd | リ−ドフレ−ム |
JPH01161743A (ja) * | 1987-12-17 | 1989-06-26 | Toshiba Corp | 半導体装置 |
-
1990
- 1990-01-12 JP JP1990002096U patent/JPH0395661U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4945192A (US20100012521A1-20100121-C00001.png) * | 1972-09-06 | 1974-04-30 | ||
JPS61279160A (ja) * | 1985-06-05 | 1986-12-09 | Sumitomo Electric Ind Ltd | リ−ドフレ−ム |
JPH01161743A (ja) * | 1987-12-17 | 1989-06-26 | Toshiba Corp | 半導体装置 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009117819A (ja) * | 2007-10-16 | 2009-05-28 | Toshiba Corp | 半導体装置とそれに用いられるリードフレーム |
JP2015070161A (ja) * | 2013-09-30 | 2015-04-13 | ローム株式会社 | リードフレーム、半導体装置および半導体装置の製造方法 |
JP2019071488A (ja) * | 2019-02-06 | 2019-05-09 | ローム株式会社 | 半導体装置 |