JPH039385Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a signal processing device for biological signals such as electrocardiogram signals.

As a method for automatically analyzing analog signals such as biological signal waveforms, the original signal is converted to digital, and the digitalized time series signal is smoothed and differentiated to remove noise from the time series signal and detect peaks. A common method is to extract features of the original analog signal by detecting the rise time. For example, when performing automatic analysis of electrocardiogram signals, the R wave of the QRS spike wave group of the electrocardiogram waveform as shown in Figure 1 is detected, and based on this, other P, QRS,
Detects the rise time and termination time of T waves, etc.
A method is being used in which the shape (time width, amplitude) and time interval of each spike wave are measured using these division points, and the results are used as parameters for automatically analyzing the electrocardiogram. In order to detect these spike waves,
A method has been used in which digitally converted electrocardiogram signals are subjected to digital filtering processing. On the other hand, biological signals to be analyzed are generally contaminated with high-frequency noise due to body movements and external noise, and in order to improve analysis accuracy, smoothing processing and the like have been performed as preprocessing. The digital filters used in these systems are mainly first-order differential filters, second-order differential filters, and smoothing filters, and their calculations are performed by minicomputers or microcomputer software, but they are highly accurate. This requires multiplication and division processing, which takes a long processing time, and most of the time in the processing for extracting features of the original signal is spent on this filtering processing.

Therefore, the purpose of the present invention is to provide signal processing that allows obtaining a first-order differential signal, a second-order differential signal, a smoothed signal, etc. at the same timing and without phase lag for analog signals such as spike wave groups of the electrocardiogram waveform. The purpose is to provide equipment.

According to the present invention, an A/D converter samples an analog signal at a predetermined clock and converts it into a digital signal, and a time-series digital signal converted by the A/D converter is delayed and converted into a digital signal. a delay means for outputting a predetermined number of pairs of second and third signals, which are equally spaced in chronological order with the first signal as the center; a first multiplier for multiplying a first coefficient signal having a value of 1, the second signal;
a second multiplier for multiplying the third signal by a second coefficient signal having a value of 1 or -1;
a first addition means that adds the output of the first addition means and the output of the multiplication means, and a second addition means that takes a value of 0 or 1 corresponding to the time interval between the output of the first addition means and the second or third signal. A predetermined number of basic circuits are provided, each having a third multiplication means for multiplying the coefficient signal by a second addition means for adding the outputs of these basic circuits, and the output of the first multiplication means. and a third adding means for adding the output of the second adding means.

Next, the present invention will be explained in detail. The ideal frequency characteristic in low-frequency differential processing is given by equation (1).

H〓 ⁽¹⁾ (ω) = 0jω |ω|≦απ απ<|ω|<π (1) Here, απ (0<α<1) indicates the cutoff frequency, and the sampling period is assumed to be T=1. ing.

This frequency characteristic is shown in FIG. When the characteristic expressed by equation (1) is approximated by an acyclic symmetric FIR filter, its frequency characteristic is given by equation (2).

F ⁽¹⁾ (ω)= _P 〓 ⁿ⁼¹ _o sin nω (2) Expressing equation (2) in the time domain, the output signal sequence y _k ⁽¹⁾ of first-order differential filtering is expressed by equation (3). It is expressed as a linear sum of central differences of the input signal sequence x _k .

y _k ⁽¹⁾ = d/2 _P 〓 ⁿ⁼¹ h _o (x _k+o −x _ko ) (3) where _o = d・h _o , d=1/ _P 〓 ⁿ⁼¹ (n・h _o )T
shows. In equation (3), d is a scale factor (constant) and is unrelated to the difference calculation in equation (3), so there is no need to take it into consideration in actual calculation.

Furthermore, in equation (3), if h _o is set to “0” or “1”, equation (3) can be reduced to 1 by only difference calculation.
This shows that second-order differential characteristics can be realized.

Next, the frequency characteristics in the smoothing process are expressed by equation (4).

F ^(m) (ω) = ^(m) ₀ + 2 _P 〓 ⁿ⁼¹ _n cos (nω) (4) Expressing equation (4) in the time domain, the smoothing processing output signal y _k ^(m) is expressed as equation 5. It is expressed as a linear sum of the input signal sequence and a temporally symmetric signal sequence centered on x _k , as shown in FIG.

y _k ^(m) = h ₀ ^(m) x _k + _P 〓 ⁿ⁼¹ h _o ^(m) (x _k+o + x _ko ) (5) where _o ^(m) = d・h _o ^(m) , d=1/ _P 〓 ⁿ⁼¹ h _o ^(m) . In equation (5), d is a scale factor (constant), and if h _o ^(m) is “0” or “1”, equation (5) shows that smooth characteristics can be achieved with only a simple linear sum. It shows. Here, if we pay attention to the peak of the difference (x _k+o −x _ko ) in (3), the linear sum term (x _k+o +x _ko ) in equation (5) is the second term in equation (3). time series signal
This corresponds to converting the sign of x _ko and performing an operation. This means that the smoothing operation based on equation (5) is
It is shown that among the differential operations expressed by , the subtraction operation is replaced with an addition operation and the term corresponding to h ₀ is added. FIG. 3 shows a configuration in which the selection between the subtraction operation and the addition operation can be switched by an external signal.

By connecting an addition device and a signal delay device to the calculation method shown in FIG. 3, a signal processing method that can be used in conjunction with the differentiation and smoothing processing shown in equations (3) and (5) can be realized.

This signal processing method is generally expressed as equation (6) using equation (3) and equation (5).

y _k = h ₀ x _k + _P 〓 ⁿ⁼¹ h _o (x _k+o + j・x _ko ) (6) Here, h _o h ₀ =0 or 1 and j=±1.

FIG. 4 shows a configuration corresponding to equation (6). In the figure, 1 is a signal delay device (shift register), which is a device that delays a digitized original signal. 2 is (6)
This is a device that performs calculations on the right side of an equation. Hereinafter, this will be called a differential/smoothing processor. From equation (6), this differential smoothing processor exhibits differential characteristics or smoothing characteristics depending on the values of h ₀ to h _p and j. By cascading these processors in a tree structure and connecting an analog/digital signal converter to this, a filtered output signal with characteristics different from the original signal can be obtained at the final stage.
Furthermore, all signals in the same hierarchy have the same phase. FIG. 5 is a diagram showing the processors arranged in the above-mentioned tree structure, and shows that by appropriately selecting the characteristics of each differential/smoothing processor, it is possible to obtain a wide variety of multi-stage filtering outputs for analog signals.

Based on the principle explained above, three differentiating and smoothing processors are cascaded in a tree structure after the analog-to-digital converter, and an electrocardiogram analog signal input device is connected to the front stage to form an electrocardiogram signal processing device. The example used is shown in FIG. 6 and will be described. In FIG. 6, reference numeral 11 denotes an analog signal amplification device that amplifies minute voltages measured from a living body to a level that allows signal analysis. 12 is an A/D converter that converts the amplified analog electrocardiogram signal into a time-series digital signal. 13,14,1
Reference numeral 5 denotes the differentiation/smoothing processor, which differentiates or smoothes the input digital signal depending on the purpose under external control. 16,1
Signal holding devices 7, 18, and 19 hold the signal for a certain period of time. The multiplexer 20 sends the filtered output signal to the storage devices 22, 23, 2 in response to the clock from the clock generator 21.
Distribute to 4, 25.

Next, to explain the operation, the A/D converter 12
The original signal X _D digitized by
X _D ′ is output. This differential signal X _D ' corresponds to a signal X _D ' delayed by (p+1) clocks from the actual input signal. Next, the smoothing processor 15 outputs a signal _{D '} ' which is obtained by smoothing the signal XD'. This signal _D '' corresponds to the signal XD _' ' which is delayed by (p+1) clocks from the signal _XD '. On the other hand, the differential output signal X _D ' from the processor 14 is further subjected to first-order differentiation by the processor 13, and a second-order differential signal X _D '' is output. This is a signal corresponding to X _D ″ which is delayed by (p+1) clocks from the signal X′ _D. In other words, at the final stage, the original digital signal
A signal X _{D ''} delayed by 2×(p+1) clocks from X D, its smoothed signal _D '_' , a first-order differential signal X _D , and a second-order differential signal X ¨ _D '' are output with the same time relationship.

Here, as described above, the first-order differential signal X _D '' is a signal obtained by delaying the differential output signal X _D ' by (p+1) clocks.

In the embodiment shown in FIG. 6, the four output signals having respective filtering characteristics have the same configuration for performing calculations, so that no phase shift occurs. Moreover, these filtering operations
Since it is performed only by logical operations such as addition and subtraction, it can be processed in an extremely short time compared to the signal sampling time for A/D conversion of the original electrocardiogram signal _XA . Above, each filtering output X _D ″,
_D ″, XX¨D″, X¨D _″ are the holding devices 16 _, 17, respectively.
18, 19, multiplexer 20
Accordingly, the filtering output signal is distributed to each storage device 22 to 25 for storing the filtering output signal. Storage device 22, 2
Using the filtering output results stored in 3, 24, and 25, spike wave detection, rising point detection, waveform measurement, etc. of the electrocardiogram waveform are performed. Figure 7a,
Of the filtered output signals obtained in this embodiment, b and c show the original signal X _D ″(a), the smoothed output signal _D ″(b), and the second-order differential output signal X _D ″( c).

According to the present invention, 1) compared to known digital filters, this processor does not require multiplication/division calculation processing, so it is capable of high-speed signal processing, and almost simultaneously with the completion of A/D conversion of analog signals. A first-order differential output signal and a second-order differential output signal of the smoothed output signal can be obtained, and the signal analysis time is significantly improved. 2) With this method, a smoothed signal, a first-order differential signal, and a second-order differential signal with no phase difference can be obtained, thereby eliminating the need for processing such as phase distortion correction that is necessary in analog signal analysis. 3) Differential filters and smoothing filters with many types of characteristics can be realized without changing the configuration by simply selecting parameter settings from the outside, so it is possible to create the optimal filter by changing the characteristics as appropriate depending on the quality of the analog signal. You can choose. 4) Since this processor consists only of addition/subtraction, logical operations, and shift registers, it can be easily integrated into an integrated circuit, and analog signal processing devices such as electrocardiogram analysis devices can be miniaturized.

[Brief explanation of the drawing]

Figure 1 is a diagram showing an example of an electrocardiogram signal, Figure 2 is a diagram showing ideal frequency characteristics in reduced differential processing, Figure 3 is a diagram showing an example of a configuration in which addition and subtraction can be switched by an external control signal, and Figure 4 is a diagram showing differential FIG. 5 is a diagram showing a case where the processor of FIG. 4 is arranged in a tree structure, and FIG. 6 is a diagram showing an embodiment of the present invention. FIG. 7 is a waveform diagram for explaining the operation of the present invention.

Claims (1)

[Scope of utility model registration request] An A/D converter samples an analog signal at a predetermined clock and converts it into a digital signal, and delays the time-series digital signal converted by the A/D converter so that the first signal becomes the center. a delay means for outputting a predetermined number of pairs of second and third signals that are equally spaced back and forth in time series; 1, a second multiplier that multiplies the second signal by a second coefficient signal that takes a value of +1 or -1; a first addition means for adding the signal and the output of the second multiplication means; a value of 0 or 1 corresponding to the time interval between the output of the first addition means and the second or third signal; A predetermined number of basic circuits each having a third multiplication means for multiplying a second coefficient signal that takes a value are provided, and a second addition means for adding the outputs of these basic circuits; A signal processing device comprising: third addition means for adding the output of the multiplication means and the output of the second addition means.