JPH0389523A - Focusing device to sample surface - Google Patents

Abstract

PURPOSE:To adjust the focus onto a sample surface with excellent follow-up properties by calculating an inclination formed by the sample loading surface of a stage and the sample surface from three points on the sample surface, converting an arbitrary position on the sample surface into coordinates on the stage and driving and controlling the stage at the arbitrary position. CONSTITUTION:An X-Y stage 1 is moved and a reference point 20 is conformed to the reference mark C of a monitor device 8, and a Z stage 2 is regulated so that the focus is adjusted onto the surface of a chip 3. Stage coordinates (XO, YO, ZO) are read by displacement detectors 11, 12, 13, and input to a computer 15 through an interface device 14. Likewise, the X-Y stage 1 is shifted to the positions of an alignment mark 21 [chip coordinates (xf, yf)] and 22 [chip coordinates (xs, ys)], the Z stage 2 is adjusted, the stage coordinates are read by the computer 15, and the equation of a plane displaying the chip surface in an XYZ coordinate system is determined from the three points. Accordingly, when an arbitrary point (x, y) on the chip 3 is given, the computer 15 acquires the X, Y, Z coordinates of the point, and conducts assignment to the X-Y stage 1 and the Z stage 2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method and apparatus for forming wiring on the surface of a semiconductor element, and in particular to a sample suitable for focusing on an arbitrary location on the surface of the element. Relating to a surface focusing device.

[Conventional technology]

Semiconductor integrated circuits (LSIs) are being miniaturized and highly integrated in order to improve their performance and speed, but this has made LSI development difficult and lengthened the development period. is inviting. Under such circumstances, it is necessary to identify the defective part on the prototype LSI chip and repair the defective wiring by cutting the wiring existing in that part or by forming wiring in an arbitrary part. If an LSI with perfect operation is manufactured, subsequent characteristic evaluations and design changes can be carried out quickly.

As for the conventional technology related to LSI repair, for example, Extended Abstracts on the Seventeenth Conference on Solid State Devices and Materials, Tokyo, 1985, M.
Pages 193 to 196 (Extend@d Abs
tracts of the 17th Conference
enceon 5olid 5tate peviae
s and Materials, Tokyo.

1985, pp. 193-196) discusses a method for connecting arbitrary points. For this purpose, Mo(CO) vapor is introduced into the LSI chip installed on the X-Y stage, a Mo film is deposited by a photochemical reaction caused by laser light irradiation, and the Mo wiring is moved by moving the X-Y stage. Laser CV D (Ch
chemical vapor deposition) technology is shown.

Further, for example, Japanese Patent Laid-Open No. 119853/1983 discloses a technique of burying through holes with a conductive material using laser CVD technology.

If a multilayer wiring is formed under a protective film or a multilayer wiring is formed, a window is made in the insulating film between the eyebrows, a conductive material is filled in the hole (window part) using the laser CVD technology, and then the wiring is formed. By doing so, any location can be connected.

Laser CvD is a local thermochemical reaction at a laser irradiation location and has a fast film formation rate, so it is attracting attention because it can shorten the time required for LSI repair. The formed film (conductive film) is required to have low resistance from the viewpoint of signal transmission, and also to be free from discontinuities, cracks, and peeling because it needs to be able to withstand use during LSI debugging.

In order to improve the reliability of these films, the process conditions for film formation (stage feed speed, laser power, base film formation conditions, etc.) should be optimized, and the laser should be efficiently irradiated onto the LSI surface from the equipment side. An autofocus function is required for this purpose.

As a prior art related to autofocus, an autofocus device for a microscope is known, for example, as disclosed in Japanese Patent Application Laid-Open No. 57-53923.

[Problem to be solved by the invention]

The above-mentioned conventional technology (automatic focus device for a microscope) irradiates a sample with illumination light (laser light), detects defocus from the reflected light, and places the sample in the photomask or wafer inspection process in the LSI manufacturing process. The height of the stage is adjusted to match the focal point.

The focusing procedure is as follows. The sample is irradiated with illumination light, and the reflected light is divided into two systems by a prism and guided to two light receiving sections. When a focus shift occurs, an imbalance occurs in the amounts of reflected light at the two light receiving sections, and the direction of the focus shift can be detected from the degree of change. The stage is controlled by a servo motor, and the stage is moved slightly in the height direction by manually inputting the difference in electrical signals of defocus at the light receiving part to the servo motor, and the stage is always maintained in focus. .

As described above, the automatic focusing device of a microscope is extremely difficult to use when the stage is moved a small distance in the X and Y directions and then stopped, as in the case of an inspection process. 'IIFIL It is possible to focus with good followability. On the other hand, in laser CVD, in order to form wiring, an X-Y stage is moved over a long distance (maximum 10 m) at a predetermined speed (for example, 20 μ%'l) while the sample surface is irradiated with a laser beam. In this case, since there are variations in the way the sample is held on the X-Y stage, the X-Y stage surface and the sample surface are not parallel. Therefore, an autofocus function that focuses on the sample surface while moving the XY stage is essential.

When a conventional automatic focusing device of a microscope is applied to wiring formation in laser CVD, there is a problem in followability since the target is a sample that is constantly moving in the X-Y direction. In other words, if a focus shift occurs during wiring formation and the direction or amount of movement of the two stages is incorrect, the focusing operation will not be possible from then on, and the LSI surface will not be irradiated with a good laser beam rate, resulting in There is a problem in that the wiring inside is broken. That is, in laser CVD,
During wiring formation, it was a challenge to constantly focus on the sample surface with good followability.

The purpose of the present invention is to
An object of the present invention is to provide a focusing device for a sample surface that can focus on the sample surface with good followability.

[Means to solve the problem]

The above purpose is to provide a focused point detection means that can detect that an arbitrary point on the surface of a sample (LSI chip) placed on a stopped stage is in focus, and a method for adjusting the height of the sample.
For the stage and a certain point on the chip surface, there are three linear scales of X, Y, and Z that read the stage stranding at this point, and after receiving the input of the value of this linear scale, When given an arbitrary point on the chip, the computer calculates the inclination of This is accomplished by an X-Y stage and two stages configured to drive and control the two stages.

[Effect]

In the above configuration, before irradiating the laser, the surface of the sample (chip) is focused at three different points, and the coordinates on the x, y, and z stages at each point are read into the computer. The computer calculates the inclination of the chip surface and the plane of the XY stage based on the coordinates (three-dimensional seat 11)'B of the three points on the stage. When forming wiring between arbitrary points on a chip by irradiating laser beams,
The drive of the XY stage and the second stage is controlled based on the calculation result of the above-mentioned inclination. As a result, when forming wiring at any point on a chip by laser CVD, the focus can always be set on the chip surface, and highly reliable wiring can be formed.

〔Example〕

Embodiments of the present invention will be described below with reference to FIGS. 1 to 6, taking the case of LSI wiring repair as an example.

Figure 1 is a configuration diagram of an embodiment of a focusing device for a sample surface according to the present invention, and Figure 2 is a surface diagram of an LSI chip.
Figure 3 is a configuration diagram of an LSI chip mounted on an X-Y stage, Figure 4 is a diagram showing the relationship between the chip surface and the X-Y stage surface, and Figure 5 is a diagram showing the relationship between the chip surface and the X-Y stage surface. FIG. 6 is a block diagram of an LSI wiring forming apparatus to which the focusing device for the sample surface shown in FIG. 1 is applied. Moreover, FIG. 1g7 is an explanatory diagram of a connection hole opened to the M wiring of the LSI, and FIG. 8 is a flowchart for repositioning.

First, the configuration and operation of an embodiment of the present invention will be explained with reference to FIGS. 1 to 5. In FIG. 1, an LSI chip 3 is placed on an X-Y stage l. lighting lamp l
The illumination light from O is irradiated onto the surface of the LSI chip 3 through the lens 9, the half mirror 5, and the objective lens 4, while the surface of the chip 3 is imaged by the TV camera 6 through the objective lens 4. The image signal from the image processing device 6 is displayed on the monitor device f8 through the image processing device 7, while the i! ! l Image processing equipment. It is also connected to a computer 15. By moving the two stages 2 up and down, the monitor device 8
The lens is configured to focus on the surface of the LSI chip 3 while looking at the image. Further, 11, 12, and 13 are displacement detectors that read the position of the XY stage 1%2 stage 2, and are connected to the computer through the interface circuit 14.
In step 5, values in the XYz coordinate system at arbitrary positions on the LSI chip 3 are read. Also, in response to a command from the computer 15 via the interface circuit 14, the XY stage 1%
The configuration is such that two stages 2 are controlled.

As shown in Figure 2, the L
The SI chip 3 depends on how to hold the chip when placed and
- The foreign object 19 (for example, a cut piece during chip dicing) present on the Y stage l causes it to be fixed in a tilted or floating state. The chip itself may have uneven thickness or warpage, and the X-Y stage side may have problems with flatness or orthogonality.
#L is a question, but the influence is negligible and is so small that it is about ″-1. Also, the height difference on the chip surface is 10 μm at maximum.
And small. On the other hand, the foreign object 19 has a diameter of 50 μm and has a diameter of 10 μm.
(2) Assuming that it is located at the center of the chip No. 1, there will be a difference of 100 μm between both ends of the chip, and the chip surface and the XY stage surface will have an inclination of 0.6°. When performing wiring formation by laser CVD by irradiating laser light in such a state,
In order to focus on the chip surface, it is necessary to control the height direction (two directions) as well.

Assuming that the coordinate system on the chip 3 is represented by lowercase letters X, 7, and the coordinate system on the stage 2 is represented by uppercase letters X, Y, Z, the three points on the chip 3, 20 , 21 , 22
think of. 2 is a reference point of the chip, and 21 and 22 are alignment marks whose coordinates are determined at the time of LSI design. For the following explanation, 20°21, 220
−x,y coordinate value (xOe)'o)s(
xf, yf).

(Xs-)'s).

In FIG. 1, first, the X-Y stage 1 is moved to align the reference point addition with the reference mark C of the monitor device 8, and the two stages 2 are adjusted so that the chip surface is in focus. And the stage coordinates at this time (Xo.

-Yo = Zo) to displacement detectors 11, 12, 13
and input it into the computer 15 through the interface device 14. This is shown in step 31 of the process flow in FIG. Next, in the same way, alignment marks 21 (chip coordinates (xf, yf)) and 22 (chip coordinates (
Move the X-Y stage 1 to the position ``s-3's)'', align it with the reference mark C on the monitor 8, adjust stage 2 so that the chip surface is in focus, and then set the stage coordinates ( Xf, Yf, Zf) and (Xi, Ya
, Zs) are respectively read into the computer 15. (Steps 32 and 33 in Figure 5) If three points in space are given, the plane containing those three points is uniquely determined, so the computer 15 calculates (Xo-Yo-Zo), (
From the three points Xf, Yf-Zf)-(Xa-Ys-Za), the equation (1) of the plane representing the chip surface in the XYZ coordinate system can be determined as follows.

In other words, A-Tomi 1B” + C-Tomi = 1
・・・・・・・・・ (3)) JCf+BYf+C
Zf+D = 0 ・・−・−・−・(4) is established, and A, B, C, and D are determined from this.

A, B, and C represent the direction vectors of the surface 3a of the LSI chip 3 as shown in Figure @4, and the X, Y, and Z
When the angles with the axis are α, β, and r, A, B, and C are direction cosines. That is, in this way, computer 1
5 is A, B according to equations (2), (3), and (5).
, C and α, β, r are calculated.

(Step 15a in FIG. 5) When an arbitrary point (x, y) on the LSI chip 3 is given (Step 34 in FIG. 5), the computer 15 calculates the X, Y, and Z coordinates of this point. (5th
Figure step 15b) X-Y stage 1. By specifying the Z stage 2, any point on the surface of the chip 3 can be focused.

In the above explanation, (xt, yf), (xl*ys)
are the coordinates of the alignment mark, but there is no need to be limited to this, as long as the coordinate values on the chip including the reference point (xI)-yo) are clear. It goes without saying that the calculation accuracy is better when these three points are far apart from each other.

If the above embodiment is applied to wiring formation using laser CVD, the laser focal point can always be aligned with the chip surface even when forming long-distance wiring, so the reliability of the formed wiring can be improved. I can do it. This will be explained next.

FIG. 6 is a diagram showing focusing on the sample surface in the above embodiment. In the figure, the same symbols as in Figure 1 are given.
Indicates something that is the same or equivalent to something that has already been explained,
The explanation will be omitted.

First, wiring formation will be explained. In FIG. 6, a load lock chamber 41 is connected to a main chamber 43 via a gate valve 42, and a Makabe pump 44,
44' pipe 45 m 45' and i4) rev 4
The structure is such that exhaust can be exhausted through the 6°46' angle. Inside the main chamber 0, a sample (LSI chip or Ueno\ in some cases) is placed on a sample stage 47, and a rim ic m structure that can be moved by an X-Y stage 1 and a driving device 1a is placed. has been done. The chi knob (or wafer) 3 is supplied into the main chamber 43 together with the sample stage 47 by a transport mechanism 51 . In addition, the main chamber 43 is equipped with a pipe 52 and a valve 53.
D material gas cylinder 54 is sticky. The laser beam 56 output from the laser oscillator 55 is transmitted to the shutter mechanism 5.
7. Output g! After being bent by a mirror 59 via a bond structure 58, the light is focused by an objective lens 4 and irradiated onto a wafer 3 through a window 61. Further, the illumination destination from the illumination light source 10 is bent by a mirror 5 through a filter, and then passed through an objective lens 4 and a window 61 to an LSI chip 3.
Illuminate the top. The surface of the LSI chip 3 can be observed through a mirror and an eyepiece 67, and can also be observed through the imaging device 6 and the image processing device fi7 and monitor device [8] connected thereto. Here, it is assumed that optical adjustment has been made so that the chip surface is imaged on the imaging device 6 at the position of the objective lens 4 where the laser beam is focused onto the chip surface. The computer 15 also controls the shutter mechanism 5.
7. It is configured to control the output w4 adjustment mechanism, filter u, etc.

Next, the functions of each part and the procedure for forming wiring will be explained.

An LSI chip (or wafer) 3 on which wiring is to be formed is fixed on a sample stage 47, and placed on an XY stage l in a main chamber mallet by a transport mechanism 51. After the main chamber 6 is sufficiently evacuated by the air pump 44', the valve 46' is closed and the valve 53 is opened, and the gas in the cylinder 8, for example, Mo(Co)s, is pumped into the pipe 5.
2 into the main chamber 43. Mo(C
When the gas pressure of O) is set to a predetermined pressure, e.g.
When this happens, close the valve.

Then, the reference point C (for example, the center of the field of view) on the monitor device 8 was adjusted in advance so that it coincided with the center of the laser spot, and the output adjustment mechanism was set to an appropriate value based on instructions from the computer 15. Thereafter, the shutter mechanism 57 is driven to irradiate the chip (or wafer) 3 with laser light output from the laser oscillator 55 . Irradiation position (
That is, the wiring formation position on the LSI chip is determined by inputting coordinate data from the host computer 16 into the computer 15 and moving the XY stage l according to the coordinate data. The irradiated area is heated by the laser beam, and MO(CO)@ is decomposed and 1o is precipitated. At this time, when the X-Y stage 1 is moved according to the coordinate data, the precipitated Mo adheres to the surface of the wafer (or chip) 3, forming an edge. The above procedure explains how to form wiring on an LSI, but the above-mentioned focusing device on the sample surface is applied to align the zero point on the surface of the LSI during wiring formation.
Its operation is as follows.

That is, in FIG. 6 1ζ, before irradiating the laser, three points on the chip 3 (however, it is assumed that the chip coordinates of these three points are given by the host computer 16 and the coordinate values are known). ), then observe it with the monitor device 8 and move it to the X-Y stage 1. The computer 15 reads the XYZ coordinates when the Z stage 2 is moved, aligned with the reference mark C, and focused for imaging. The computer 15 calculates the inclination between the LSI chip surface and the XY stage surface and calculates the parameters ((
6) Find α, β, r) in the equation. This allows L
When an arbitrary point on the SI chip is input from the host computer 16 to the computer 15, the computer 15 calculates the XYz coordinates of that point and moves it to the XY stage 1. Z
Commands are given to the stage 2 through the drive device l&. Thereby, wiring formation can be performed while always focusing on the chip surface.

Next, FIG. 7 shows the correction lζ of the wiring formation position.

This will be explained using FIG. , in Fig. 7, M of the LSI
The hole 3a made in the wiring has a size of 5 μmo. The chip coordinates of this hole position (hole center) are (Xs m
)'s ), it is converted into an XYz coordinate system by the focusing device on the sample surface of the present invention (Step 7 in Fig. 8).
1) Consider the case where L, XY stages, and 2 stages are driven. (Step 72 in Fig. 8) At this time, the reference mark C, that is, the laser irradiation position on the monitor device 8 is shifted by jL no Y with respect to the stage coordinates (XI - Ys - Z+) as shown in Fig. 7 (&). Suppose that AX and AY are caused by the accumulation of factors such as the driving accuracy of the XY stage, calculation rounding errors in coordinate transformation, and deviations during LSI window drilling, and the deviations can reach a maximum of 1A. If you irradiate the laser to connect the M wiring (fill in the holes) in this state, it will cause a connection failure.If you detect such a shift, check the jX while looking at the monitor device 8.

jY is determined visually (step 71 in FIG. 8), and the XY stage 1 is moved m<step 74 in FIG. 8), and the center of the hole 3a and the reference mark C are aligned as shown in FIG. 7(b). In the process of step 73, iz and aY may be calculated using an image processing method such as pattern Mr&, instead of visual observation. After that, irradiate the laser and fill in the holes (Step 75 in Figure 8)
I do. In addition, for 2-way same, JX, J'ff1l1
Since it is a small value of less than μm, there is no need for correction. Next is wiring formation, for example, as shown in Figure 7 (C), from chip coordinates (Xls'lt) to (x*, yt)
When pulling out the wiring to gg8, based on the correction value j)(,4Y obtained in step 73 in figure gg8, the coordinate transformation diameter is also corrected for the point (XI, y-), and (xl-)jX.

Yt +1Y-Zl) From (X, +, dX, Yt
+JY, ZJ HeX Y Stage 1. By driving and controlling the Z stage 2, it is possible to form wiring 3b without connection defects from the hole 3&.

As an application example of the present invention, the wiring formation fA device by laser CVD has been described above, but it can also be applied to wiring formation by ion beam CVD, a device for cutting wiring by an ion beam, or a processing device by an electron beam. It goes without saying that the focusing device of the present invention can be applied to the sample surface.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to perform focusing at any point on the chip based on the focusing results at three points on the chip before processing, so it is possible to repair an LSI chip with a defective part. In this case, highly reliable wiring formation can be achieved. This allows rapid debugging during LSI development.

[Brief explanation of drawings]

Fig. 1 is a configuration diagram of an embodiment of a focusing device for a sample surface according to the present invention, and Fig. 2 shows an LS mounted on an XY stage.
Figure 3 is a schematic diagram of an I chip, Figure 3 is a surface diagram of an LSI chip, Figure 4 is a diagram showing the relationship between the chip surface and the X-Y stage surface, and Figure 5 is a diagram showing the computer processing flow in Figure 1. Figure 6 is a configuration diagram of an LSI wiring forming device that applies the focusing device for the sample surface shown in Figure 1, Figure 7 is an explanatory diagram of a connection hole made to the M wiring of an LSI, FIG. 8 is a flowchart of position correction. l...X-Y stage 2...2 stage 3...
・Sample (LSI chip or wafer) 4...Objective lens 6...Imaging device 8...Monitoring device
ti, 12.13...Displacement detector 15...
Computer □ Figure ff 12 Figure Punishment 5 Figure 44 Figure 5 Figure Fog 6 Figure He 7 Tripping and climbing b Punishment 81;

Claims (1)

[Claims] 1. A stage on which a sample is mounted and has three-dimensional driving freedom, an observation optical system that detects when the sample surface is in focus, and when the sample surface is in focus. A length measuring means reads the three-dimensional position coordinates of the stage, and the coordinates from the length measuring means are input, and from three points on the sample surface, the sample mounting surface of the stage (X-Y plane) and the sample surface are measured. and calculation means for calculating the slope of
Convert any position on the sample surface to coordinates on the stage,
A focusing device for a sample surface, characterized in that when the stage is driven and controlled to this position, the sample surface is brought into focus. 2. The inclination between the X-Y plane of the X-Y-Z stage carrying the sample and the sample surface was calculated in advance, and the stage was driven in the XY direction to move from one point on the sample surface to another. A focusing device for a sample surface, characterized in that the stage is also controlled in the Z direction based on the calculation result so that the focus is always on the sample surface during movement. 3. The focusing device for a sample surface according to claim 1 or 2, wherein the observation optical system for detecting that the sample surface is in focus includes an imaging device and a monitor device. 4. The focusing device on the sample surface according to claim 1 or 2, wherein the means for calculating the inclination between the stage and the sample surface and driving and controlling the stage is constituted by a computer and a computer interface device. . 5. The device for focusing on a surface of a sample according to claim 1, wherein the sample is an LSI chip or a wafer. 6. If the sample is an LSI chip or wafer, a specific position on the sample is corrected in the X-Y direction using an observation optical system, and another location related to the specific position is also corrected using the correction value and then moved to the stage. 3. A focusing device for a sample surface according to claim 1 or 2, characterized in that said focusing device controls said focusing device on said sample surface. 7. The focusing device for a sample surface according to claim 6, wherein the specific position and the related position to the specific position are an LSI chip or a wafer on which wiring is to be corrected.