JPH0386973A - Reproducing signal detection system - Google Patents

Abstract

PURPOSE:To enable the exact detection of a reproducing signal by superimposing offset to the reproducing signal based on the code decided result of a second order differential coefficient in the reproducing signal. CONSTITUTION:A reproducing analog signal 1 is inputted to a second order differentiating circuit 2 and in this circuit 2, second order differentiation is executed. Afterwards, the code of the second order differential coefficient is decided for each bit by a second order differential coefficient decision part 3. Next, based on the result of this decision, the offset is generated for each bit by an offset generation part 4 and this offset is superimposed to the reproducing analog signal, which is delayed by a delay element 5, by a processing circuit 6. Thus, the distortion of the reproducing signal caused by waveform interference, etc., can be corrected and a detection error can be prevented.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a reproduction signal detection method for an information storage and reproduction device, and in particular to a method for converting an analog signal reproduced from information stored in a storage medium into a digital signal. This invention relates to a reproduced signal detection method.

[Prior Art] Conventionally, optical disks, magneto-optical disks, and the like are known as information storage/reproduction devices. Among these, magneto-optical disks are capable of recording and reproducing, and recording is performed by the direction of magnetization, and reproduction is performed by detecting changes in the polarization plane of reflected light.

As modulation methods for recording data on such magneto-optical disks, 4/15 modulation, 4/11 modulation, etc. have been proposed.

4/15 modulation converts an 8-bit data word into a 15-bit channel word and records it.
5 bits always include 4 bits of °°1°°.

Of the 15 bits of the channel word, two "1's" are assigned to odd bits and two "1's" are assigned to even bits. Therefore, when demodulating channel words into data words,
The channel word can be separated into odd bits and even bits and demodulated.

Furthermore, 4/11 modulation converts an 8-bit data word into an 11-bit channel word and records it.
5 modulation, 4 bits in the 11 bits of the channel word
However, since the channel word consists of 11 bits, "1" is added to odd and even numbers like 4/15 modulation.
There is no such thing as allocation.

A differential detection method is known as a method for detecting fixed length block codes such as 4/15 modulation and 4/11 modulation.

FIG. 4 is a block diagram of an example of a circuit configuration of a conventional 4715 modulation difference detection method.

In FIG. 4, 1 is an input reproduced analog signal.

This reproduced analog signal 1 is sent to the sample hold circuit 42.
The sample is held by a clock (not shown).
The A/D converter 7 converts the signal into a digital signal.

The reproduced signal converted into a digital signal is input to a multiplexer 43, and is outputted to a comparator 44, 45 depending on whether it is an even-numbered bit or an odd-numbered bit of the channel word. The comparator 44 stores this digitized reproduction signal in registers 441 and 442.

In the comparator 44, after storing the first two reproduced signal values in registers 441.442 in order, when the third reproduced signal is input from the multiplexer 43, the registers 441.
The values of 442 are compared by a comparator 443, and the smaller one is output. This value is compared with the third reproduced signal by the comparator 444, and if the third input signal is larger,
The smaller value of registers 441 and 442 is stored. At the same time, the position of the third bit is also stored.

If the output of comparator 443 is larger,
The third input is ignored and not stored in any register.

Next, the fourth reproduced signal is also compared and stored using the same process as above.

After comparing up to the last bit of one block in this manner, the values of registers 441 and 442 and the positions in the bits are transmitted to a demodulation circuit (not shown), where demodulation is performed.

[Problems to be Solved by the Invention] However, in the conventional example described above, as shown in FIG. There was a drawback.

In other words, 21 in Fig. 5 indicates the recorded code,
The reproduced analog waveform when the recorded code 21 is reproduced is as shown in 22. When this reproduced analog waveform 22 is subjected to differential detection, the reproduction level order becomes 56.

In this case, although the third bit of bit No. of the reproduced waveform 22 is originally "0", it is erroneously determined to be "1" by the detection code 57.

[Means and effects for solving the problem] According to the present invention, there are provided a means for second-order differentiating a reproduced signal reproduced from a recording medium, a means for determining the sign of the second-order differential coefficient, and a second-order differential coefficient for determining the sign of the second-order differential coefficient. By providing a means for superimposing an offset on the reproduced signal based on the sign of , distortion of the reproduced signal due to waveform interference etc. can be corrected, and detection errors can be prevented.

[Example] (Example 1) FIG. 1 is a block diagram showing a first example of the present invention.

In FIG. 1, l is a reproduced analog signal, 2 is a second-order differentiator, 3 is a coefficient sign judgment section of the second-order differentiation circuit 2, and 4 is an offset generated based on the judgment result of the second-order differentiation coefficient judgment section 3. An offset generating section 5 is a delay section such as a delay element that delays the reproduced analog signal; 6 is a delay section for synchronizing the reproduced analog signal 1 delayed by the delay section 5 and the offset output from the offset generating section 4; 7 is an A/D converter that converts the processed reproduced analog signal outputted from the processing circuit 6 into a digital signal; 8 is an A/D converter that processes the reproduced analog signal 1;
A difference detection section 9 detects a difference in the output of the /D converter 7, and a detection pulse 9 is output from the difference detection section 8.

The operation of this embodiment will be explained below with reference to FIG.

21 in FIG. 2 indicates the originally recorded code. When this code 21 is reproduced, the waveform of the reproduced analog signal 1 in FIG. 1 becomes as shown in FIG. 22.

This reproduced analog signal 1 is input to a second-order differentiator circuit 2, where it is second-order differentiated. Thereafter, the sign of the second-order differential coefficient is determined for each bit in the second-order differential coefficient determination section 3 (FIG. 224).

Next, based on this determination result, the offset generating section 4 generates an offset for each bit. This offset is superimposed on the reproduced analog signal l delayed by the delay element 5 by the processing circuit 6.

In this embodiment, the method of superimposing is that if the sign of the second-order differential coefficient is -, an offset value of 10 is superimposed, and if the sign of the second-order differential coefficient is 10, an offset value of - is superimposed. Superimposed.

As a result, the reproduced analog waveform after processing is corrected as shown in FIG. 25. The reproduced waveform 25 after this processing is converted into a digital signal by the A/D converter 7, and then the difference is detected by the difference detection section 8.

As a result, the level order of the reproduced signal after processing is shown in Fig. 26.
As a result, the detection code is as shown in Figure 2.
7 is detected accurately.

(Embodiment 2) In the first embodiment, the second-order differential coefficient is derived for each bit of the channel word.

In this second embodiment, the second-order differential coefficient is not derived for each bit, but the sign is derived for each inflection point, as shown in FIG. 34, so that the same effect can be obtained. This is what I did.

[Effects of the Invention] As explained above, by determining the sign of the second-order differential coefficient of the reproduced signal and processing the reproduced signal based on the result, the influence of waveform interference can be removed and the reproduced signal can be detected accurately. You can get the effect that it becomes possible.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a reproduced signal detection method embodying the present invention; FIG. 2 is a diagram for explaining the first embodiment; FIG. 3 is a diagram for explaining the second embodiment; FIG. 4 is a block diagram of a difference detection circuit in a conventional reproduction signal detection method, and FIG. 5 is an explanatory diagram of problems in the conventional reproduction signal detection method. 1 is a reproduced analog signal, 2 is a second-order differential circuit. 3 is a second-order differential coefficient determination section, 4 is an offset generation section, 5 is a delay section, 6 is a processing circuit, 7 is an A/D converter, and 8 is a difference detection section.

Claims (2)

[Claims] (1) means for second-order differentiating a reproduced signal reproduced from a storage medium; means for determining the sign of the second-order differential coefficient; 1. A reproduction signal detection method, comprising: means for superimposing a signal on a signal. (2) The superimposing means superimposes a + offset value if the sign of the second-order differential coefficient is -, and superimposes a - offset value if the sign of the second-order differential coefficient is +. The reproduced signal detection method according to claim 1, characterized in that: