JPH0383390A - Low dielectric circuit board - Google Patents

Low dielectric circuit board

Info

Publication number
JPH0383390A
JPH0383390A JP22104489A JP22104489A JPH0383390A JP H0383390 A JPH0383390 A JP H0383390A JP 22104489 A JP22104489 A JP 22104489A JP 22104489 A JP22104489 A JP 22104489A JP H0383390 A JPH0383390 A JP H0383390A
Authority
JP
Japan
Prior art keywords
circuit board
fluororesin
cloth material
low dielectric
impregnated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22104489A
Other languages
Japanese (ja)
Inventor
Akio Yamaguchi
山口 章夫
Eisei Tanaka
田中 永生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Priority to JP22104489A priority Critical patent/JPH0383390A/en
Publication of JPH0383390A publication Critical patent/JPH0383390A/en
Pending legal-status Critical Current

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  • Laminated Bodies (AREA)

Abstract

PURPOSE:To obtain a circuit board having low dielectric constant by stacking a metal layer on the surface of a copolymer paraphenylene-3,4'- oxydiphenylene.terephthalamide PPODTA cloth impregnated with fluorinated hydrocarbon resin through a fluorinated hydrocarbon resin layer. CONSTITUTION:Fluororine resin such as polytetrafluoroethylene, tetrafluoroethylene-hexafluoropropylene copolymer, tetrafluoroethylene- perfluoroalkylvinylether copolymer, etc., is impregnated with woven fabric or nonwoven fabric made of PPODTA. Three cloths 1 are adhered to each other with fluorinated hydrocarbon resin film 2. Metal layer 3 is adhered to both side surfaces of the cloth 1 through the films 2. The layer 3 is formed in a pattern state to form a circuit.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明F′i電子機器、コンピュータ等の高周波域にも
適用可能な低誘電率回路基板に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a low dielectric constant circuit board that can be applied to high frequency ranges such as F'i electronic equipment and computers.

(従来の技術) 回路基板としては、フッ素樹脂を含浸せしめたガラス布
の表面に、フッ素樹脂フィルムを介して金属箔を接合せ
しめたものが知られている。
(Prior Art) As a circuit board, one in which a metal foil is bonded to the surface of a glass cloth impregnated with a fluororesin via a fluororesin film is known.

この回路基板は熱膨張率が高い場合があり、防用環境の
温度変化に対応して膨張・収縮現象を生じ、そのため高
周波特性が変動し易く、高周波域への適用には懸念があ
った。
This circuit board sometimes has a high coefficient of thermal expansion, causing expansion and contraction phenomena in response to temperature changes in the protective environment, and as a result, its high-frequency characteristics tend to fluctuate, creating concerns about its application to high-frequency ranges.

(発明が解決しようとする課題) 一方、近年、フッ素樹脂を含浸せしめた芳香族ポリアミ
ド繊維布の表面に、フッ素樹脂フィルムを介して金属箔
を接合せしめた回路基板も提案されている(特開昭63
−290735号公報)。
(Problem to be Solved by the Invention) On the other hand, in recent years, a circuit board in which metal foil is bonded to the surface of an aromatic polyamide fiber cloth impregnated with a fluororesin via a fluororesin film has also been proposed (Unexamined Japanese Patent Publication No. Showa 63
-290735).

この回路基板は上記従来品に比べ、低誘t″4化され、
しかも熱膨張も小さいという利点がある。
This circuit board has a lower dielectric potential of t″4 compared to the conventional product mentioned above,
Moreover, it has the advantage of low thermal expansion.

ところで、最近の回路基板に対する性能向上の要求は強
く0例えばコンピュータにかける信号伝送速度の高速化
遠吠のため1回路基板の一層の低誘電率化が求められて
いる。
Incidentally, in recent years, there has been a strong demand for improved performance of circuit boards. For example, in order to increase the signal transmission speed of computers, there is a demand for circuit boards with even lower dielectric constants.

(課題を解決するための手段) 本発明者はかような現状に鑑み鋭意検討の結果。(Means for solving problems) The inventors of the present invention have conducted extensive studies in view of the current situation.

回路基板の基材として特定の布材を用いると、誘電率が
2.3台と一段と低くでき、且つ熱膨張率の小さなもの
となることを見出し1本発明に至った。
The inventors have discovered that when a specific cloth material is used as a base material for a circuit board, the dielectric constant can be lowered to 2.3, and the coefficient of thermal expansion can be lowered, leading to the present invention.

即ち0本発明に係る低誘m率回路基板は、フッ素樹脂が
含浸+i″17められたコポリパラフェニレン3.4′
オキシジフエニレン・テレフタラミド(以下、PP0D
TAと称す)!!lI布材の表面に、フッ素樹脂層を介
して金H4Mがat層せしめられて成るものである。
That is, the low permittivity circuit board according to the present invention is made of copolyparaphenylene 3.4' impregnated with a fluororesin.
Oxydiphenylene terephthalamide (hereinafter referred to as PP0D)
(referred to as TA)! ! It consists of an at layer of gold H4M on the surface of the lI cloth material via a fluororesin layer.

本発明にかいて用いられる布材は下記構造式(1)で示
されるPP0DTAから成るもので、I&布あるいは不
織布のいずれも用いることができる。
The cloth material used in the present invention is made of PP0DTA represented by the following structural formula (1), and either I& cloth or nonwoven fabric can be used.

そして、この布材Vcはポリテトラフルオロエチレン(
PTFE)、テトラフルオロエチレン−へキサフルオロ
プロピレン共重合体(FEP)、テトラフルオロエチレ
ン−パーフルオロアルキルビニルエーテル共重合体(P
FA)等のフッ素樹脂が含浸せしめられる。
This cloth material Vc is polytetrafluoroethylene (
PTFE), tetrafluoroethylene-hexafluoropropylene copolymer (FEP), tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer (P
It is impregnated with a fluororesin such as FA).

布材に対するフッ素樹脂の含浸量は、布材の織目の粗密
、布材を構成する繊維の太さ等に応じて設定できるが、
織目を充填して空隙を残さないこと、および含浸後の表
面を平滑にするため、含浸率を40〜75%とするのが
好適であることが判明した。
The amount of fluororesin impregnated into the cloth material can be set depending on the density of the weave of the cloth material, the thickness of the fibers constituting the cloth material, etc.
It has been found that an impregnation rate of 40 to 75% is suitable in order to fill the texture and leave no voids and to smooth the surface after impregnation.

布材に対するフッ素樹脂の含浸率が小さすぎる場合およ
び大きすぎる場合には、その理由は明らかではないが、
布材にフッ素樹脂層を介して金属層を積層する際に両者
の密2が悪くて気泡が残存することがあジ、接合強度の
低下を生ずることがある。
Although the reason is not clear when the impregnation rate of fluororesin to cloth material is too small or too large,
When a metal layer is laminated on a cloth material via a fluororesin layer, air bubbles may remain due to poor density between the two, which may result in a decrease in bonding strength.

との含浸y4はフッ素樹脂含浸前の布材の重量をWl、
フッ素樹脂含浸後の布材の重tをWlとし。
For impregnation y4, the weight of the cloth material before fluororesin impregnation is Wl,
Let Wl be the weight t of the cloth material after impregnated with fluororesin.

1F記(1)式によって算出された値である。This is a value calculated by formula (1) in 1F.

布材へのフグ素fM脂の含浸により、フッ素樹脂は布材
の織百空隙を充填し、筐た布材表面に薄層を形成する。
By impregnating the cloth material with the fluororesin fM resin, the fluororesin fills the woven voids of the cloth material and forms a thin layer on the surface of the cloth material.

かようなフッ素樹脂含浸布材は1枚で用いてもよく、2
枚以上を用いてもよい。
Such fluororesin-impregnated cloth material may be used in one piece, or in two pieces.
More than one sheet may be used.

本発明はこのように布材Vc7り素樹脂を含浸して用い
るものであり、フッ素樹脂含浸後VcDける布材の表面
平滑性の点から、布材が織布の場合。
In the present invention, the cloth material Vc7 is impregnated with the fluororesin and used, and from the viewpoint of the surface smoothness of the cloth material after impregnation with the fluororesin, the cloth material is a woven cloth.

その厚さを0.15朋以下とするのが好適である、布材
としての織布が厚すぎると、7ツ素樹脂含浸後に会いて
も、布材の表面に形成されたフッ素樹脂薄層に、布材の
織目凹凸が現われる。そして、これに金jJMtを積層
せしめると、該金属層の表置状態は、布材の織目凹凸に
起因して1表面粗さが太きくなり、高周波特性の悪化を
招くことになる。
It is preferable that the thickness is 0.15mm or less.If the woven fabric is too thick, even after impregnation with 7-carbon resin, a thin layer of fluororesin will form on the surface of the fabric. The unevenness of the texture of the cloth material appears. When gold jJMt is laminated thereon, the surface roughness of the metal layer increases due to the unevenness of the texture of the cloth material, resulting in deterioration of high frequency characteristics.

本−発明においては、かようなフッ素樹脂含浸布材の表
面に、PTFE、FEP、PF’A等のフッglA樹脂
層を介して、銅、アルミニウム等の金属層が積層せしめ
られる。
In the present invention, a metal layer such as copper or aluminum is laminated on the surface of such a fluororesin-impregnated cloth material via a fluorocarbon resin layer such as PTFE, FEP, or PF'A.

布材と金F4層の接合には、布材と金属層の間にフッ素
樹脂フィルムを介在せしめ、このフィルムを接着剤とし
て用いるのがよいが、布材表面に形成さfしたフッ素樹
脂薄層が比較的厚く、接着機能を果すに足る場合は、フ
ィルムを0用せずに接合することも可能でるる。
To bond the cloth material and the gold F4 layer, it is preferable to interpose a fluororesin film between the cloth material and the metal layer and use this film as an adhesive. If the film is relatively thick and sufficient to perform the adhesive function, it is possible to bond without using any film.

以下0図面を参照しながら本発明の詳細な説明する。第
1図K>いて、1はフッ素樹脂を含浸せしめた布材でろ
91本例ではこの布材3枚をフッ素樹脂フィルム2)C
よって互に接合して用いている。そして、この布材lの
両面上[U各々フッ素樹脂フィルム2を介して金属層3
が接合されている。
The present invention will be described in detail below with reference to the drawings. Figure 1 K>, 1 is a cloth material impregnated with fluororesin.91 In this example, three pieces of this cloth material are used as fluororesin film 2)C
Therefore, they are used by joining them together. Then, on both sides of this cloth material 1, a metal layer 3
are joined.

上記実例では金属層が板状であるが1回路基板をコンピ
ュータ等に組み込むVCは、金属層を所定の回路とする
必要があり、従って、!2図に示すように金属層3をパ
ターン状とし1回路を形成する。
In the example above, the metal layer is plate-shaped, but in a VC that incorporates one circuit board into a computer, etc., the metal layer needs to be a predetermined circuit, so! As shown in FIG. 2, the metal layer 3 is patterned to form one circuit.

(実施例) 以下、実施例により本発明を更に詳細に説明する。(Example) Hereinafter, the present invention will be explained in more detail with reference to Examples.

実施例1 厚さ0.11 txtD PP0DTA製織布(奇人■
製、商品名テクノーラ) t−PTFEディスバージ首
ン(PTFε濃度58重量%)中に浸漬して引き上げ、
370℃の温度で3分間加熱する。
Example 1 Thickness 0.11 txtD PP0DTA woven fabric (strange)
t-PTFE disbarge neck (PTFε concentration 58% by weight) and pulled up.
Heat at a temperature of 370°C for 3 minutes.

この浸漬、加熱を更に3回線シ返し、厚さ0.12朋、
PTFg含浸率63%のフッ素樹脂含浸織布を得る。
This dipping and heating process was repeated three more times until the thickness was 0.12 mm.
A fluororesin-impregnated woven fabric with a PTFg impregnation rate of 63% is obtained.

そして、このフッ素樹脂含浸織布3枚を重ね合せ、更に
この重ね合わせ体の両面上に厚さ18μ駕の鋼箔を重ね
合せる。なか、織布相互間および織布と金If箔の間に
は、厚さ60μ惰のPTFEフィルムを介在せしめる。
Then, these three fluororesin-impregnated woven fabrics are stacked one on top of the other, and steel foil with a thickness of 18 μm is further stacked on both sides of this stacked body. Among them, a 60 μm thick PTFE film was interposed between the woven fabrics and between the woven fabric and the gold If foil.

次いで、この重ね合わせ体を温度400℃、圧力50 
kP/−の条件で770熱加圧し、第1図と同構造の回
路基板(厚さ0.73111)を得た。
Next, this stacked body was heated at a temperature of 400°C and a pressure of 50°C.
A circuit board (thickness: 0.73111 mm) having the same structure as that shown in FIG. 1 was obtained by heating and pressing at 770 kP/-.

実施例2 PTFE100重量部に対し、FEPを10重量部混合
したディスバージョンを用いること以外は実施例1と同
様にして1回路板を得た。
Example 2 One circuit board was obtained in the same manner as in Example 1 except that a dispersion mixture of 10 parts by weight of FEP and 100 parts by weight of PTFE was used.

比較例1 PPODTA@織布に代え、厚さ0.11mのガラス比
較例2 PPODTA製織布に代え、厚さ0.1111のポリ(
P−フェニレンテレ7タルアミド)製織布(デュボ比較
例3 PTFEディスバージョンへの浸漬訃よびその後た。
Comparative Example 1 Glass with a thickness of 0.11 m instead of PPODTA woven fabric Comparative Example 2 Glass with a thickness of 0.1111 m instead of PPODTA woven fabric
P-Phenylene 7 Talamide) woven fabric (Duveau Comparative Example 3) Immersion in PTFE dispersion and subsequent treatment.

比較例4 PTFEディスバーン3ンへの浸?jlfkよびその後
の加熱の回数を30回とし、織布への含浸率を81比較
例5 PPODTA製織布として、厚さ0.18iugのもの
を用いること以外は実施例1と同様にして1回路基板を
得た。
Comparative Example 4 Immersion in PTFE Disburn 3? Comparative Example 5 One circuit was carried out in the same manner as in Example 1, except that the number of jlfk and subsequent heating was 30 times, and the impregnation rate into the woven fabric was 81. I got the board.

これら実施例)よび比較例によって得られた回路基板に
ついて、下記試験を打ない、得られた結果を第1表に示
す。
The circuit boards obtained in these examples) and comparative examples were not subjected to the following tests, and the results obtained are shown in Table 1.

A、誘電率 安!@電気社製、誘電体損自動測定器TR1100を用
い1周波数IKHzにて測定した。
A. Low dielectric constant! Measurement was performed at one frequency of IKHz using an automatic dielectric loss measuring device TR1100 manufactured by @Denkisha.

B、熱膨張率 セイコー社製、SSSSC5000(T/5S)−10
0型を用いて測定し、実施例1を基準として比較値で示
した。
B, thermal expansion coefficient manufactured by Seiko Corporation, SSSSC5000 (T/5S)-10
Measurements were made using Type 0, and comparative values are shown based on Example 1.

C1表面粗さ 東京精密社製1表面粗さ計にて測定し、実施例1を基準
として比較値で示した。
C1 Surface Roughness Measured using a surface roughness meter manufactured by Tokyo Seimitsu Co., Ltd., and shown as a comparative value using Example 1 as a standard.

D、気泡の有無 回路基板の断面を走査型電子顕微鏡(倍率50倍)で観
察し1重ね合せた各材料間に気泡が有るか否かを判定し
た。
D. Presence or absence of air bubbles The cross section of the circuit board was observed using a scanning electron microscope (50x magnification) to determine whether or not there were air bubbles between the stacked materials.

以下余白 第 表 (発明の効果) 本発明は上記のように構成され、PP0DTA製布材を
用いているので0回路基板の誘1c率を1段と低くでき
る。
The following is a table with blank spaces (Effects of the Invention) Since the present invention is constructed as described above and uses the PP0DTA cloth material, the dielectric constant of the zero circuit board can be lowered by one level.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図はいずれも本発明に係る低誘電率回
路基板の実例を示す断面図である。 l・・・布材  2パ・・フッ素樹脂フィルム3・・・
金属層
FIG. 1 and FIG. 2 are both sectional views showing examples of low dielectric constant circuit boards according to the present invention. l...Fabric material 2P...Fluororesin film 3...
metal layer

Claims (3)

【特許請求の範囲】[Claims] (1)フツ素樹脂が含浸せしめられたコポリパラフエニ
レン・3,4′オキシジフエニレン・テレフタラミド製
布材の表面に、フツ素樹脂層を介して金属層が積層せし
められて成る低誘電率回路基板。
(1) Low dielectric material made by laminating a metal layer on the surface of a copolyparaphenylene/3,4'oxydiphenylene/terephthalamide cloth impregnated with a fluororesin via a fluororesin layer. rate circuit board.
(2)少なくとも2枚の布材がフツ素樹脂層により接合
せしめられている請求項1記載の低誘電率回路基板。
(2) The low dielectric constant circuit board according to claim 1, wherein at least two cloth materials are bonded together by a fluororesin layer.
(3)金属層がパターン状である請求項1または請求項
2記載の低誘電率回路基板。
(3) The low dielectric constant circuit board according to claim 1 or 2, wherein the metal layer is patterned.
JP22104489A 1989-08-28 1989-08-28 Low dielectric circuit board Pending JPH0383390A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22104489A JPH0383390A (en) 1989-08-28 1989-08-28 Low dielectric circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22104489A JPH0383390A (en) 1989-08-28 1989-08-28 Low dielectric circuit board

Publications (1)

Publication Number Publication Date
JPH0383390A true JPH0383390A (en) 1991-04-09

Family

ID=16760612

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22104489A Pending JPH0383390A (en) 1989-08-28 1989-08-28 Low dielectric circuit board

Country Status (1)

Country Link
JP (1) JPH0383390A (en)

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