JPH0381355B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for correcting the convergence of a color television receiver, and an object of the present invention is to provide a digital convergence device that can be adjusted with high precision and has little convergence deviation even in the periphery of the screen. .

A shadow mask color picture tube (color picture tube) used in general color television receivers.
As is well known, a CRT (CRT) has three electron guns: red, green, and blue. However, it is structurally impossible to place all of these multiple electron guns on the central axis of the color CRT, so they are mounted slightly away from the central axis and slightly tilted inward from the central axis. Therefore, on the screen on this central axis, each electron beam converges at the shadow mask, and simultaneously passes through the same hole to emit red, green, and blue fluorescent dots, resulting in a convergence state. However, since the radius of curvature of the shadow mask is larger than the distance from the center of deflection to the center of the shadow mask, the three electron beams converge in front of the shadow mask at locations other than the central axis of the CRT. The beams cannot pass through the same hole at the same time, and the reproduced image has more color shift, or convergence shift, as it moves away from the center of the screen. In order to prevent such problems, it is necessary to perform convergence correction over the entire screen so that the three electron beams converge at the shadow mask.

Generally, a method is used to obtain an analog convergence correction waveform from the horizontal flyback pulse and vertical deflection waveform using passive elements such as L, C, and R, but this method has problems in terms of convergence accuracy. be. As a method of performing convergence with higher precision over the entire screen, a method of digitally performing convergence correction has been proposed, as shown in US Pat. No. 3,943,279, for example.

In the conventional example described above, the concept is to project a convergence correction pattern such as dots on the screen, digitally write the convergence correction amount data for each point in one frame memory, and read out this information. , performs D/A conversion and convergence correction. A more detailed explanation will be given below based on FIGS. 1 and 2.

First, as shown in FIG. 2, when a synchronization signal is applied from the synchronization input terminal 19, dots corresponding to the convergence adjustment points in, for example, 13 rows in the vertical direction and 9 columns in the horizontal direction appear on the screen and the control circuit 9 and the correction pattern A dot is displayed by the generator 15, and a dot corresponding to the desired adjustment point is selected using the cursor keys on the control panel 1. The address of the adjustment point selected with the cursor key 1a is stored in the cursor counter 9. Next, when an adjustment point to be corrected is selected using the cursor keys on the control panel 1, the address of this adjustment point is stored in the cursor counter 9. The address stored in this cursor counter 9 is applied to the matching circuit 11 together with the address of the first and first frame memory control counters 12 which sequentially output the addresses of each adjustment point of the dot pattern. When the content of the cursor counter 9 matches the content of the cursor counter 9, the cursor generation circuit 14 generates a cursor signal corresponding to the storage address of the cursor counter 9. Next, the output signal of the cursor generation circuit 14 is added to the dot pattern signal of the correction pattern generation circuit 15 by the addition circuit 16, and a cursor is superimposed on the selected adjustment point on the television screen and displayed.

After selecting the adjustment point in this manner, the desired correction amount is set in the reversible counter 2 while viewing the screen using the writing key for the color to be corrected, for example, red provided on the control panel 1. Then, the output of the reversible counter 2 is specified by the cursor counter 9 of the first frame memory 3 and written to the address via the multiplexer 19. This first,
One-frame memory is a memory element that can retain information even when the power is turned off, such as a non-volatile memory.
It consists of RAM, electrically erasable and writable ROM, etc. Here, the first and first frame memories 3 and the second and first flail memories 4 will be explained. The first and first frame memories 3 are non-volatile.
RAM (random access read/write memory)
As mentioned above, this is to prevent the convergence correction data from disappearing even if the television receiver is turned off after convergence adjustment. In addition, when the television receiver is moved, the convergence adjustment must be performed again due to color shift due to misalignment of the electron gun of the television receiver or misalignment of the panel as in the case of projection type receivers. Therefore, a rewritable storage element must be used for the convergence correction data. However, such an element generally has a very slow writing speed, so if it is operated at high speed in synchronization with a television receiver, the peripheral circuitry becomes complicated. Therefore, when performing read and write operations at high speed in synchronization with a television receiver, another high-speed memory is provided and data is transferred from the non-volatile RAM to the high-speed memory to create a convergence correction waveform. This high-speed memory is the second, one-frame memory 4 in FIG.

When writing the correction amount to the first and first frame memories 3 as described above, the output of the reversible counter 2 is written. In addition to the second and first frame memories 4, their contents are read out via the second and first frame memories 4. If you want to further increase the convergence correction amount, increase the reversible counter 2, and conversely, if you want to decrease it, decrease the reversible counter 2 and
Write to the address specified by the cursor counter 9 in the 1-frame memory 3. The contents of the first and first frame memories 3 are sequentially read out in the horizontal and vertical retrace periods by the first frame memory control counter 12, and are stored in the second and first frame memories 4 by the second frame memory control counter 13. Write corrections are performed sequentially during the horizontal and vertical retrace periods.

Next, reading out the convergence correction amount written in the second and first frame memories 4 will be explained. The convergence correction amount for each adjustment point stored in the second and first frame memories 4 is as follows:
It is read out in synchronization with the dot pattern of FIG. 2 by the address signal output by the second frame memory control counter 13. However, since the second frame memory 4 only has correction amount data for locations corresponding to adjustment points, including virtual adjustment points, it is necessary to find the correction amount for each scanning line between adjustment points in the vertical direction. . Therefore, the interpolation circuit 5 uses the correction amount of the first adjustment point and the correction amount of the second adjustment point immediately below the first adjustment point to correct each scanning line included between the first and second adjustment points. The quantity is determined by interpolation, and this interpolation circuit 5
A D/A converter 6 converts the output signal into an analog signal. Since the output signal of the D/A converter 6 is on a staircase wave, it is smoothed by a low-pass filter 7, amplified, and then supplied to a convergence coil (not shown).
Although red has been explained above, the same applies to green and blue corrections. In such a digital convergence device, since convergence correction can be performed independently for each adjustment point, convergence correction can be performed with high accuracy.

However, the correction data from the reversible counter 2 is written to the first and first frame memories 3, and then the first and first frame memories 3 are sequentially read out, and the vertical,
Since it is written in the second and first frame memories 3 during horizontal retrace and then read out in synchronization with the dot pattern of the television receiver, it takes time for the rewritten and corrected convergence state to be displayed. It goes without saying that as the number of adjustment points increases, it takes more time to transfer and it takes more time to display the convergence state. Also, the corners of the screen (dotted lines 21, 22,
23 and 24), if the correction amount for one adjustment point is changed, correction data for three points must be obtained by the extrapolation calculation circuit 18 and written to the first and first frame memories 3. For example, in the case of adjusting point a in FIG. 21, the correction data for points c, d, and e in FIG. 2 must be rewritten. Therefore, adjustment time is required for the portion (corner portion) where the color shift is greatest.

The purpose of the present invention is to eliminate the above-mentioned drawbacks,
A convergence device is provided that efficiently writes the contents of a reversible counter 2 into a second frame and stores convergence correction data in a first frame memory 3.

Hereinafter, one embodiment of the present invention will be described based on the drawings. In FIG. 3, components that perform the same operations as in FIG. 1 are designated by the same numbers, and their explanations will be omitted.

According to the present invention, when the cursor is moved using the cursor keys on the control panel 1, the register that stores the contents of the cursor key before the movement, the movement, and the state of the correction data increase/decrease determination circuit 22 are determined, and if both of these states occur, 1st, 2nd, 1st frame memory control counters 12, 13 and cursor counter 9
A cursor movement determination circuit 21 for controlling the cursor movement determination circuit 21, and a register for determining the presence or absence of a correction operation when the convergence correction amount of an adjustment point is corrected by the control panel 1, and supplying and storing the state to the cursor movement determination circuit 21. Correction data increase/decrease determination circuit 2
2 is provided, and the 1st and 1st frame memories 3 are set only when the convergence adjustment is completed and the movement is to the next adjustment point.
The correction data is written in the . Therefore, every time the conventional reversible counter 2 is changed by one, the data is transferred from the first, first frame memory 3 to the second, first frame memory 3.
However, in the present invention, the output signal of the reversible counter 2 is directly transferred to the second and first frame memory 4.
Since it is written into the frame memory 4, the convergence state of the television receiver can be displayed immediately.

The operation will be explained in detail below, but in order to make it easier to understand, we will temporarily correct the red color.

In FIG. 3, when the adjustment point to be corrected is selected using the cursor keys on the control panel 1, the address of this adjustment point is stored in the cursor counter 9, and the cursor signal is sent to the addition circuit 1 as in the conventional case.
It will be shown from 6 onwards. Next, when making a correction after selecting an adjustment point, change the reversible counter 2 using the write key on the control panel, and change the contents of the reversible counter 2 to the second address specified by the cursor counter 9 during the horizontal and vertical flyback periods. , one frame is written to the memory 4. In this case, reversible counter 2
As in the conventional case, the contents of the second and first frame memories 4 are read out, set in the reversible counter 2, and the data is increased or decreased to horizontally store the desired data in the second and first frame memories 4. and during the vertical retrace period, the correction data is corrected. At this time, since the reversible counter 2 has been changed, the correction data increase/decrease register 22 is set. Also, it is not set when the reversible counter 2 is not changed. The cursor movement determination circuit also sets the addresses of the first and second frame memories 3 and 4. As described above, after the adjustment of that adjustment point is completed, the cursor key on the control panel 1 is pressed to move to the next adjustment point. At this time, the cursor movement determination circuit 21 determines whether the cursor has moved, and at the same time, it is determined whether the correction data increase/decrease determination circuit 22 is set. If the correction data increase/decrease determination circuit 22 is in the set state, the address of the previous adjustment point is added from the cursor determination circuit 21 to the first, second and first frame memory control counters 12 and 13, and the address of the previous adjustment point is added to the second and first frame memory control counters 12 and 13. , and written into the first and first frame memories 3 during the horizontal and vertical retrace periods. Next, read from the second and first frame memories 4, and
After writing to the one-frame memory 3 is completed, the correction data increase/decrease determination circuit 22 is reset, the next address is stored in the cursor counter 9, and is used as the adjustment point address of the second and first frame memories 4. At the same time, the cursor signal at that point is displayed on the receiver.

If the correction data discrimination circuit 22 is in the reset state when the cursor key is moved, writing to the first and first frame memories is not performed.

As described above, when the cursor is moved, the correction data is written to the first and first frame memories 3, but when the color is switched, a color switching determination circuit is also provided, and the operation of writing to the first and first frame memories 3 is performed. Needless to say.

In addition, in the writing operation of the first and first frame memories 3, when the correction data is increased or decreased and the cursor or color is switched, writing is performed, but when the correction data is increased or decreased and the cursor or color is not switched. In some cases, the correction data may not be written to the first frame memory. At this time, a timer circuit or the like is provided in the correction data increase/decrease determination circuit, the correction data increase/decrease circuit 22 is set and the state in which there is no command from the control panel 1 is counted, and after several seconds have elapsed, the first and first frame memories 3
You may also write it in

As described above, according to the present invention, the second and first
Since the correction data is written directly to the frame memory, the convergence state of the television receiver can be displayed quickly, and convergence adjustment can be performed quickly. This is particularly effective in adjusting convergence at the periphery of the screen. Further, since the data is written to the first frame memory of the nonvolatile RAM after the adjustment of one point is completed, the convergence adjustment can be performed quickly even if an element with a slow writing speed of the nonvolatile RAM is used.

Furthermore, as a method for storing convergence correction data in a non-volatile memory element, there is a conventional device in which the entire screen is adjusted and then stored using a write all data key.The present invention also applies to such conventional devices. If the data is automatically stored in the non-volatile memory element when moving to the next adjustment point, as in the example shown in FIG. Also, all data write keys are not required.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional digital convergence device, FIG. 2 is a pattern diagram for explaining the same device, and FIG. 3 is a block diagram of a digital convergence device according to an embodiment of the present invention. 1... Control panel, 21... Cursor movement determination circuit, 9... Cursor counter, 11...
...Coincidence detection circuit, 12...First, first frame memory control counter, 14...Cursor generation circuit, 1
6...Addition circuit, 15...Correction pattern generation circuit, 8...Control circuit, 13...2nd and 1st frame memory control counter, 10...Address multiplexer, 22...Correction data increase/decrease determination circuit, 3
...First, 1st frame memory, 20...Address multiplexer, 2...Reversible counter, 18...
...Extrapolation calculation circuit, 4...Second and first frame memory, 19...Data multiplexer, 5...Interpolation calculation circuit, 6...D/A conversion circuit, 7...
LPF.

Claims (1)

[Scope of Claims] 1. Means for generating a plurality of convergence adjustment points in the horizontal and vertical directions within and outside the screen of a color television receiver, and means for inputting the position address of the convergence adjustment points; storing the position address and the position address before the change;
cursor movement determination means for controlling the addresses of the first and second storage means by determining whether or not there is a correction operation for the convergence correction amount; means for correcting the convergence correction amount according to the convergence adjustment point; data increase/decrease determining means for determining and storing the presence or absence of a correction operation for the convergence correction amount at the convergence adjustment point; and storing the convergence correction amount corresponding to the convergence adjustment point as non-volatile information; first storage means for transferring the convergence correction amount to the second storage means at least when the power is turned on;
a second storage means that is read out in synchronization with the television receiver; a means for reading out the convergence correction amount at each adjustment point of the second storage means; and a means that converts the read value into analog and applies it to the convergence yoke. When the convergence correction amount is written in the second storage means and the convergence correction is corrected at a desired adjustment point, and the cursor moves to the next adjustment point, the cursor discrimination means detects a change in cursor movement and a data increase/decrease discrimination means. A digital device characterized in that it determines whether there is an increase or decrease in data at the adjustment point before the movement, and if there is, reads the convergence correction amount at the adjustment point before movement from the second storage means and writes it into the first storage means. Convergence device. 2. In the means for writing into the first storage means for storing non-volatile information, the means for determining the presence or absence of a correction operation for the convergence correction amount at the convergence adjustment point detects the presence or absence of an operation, and after the correction operation changes, a predetermined The present invention is characterized by comprising a timer means for counting the time, detecting a predetermined time after the correction operation, and writing the convergence correction amount of the second storage means into the first storage means when there is no correction operation for convergence correction within that time. A digital convergence device according to claim 1.