JPH0349493A - Digital convergence device - Google Patents

Abstract

PURPOSE:To correct and adjust convergence quickly with high accuracy in a color television receiver by providing a discrimination means and operating a CPU at all times so as to apply approximate calculation. CONSTITUTION:A digital convergence device is provided with a means 2 discriminating whether the period is a vertical scanning period or a vertical blanking period. A CPU 3 transfers a data for convergence correction for each scanning line to a one frame random access memory in the case of the vertical blanking period and the CPU 3 applies processing such as interpolation calculation to obtain correction for each scanning, key scanning or horizontal frequency detection other than the data transfer of the convergence correction to the one frame random access memory through the changeover of the processing of the CPU 3. Thus, the convergence adjustment time required for one by one adjustment point is remarkably reduced, then the convergence of the entire screen is adjusted quickly with high accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a digital convergence device that can quickly and accurately adjust convergence correction in a color television receiver. Background Art As is well known, the shadow mask type color cathode ray tube (hereinafter abbreviated as CRT) used in general color television receivers has three electron guns: red, green, and blue. However, it is structurally impossible to arrange all of these multiple electron guns on the central axis of the CRT, so they are placed a little away from the central axis and slightly tilted inward with respect to the central axis.
It is installed. Therefore, on the screen on this central axis, each electron beam converges at the shadow mask,
At the same time, red, green, and blue fluorescent dots are emitted through the same hole, creating a convergence state. However, since the radius of curvature of the shadow mask is larger than the distance from the center of deflection to the center of the shadow mask,
At locations other than the central axis of the CRT, the three electron beams converge in front of the shadow mask. Therefore, the three electron beams cannot pass through the same hole at the same time, and the color shift, or convergence shift, of the reproduced image increases as it moves away from the center of the screen. To prevent this kind of inconvenience, set the shadow mask to 3 over the entire screen.
It is necessary to perform convergence correction so that the book's electron beam converges. In addition, in projection-type color television receivers that use three CRTs that emit three primary colors to project enlarged images onto a screen, color shift occurs on the screen because the incident angle of the CRT to the screen differs for each CRT. .

For the superposition of these three primary colors, so-called convergence, a method is generally adopted in which a convergence correction waveform is obtained in an analog manner using passive elements such as L, C, and R, rather than a horizontal flyback pulse and a vertical deflection waveform. However, there is a problem with convergence accuracy. In contrast, a method of digitally performing convergence correction has been proposed as a method for achieving more accurate convergence. The concept is to project a convergence correction pattern such as a crosshatch on the screen, digitally write the convergence correction amount data for each intersection in one frame memory, and synchronize this information with horizontal and vertical scanning. It reads out data, performs D/A conversion, amplification processing, and performs convergence correction. below,
An example of the above digital convergence correction will be explained with reference to the drawings. FIG. 3 is a block diagram of the digital convergence device, and FIG. 4 is a diagram showing the state of projection of crosshatching, which is a signal for convergence adjustment. For example, 9 horizontally on the screen as shown in Figure 4.
A crosshatch 27 indicating adjustment points in seven columns and vertical rows is displayed from the convergence adjustment signal output terminal 20 of the control section 2. The intersection of this crosshatch 27 becomes the adjustment point.
The control unit 2 receives input signals from the horizontal synchronization signal input terminal 21, vertical synchronization signal input terminal 22, and clock input terminal 23, and digital convergence control data from the data buffer random access memory 14 to the CPU 3,
It generates a control signal 24 for controlling the non-volatile 1-frame memory 13, 1-frame random access memory 12, data buffer random access memory 1 4, etc., controls the digital convergence device, and outputs a convergence correction pattern signal, and Interfaces between control panel l5 and cpua. First, convergence adjustment will be explained.

When an adjustment point is selected on the control panel 15 shown in FIG. 3, the CPU 3 obtains the cursor address of that adjustment point. At this time, the addresses of the nonvolatile l-frame memory 13 and data buffer random access memory 14 are also determined.
Note that the data buffer random access memory 14 has an area for storing digital convergence control data and correction amounts for all adjustment points of the crosshatch 27, as well as a CP
The stack area and working area used by U3 are allocated. After the above operation, the control unit 2 displays the cursor 28 at the corresponding adjustment point on the screen.

Next, enter the color you want to correct from the control panel 15, look at the cursor 28 on the screen that indicates the selected adjustment point,
Convergence adjustment is performed using the adjustment key on the control panel 15, and the desired correction amount is written to the specified address of the data buffer random access memory 14. The only correction amounts written in the data buffer random access memory l4 are those at positions corresponding to the adjustment points shown in FIG. Therefore, the amount of correction for each of the M scanning lines included between adjustment points in the vertical direction must be determined by interpolation. Therefore, for example, when adjustment point B is selected with the cursor 28 as shown in FIG. Using the correction amount of point C, adjust point A and adjustment point B, and adjustment point B and adjustment point C.
The correction amount for each scanning line included between C
The convergence correction amount of the scanning line other than the adjustment point can be determined by calculating it by approximate calculation in the PU 3 and writing it into the corresponding address of the one-frame random access memory 12. When a certain period of time has elapsed after the operation of the lN adjustment key is completed, the above correction amount is written into the non-volatile one frame memory l3. The above operations are performed in the same manner for all adjustment points in sequence. Below, do the same for other colors. By doing the above, you can adjust the convergence of the entire screen. Next, the above approximate calculation will be explained. Third
As shown in the figure, for example, the correction amount a of adjustment point A and the adjustment point B
Find the change for each scanning line between the adjustment points from the correction amount b,
Add this change and the correction amount b at adjustment point B to find the correction amount for each scanning line. That is, the correction amount α from adjustment point B over n points (n≦M) is approximated by the following equation. a-b α- Xn+b M+1 By the way, during the convergence adjustment operation, the correction amount for each adjustment point is written to the nonvolatile 1-frame memory l3, but this is to back up the correction amount for each adjustment point. ．． When the power of the digital comparability device is turned off, the correction amounts written in the data buffer random access memory 14 and the one-frame random access memory 12 are erased. However, the written correction amount for each adjustment point is stored as is in the nonvolatile one-frame memory l3. Therefore, when the power is turned on, the correction amount for each adjustment point stored in the nonvolatile one-frame memory l3 is written to the data buffer random access memory 14; The CPU 3 performs interpolation calculations using the correction amount at each adjustment point, and writes the correction amount for each scanning line into the 1-frame random access memory l2.
This eliminates the hassle of having to readjust the settings every time you turn on the power.

Next, we will explain full-screen convergence correction.
As mentioned above, one frame random access memory 12
The correction amount for each scanning line of the entire screen is written in.
This correction amount is read out by the control signal 24 synchronized with the vertical synchronization signal and horizontal synchronization signal output from the control unit 2, converted into an analog signal by the D/A converter l6, and then processed by the low-pass filter (LPF) 17. The convergence correction signal is smoothed by the amplifier l8, and after being amplified, it is supplied to the convergence coil (not shown) from the convergence correction signal output terminal l9. As above,
Convergence correction can be performed for the entire screen. Now, as you can see from the description so far, in the digital convergence device, the CPU 3 is the control panel 15.
key scanning, changing the correction amount at each adjustment point, interpolation calculation to obtain the correction amount for each scanning line from the correction amount at each adjustment point, and storing the correction amount for each scanning line to the l-frame random access memory l2. Performs processing such as writing and horizontal frequency detection. However, if the processing of the CPU 3 is performed during the vertical scanning period, the screen will be affected and the image quality will be disturbed. Therefore, to avoid affecting the image displayed on the screen, the CPU 3 is operated only during the vertical blanking period (the horizontal blanking period during the vertical scanning period is short, so the CPU 3 is stopped). During the vertical scanning period, the operation of the CPU 3 is stopped, and the random access memory 12 for one frame is controlled by the control signal 24 output from the control section 2.
The correction amount of all scanning lines written in the D/A converter l
6 and performs convergence correction. With the digital convergence device described above, the adjustment points can be adjusted independently and as desired, so convergence correction can be performed with high accuracy. In FIG. 3, 25 represents an address bus, and 26 represents a data path. Problems to be Solved by the Invention The amount of correction for each scanning line is obtained by interpolating the amounts of correction at adjustment points above and below that scanning line using a CPU.
The interpolation calculation to find the amount of correction for each scanning line takes a considerable amount of time. In conventional systems, during convergence adjustment, processing such as interpolation calculation to obtain the correction amount for each scanning line, and data transfer to memory for writing the correction amount for each scanning line into the random access memory for one frame is performed using a vertical block. Since this was done only during the ranking period and the CPU 2 was not operating during the vertical scanning period, it took a long time to correct one adjustment point. Therefore, it took a considerable amount of time to make convergence adjustments at all adjustment points on the screen. In view of the above-mentioned problems, the present invention provides, in the processing performed by the CPU,
Only the writing of the correction amount for each scanning line to the frame random access memory that affects the image displayed on the screen, that is, the data transfer to the frame random access memory, is performed during the vertical blanking period, and 1 frame random access memory is written. Quick convergence adjustment can be performed by performing processes other than data transfer to the access memory, such as interpolation calculations for determining the amount of correction for each scanning line, key scanning, horizontal frequency detection, etc. during the vertical scanning period. The purpose of this project is to provide a digital col convergence device that enables this. Means for Solving the Problems In order to solve the above problems, the digital convergence device of the present invention is provided with means for determining whether it is a vertical scanning period or a vertical blanking period, and if it is a vertical blanking period. For example, the cPU transfers the convergence correction amount data for each scanning line to the 1-frame random access memory (if there is no data to transfer, it stops the operation or performs processing such as interpolation), and If there is, the CPU performs processing other than data transfer of the convergence correction amount to the l-frame random access memory, such as interpolation calculation to obtain the correction amount for each scanning line, key scan, horizontal frequency detection, etc. It is designed to switch the processing performed by . According to the present invention, the convergence adjustment time required for each adjustment point can be significantly reduced, so that the convergence adjustment for the entire screen can be performed quickly and with high precision. Embodiment A digital convergence device according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a functional block diagram showing a CPU operation period switching section in a control section of a digital convergence device according to an embodiment of the present invention, and FIG. This is a diagram showing the operating period of . FIG. 3 is a block diagram of the digital convergence device, and FIG. 4 is a diagram showing the state of projection of crosshatching, which is a signal for convergence adjustment. The structure and operation will be explained below. As shown in FIG. 4, cross eights 27 indicating adjustment points in nine columns horizontally and seven rows vertically are displayed on the screen from the convergence adjustment signal output terminal 20 of the control section 2 shown in FIG. Put out. The intersection of this crosshatch 27 becomes the adjustment point. Note that the control unit 2 receives signals input from a horizontal synchronization signal input terminal 21, a vertical synchronization signal input terminal 22, a clock input terminal 23, and a random access memory 14 for data buffer.
CPU3 from the digital convergence control data of
, a control signal 24 for controlling the nonvolatile 1-frame memory 13, 1-frame random access memory 12, data buffer random access memory 14, etc. to control the digital convergence device, output a pattern signal for convergence correction, and control. We are working on the interface between panel 15 and CPU3.

First, we will explain convergence adjustment. When the adjustment point is selected on the control panel 15 in Fig. 3, the CPU 3
finds the cursor address of the adjustment point. At this time,
The addresses of the nonvolatile one-frame memory 13 and data buffer random access memory 14 are also determined. The data buffer random access memory 14 has an area for storing digital convergence control data and correction amounts for all adjustment points of the crosshatch 27, as well as a stack area used by the CPU 3, a working area, and an area for storing interpolation results. Temporary storage space is allocated. After the above operation, the control unit 2 displays the cursor 28 at the corresponding adjustment point on the screen. Next, enter the color you want to correct from the control panel 15, look at the cursor 28 on the screen that indicates the selected adjustment point,
Perform convergence adjustment using the adjustment key on control panel l5. A desired correction amount is written to the specified address of the data buffer random access memory 14. Random access memory 14 for data buffer
The correction amounts written in are only for the positions corresponding to the adjustment points shown in Figure 4. Therefore, the amount of correction for each of the M scanning lines included between adjustment points in the vertical direction must be determined by interpolation. For example, as shown in Fig. 4, move the cursor 28 to adjustment point B.
is selected, adjustment point 8 and adjustment point B read out from the data buffer random access memory 14
And, using the correction amount of adjustment point B and adjustment point C, adjustment point A
, adjustment point B, and the correction amount for each scanning line included between adjustment point B and adjustment point C are obtained by approximate calculation in CPU 3 as described later, and the calculation results stored in random access memory 14 for data buffer are calculated. Write to temporary storage. When the interpolation operation is completed, the CPU 3 outputs a data transfer permission signal 5 as shown in FIG. 2 to the control section 2. This data transfer permission signal 5 is output until the interpolation calculation result written in the calculation result temporary storage area in the data buffer random access memory 14 is written to the corresponding address of the 1-frame random access memory 12. continues to be.

Inside the control section 2, there is a CPU operation switching circuit 1 as shown in FIG. If the data transfer permission signal 5 is input from the CPU 3 and the vertical blanking signal 7 input from the vertical blanking input section 4 is the vertical blanking period 8, the CPU operation switching circuit 1 controls CPtJ3.
The CPU 3 outputs a data transfer instruction signal 6 as shown in FIG. The interpolation calculation results are stored in one frame random access memory 12.
Write to the address corresponding to the scanning line between the adjustment point B and the adjustment points A and C above and below it. Here, the data transfer permission signal 5 is output until the calculation result written in the calculation result temporary storage area in the data buffer random access memory l4 is written to the corresponding address of the l frame random access memory 12. It continues to be done. If the data transfer is not completed during the first vertical blanking period after the data transfer instruction signal 6 is output as shown in FIG. Data transfer will resume during the ranking period. Repeat this until the data transfer is complete.
Note that during the vertical scanning period until the end of data transfer, the CPU 3 executes processes other than data transfer, such as key scanning and horizontal frequency detection. As described above, the correction amount of the scanning line between the adjustment point B and the adjustment points 71, . The convergence correction amount of the scanning line other than the adjustment point can be calculated by transferring it to the address.il
When a certain period of time has elapsed after the completion of the operation of the l adjustment key, the correction amount of the adjustment point is written into the non-volatile one frame memory l3.

The above operations are performed in the same manner for all adjustment points in sequence.

Below, do the same for other colors. By doing the above, you can adjust the convergence of the entire screen.

Next, the above approximate calculation will be explained. As shown in FIG. 4, for example, the correction amount a of adjustment point A and the correction amount 1 of adjustment point B
The amount of change for each scanning line between the adjustment points is determined from b, and this amount of change is added to the amount of correction b for adjustment point B to determine the amount of correction for each scanning line. In other words, n lines above adjustment point B (n≦
The correction amount α of M) is approximated by the following formula. M+1 Incidentally, during the convergence adjustment operation, the correction amount for each adjustment point is written into the nonvolatile l-frame memory 13, and this is to bank up the correction amount for each adjustment point. When the power of the digital convergence device is turned off, the correction amounts written in the data buffer random access memory l4 and the one-frame random access memory 12 are erased. However, non-volatile l
The written correction amount for each adjustment point is stored as is in the frame memory l3. Therefore, when the power is turned on, the correction amounts for each adjustment point stored in the nonvolatile l-frame memory l3 are written to the data buffer random access memory 14, and each adjustment written in the data buffer random access memory 14 is Point correction amount by CPU3
By performing an interpolation calculation and writing the calculation result, the correction amount for each scanning line, into the 1-frame random access memory 12,
This eliminates the hassle of having to readjust the settings every time you turn on the power. Next, we will explain the convergence correction for all 100 faces.
As mentioned above, one frame random access memory 12
The amount of correction for each scanning line of the entire C plane is written in.
This correction amount is read out by the control signal 24 synchronized with the vertical synchronization signal and horizontal synchronization signal output from the control unit 2, converted into an analog signal by the D/A converter l6, and then processed by the low-pass filter (LPF l'). ? After being smoothed by the amplifier 18 and amplified by the amplifier 18, the convergence correction signal is supplied to a convergence coil (not shown) from the output terminal 19. In the manner described above, convergence correction can be performed for the entire screen.

As described above, this structure adds the CPU operation switching circuit l to the control unit 2 and secures a temporary storage area for the interpolation results in the data buffer random access memory l4.
By enabling the CPU 3 to operate at all times, performing time-consuming interpolation calculations during the vertical scanning period 9, and performing data transfer to the 1-frame random access memory 12, which affects the screen, during the vertical blanking period 8, the conventional Convergence adjustment can be quickly performed without affecting the digital convergence device and the same screen.

Effects of the Invention As described above, the present invention adds a CPU operation switching circuit to the control unit and secures a temporary storage area for calculation results in the data buffer random access memory, thereby making it possible to perform convergence adjustment accurately and quickly. It can be carried out.

[Brief explanation of drawings]

FIG. 1 is a functional block diagram showing a CPU operating period switching section in the control section of a digital convergence device in an embodiment of the present invention, and FIG. 2 shows a CPU operating period in a digital convergence device in an embodiment of the present invention. FIG. 3 is a block diagram of the digital convergence device, and FIG. 4 is a front view showing a state in which a crosshatch, which is a convergence adjustment signal, is projected. 1...CPU operation period switching circuit, 2...
...Control unit, 3...CPU, 4...
Vertical blanking signal input section, 5...Data transfer permission signal, 6...Data transfer instruction signal, 7.
... Vertical blanking signal, 8 ... Vertical blanking period, 9 ... Vertical scanning period, 10
....Data transfer period to l-frame random access memory, l1...Processing period other than data transfer, 12...l-frame random access memory, 13...・Non-volatile frame memory, 14
...Random access memory for data buffer, 15...Control panel, 16...
...D/Aim device, IT...LPF, 18...
...Amplifier, l9...Convergence correction signal output terminal, 20...Convergence adjustment signal output terminal, 21...Horizontal synchronization signal input terminal, 22... ...Vertical synchronization signal input terminal, 23...
... Clock input terminal, 24 ... Control signal,
25...Address bus, 26...Data path, 27...Cross hatch projected on screen, 28...Cursor.

Claims (1)

[Claims] means for generating a convergence correction pattern so that the screen of a color television receiver has a plurality of convergence adjustment points in the horizontal and vertical directions; means for inputting the correction amount at the adjustment point specified during convergence adjustment into the corresponding address of the data buffer random access memory and the non-volatile 1 frame memory; A correction amount corresponding to all scanning lines between a certain adjustment point is calculated by an approximate calculation using the adjustment point read from the data buffer random access memory and the correction amount of the adjustment points above and below the adjustment point. means for storing calculation results in a temporary storage area; means for determining whether the approximate calculation has been completed and the calculation results have been stored in the calculation result temporary storage area of the data buffer random access memory; and input vertical synchronization. Means for determining whether a signal is in a vertical scanning period or a vertical blanking period, and one frame random access to the correction amount for each scanning line stored in the temporary storage area of the calculation result of the data buffer random access memory. means for writing to an address corresponding to the scanning line of the memory, the CPU is constantly operated to rapidly perform approximate calculation, and when the approximate calculation is completed, the calculation result is stored in the temporary storage area for the calculation result of the data buffer random access memory. When the storage is completed and it is the vertical blanking period, the correction amount for each scanning line stored in the temporary storage area of the calculation result of the random access memory for data buffer corresponds to the scanning line of the random access memory for one frame. A digital convergence device characterized in that it writes to an address.