JPH0380351A - Channel switch device - Google Patents

Abstract

PURPOSE:To switch channels in the minimum waiting time even if an input/ output device is frequently started by holding a start signal in response to a switch signal and outputting the start signal to a start signal connection means in accordance with the information of execution. CONSTITUTION:A start signal connection means 113 outputs a start signal to a prescribed input/output device based on the connection information to start the input/output device. An execution informing means 115 contained in a switch means 111 outputs the information in accordance with the switching execution. A start signal holding means 117 holds the start signal in response to the switch signal and outputs the start signal to the means 113 in accordance with the execution information. As a result, the channels can be switched in a minimum waiting time when the input/output device is frequently started.

Description

[Detailed Description of the Invention] [Summary] Regarding a channel switching device that controls switching between a plurality of channel devices and a plurality of input/output devices, an object of the present invention is to execute switching by terminating communication in response to a switching signal. and a communication state notification means that notifies the communication end state of the channel device and the input/output device, and a switching signal that instructs to switch the connection between the channel device and the input/output device when the channel device is in the communication end state. In a channel switching device, the channel switching device includes a switching means for executing the above and outputting the connection information thereof, and a starting signal connecting means for outputting a starting signal for starting the input/output device to a predetermined input/output device according to the connection information,
The switching means 111 includes an execution notification means that outputs an execution notification in response to execution of switching, holds a startup signal in response to a switching signal, and outputs a startup signal to the startup signal connection device in response to an execution notification. It is characterized by comprising a holding means.

[Industrial application field]

The present invention relates to a channel switching device that controls switching between a plurality of channel devices and a plurality of input/output devices.

[Conventional technology]

A computer system has a configuration in which multiple input/output devices are shared between multiple CPUs.

FIG. 10 is a block diagram showing the configuration of such a computer system.

In the figure, CPUs 911.913 are connected to corresponding channel devices 915.917. Channel device 91
5.917 is connected to input/output device 921.923 via channel switching device 919.

The channel switching device 919 performs input/output with the channel device 915.917 in response to an input/output request from the CPU 911.913 to the input/output device 921.923 or an interrupt request from the input/output device 921.923 to the CPU 911.913. Connections with devices 921 and 923 are switched as needed.

Connected channel device 915.917 and crowd large bag W9
Communication is performed between the input/output devices 921 and 923 in response to activation signals that activate the input/output devices 921 and 923.

The switching operation is performed by channel device 91 to avoid data corruption or other inconvenience to the computer system.
This is executed in a state where no communication is being performed on the two connection paths connecting the input/output devices 921 and 923 to the input/output devices 921 and 923.

[Problem to be solved by the invention]

By the way, in the above-mentioned conventional channel switching device, when the input/output device is activated frequently, communication is performed alternately on the two connection paths, and neither communication ends, and no matter how long it takes. There was a situation where the connection could not be switched.

The present invention solves these problems, and aims to provide a channel switching device that terminates communication and switches connections in response to a switching instruction.

[Means to solve the problem]

FIG. 1 is a block diagram of the principle of the present invention.

In the figure, a communication status notification means 110 notifies the completion status of communication between the channel device and the input/output device.

The switching unit 111 performs switching when the channel device is in the communication end state in response to a switching signal instructing switching of the connection between the channel device and the input/output device, and outputs the connection information.

The activation signal connecting means 113 outputs a activation signal for activating the input/output device to a predetermined input/output device according to the connection information.

An execution notification unit 115 included in the switching unit 111 outputs an execution notification in response to execution of switching.

The activation signal holding means 117 holds the activation signal in response to the switching signal, and outputs the activation signal to the activation signal connection means 113 in response to the execution notification.

[For production]

The channel device and the input/output device enter a communication state in response to the activation signal.

In the present invention, the activation signal is held in response to the switching signal to prevent transmission to the input/output device, and communication between the channel device and the input/output device is terminated to switch the connection.

After the switching is performed, the transmission blocking of the activation signal is released, and the activation signal is output in accordance with the connection information.

〔Example〕

FIG. 2 is a block diagram showing the configuration of an embodiment of the channel switching device of the present invention.

In the figure, the activation signal holding circuit 221 has a switching signal (a
), the start signal (b) and the stop signal output by the stop signal output circuit 222 are input, and the signal (currently being output) is input to the start signal connection circuit 223. The switching circuit 225 receives the switching instruction signal and the stop signal output from the stop signal output circuit 222, and its output, the connection signal (C), is input to the activation signal connection circuit 223 and the connection circuit 227. Start signal (f) output by the start signal connection circuit 223
is sent to the input/output device. Data and control signals are sent to the input/output device side via the connection circuit 227.

Here, the correspondence between FIG. 1 and FIG. 2 will be shown.

The communication state notification means 110 corresponds to the stop signal output circuit 222.

The switching means 111 corresponds to the switching circuit 225.

The activation signal connection means 113 corresponds to the activation signal connection circuit 223.

The activation signal holding means 117 corresponds to the activation signal holding circuit 221.

The execution notification corresponds to a stop signal.

FIG. 3 is a diagram illustrating connections between channel devices and input/output devices.

In the figure, the computer system of the embodiment includes a channel device O11 and input/output devices A and B, and their connections include channel device O and input/output device A (connection Oa), and channel device 0 and input/output device B (connection Oa). Consider four cases: Ob), channel device 1 and input/output device A (connection 1a), and channel device and input/output device B (connection 1b).

FIG. 4 is a block diagram showing the configuration of an embodiment of the stop signal output circuit 222.

In the figure, a startup signal A (f
) is input to one input terminal of the OR circuit 411,
The activation signal B (f) for activating the input/output device B is input to the other input terminal of the OR circuit 411 .

The output of the OR circuit 411 is input to a D-type flip-flop circuit (DFF) 413 and output from the inverting output terminal 6 as a stop signal.

Activation signals A (f) and B (f) are input/output devices A and B.
If the corresponding channel device O11 is communicating, the logic "
1”. In other words, the stop signal indicates that both reconnection paths are in the communication end state (start signal 0, l is logic "O").
J), this signal becomes logic "1".

FIG. 5 is a block diagram showing the configuration of an embodiment of the activation signal holding circuit 221.

In the figure, a switching signal (a) instructing switching of connections between channel devices 0 and 1 and input/output devices A and B is input to an input terminal J of a JK type flip-flop circuit (JKFF) 511, and a stop signal is JK pear type 7971707 circuit 5
11 input terminal K is input manually. JK pear type 797170
The output (e) of the inverting output terminal 6 of the 7 circuit 511 is input to one input terminal of the AND circuit 513. Furthermore, the activation signal 0Cb) sent from the channel device O is input to the other input terminal of the AND circuit 513 and one input terminal of the AND circuit 515. AND circuit 513.51
The output of 5 is input to a D-type flip-flop circuit 519 via an OR circuit 517. The output of the D-type flip-flop circuit 519 is sent to the input/output device as an activation signal 0(d), and is also input to the other input terminal of the AND circuit 515.

FIG. 6 is a timing diagram illustrating the operation of the activation signal holding circuit 221. The operation will be explained below.

The d output (e) of the JK pear-shaped 7971707 circuit 511 is
If the switching signal (a) is not input, the logic level is "1", and in response to the switching signal (a), the logic level becomes "0", and in response to the stop signal, it returns to the logic level rl. The AND circuit 513 outputs the activation signal 0 (b) when the d output (e) is logic "1". That is, JK pear type 7971
The configuration of the 707 circuit 511 and the AND circuit 513 is such that, in response to the switching signal (a), the activation signal 0 (b) is sent to the input/output device side.
It has the function of blocking the transmission of

Note that if the communication is forcibly terminated by blocking the transmission of the activation signal (b) during communication, the CPU will determine that an abnormality has occurred on the input/output device side, so an AND circuit 515 is installed and the activation signal 0
If (d) is being output (communicating), this output ends (
The activation signal 0 (c) is transmitted until the communication is completed.

Further, the activation signal holding circuit 221 described above has a circuit section having a similar configuration corresponding to the activation signal 1 sent from the channel device 1, and outputs the activation signal 1 in a similar manner according to the switching signal (a). It's in control.

FIG. 7 is a block diagram showing an example configuration of the switching circuit 225.

In the figure, switching instruction signals Oa, Ob, La.

1b are D-type flip-flop circuits 711.7, respectively.
It is input to the input terminal of 13.715.717. The stop signal is a D-type flip-flop circuit 711.713.7
A stop signal is input to the clock input terminal C of 15.717. D-type flip-flop circuit 711.713.71
5.717 is the connection signal Oa (c), 0b (C), 1
Output a (c) and 1b (C).

The switching instruction signals Oa, Ob, la, and 1b are signals that instruct to switch to any of the connections Oa, Ob, 1a, and 1b synchronized with the switching signal, and notify the new connection using logic rlJ. Connection signals 0a(c), 0b(C), 1a(c
), 1b(c) are the currently connected connections Oa, Ob
, 1a, 1b are notified with logic "1".

That is, in response to a stop signal that notifies that both channel devices O and l are in the communication end state, the switching instruction signal Oa is
, Ob, 1a, 1b are D-type flip-flop circuits 711
．． 713.715.717, and is notified to the activation signal connection circuit 223 and connection circuit 227.

FIG. 8 is a block diagram showing an example configuration of the activation signal connection circuit 223.

In the figure, activation signal 0 (d) and connection signal 0a (
C) is manually input to the re-input terminal of the AND circuit 811.

In addition, the activation signal 1(d) and the connection signal 1a(c) are
It is input to the re-input terminal of the AND circuit 813. The outputs of the AND circuits 811 and 813 are sent to the input/output device A via the OR circuit 815 as an activation signal A (f).

In other words, the AND circuits 811 and 81 correspond to the channel devices.
3 is installed, and the activation signal from the channel device connected to input/output device A is extracted.

Similarly, activation signal 0 (d) and connection signal ob (
C), activation signal 1(d) and connection signal 1b(c) are:
The signals are input to AND circuits 821 and 823. AND circuit 8
The output of 21.823 is outputted to input/output device B via OR circuit 825 as activation signal B (f).

FIG. 9 is a diagram illustrating the timing of the operation of the embodiment.

Hereinafter, with reference to FIGS. 2 and 9, connections Oa, 1b
The operation of switching from connection 1a to connection 1a and Ob will be explained.

In the state of connection Oa, lb, the switching circuit 225 outputs the logic "
1” connection signal Q a (c), 1b (c), logic “O
” connection signals 1a(c) and Qb(c) are output.

In this connection state, the activation signal A (f) is activated in response to activation signal 0 (b), and the activation signal B is activated in response to activation signal 1 (i).
(f) is output.

In response to the switching signal (a), the activation signal IQ)) output after the switching signal (a) is held in the activation signal holding circuit 221 and is not transmitted, and the activation signal B (f) is sent out. On the other hand, the activation signal 0 (b) was in communication when the switching signal (a) was input, so the communication continues. Also, in synchronization with the switching signal (a), the switching circuit 22
5 has switching instruction signals Oa and 1b of logic "0" and logic "1".
” switching instruction signals 1a and Ob are supplied.

Logic “0” of activation signal 0 (b) (activation signal A (f))
”, the stop signal switches to logic “1”. In response to this switching of the stop signal, the switching circuit 225 takes in the switching instruction signals Oa, lb, 1a, Ob and switches the connection, and the starting signal holding circuit 221 releases the blocking of the starting signal 1). The newly supplied activation signal 1(b) is output as the activation signal A(f), and the newly supplied activation signal 0(b) is outputted as the activation signal B(f).

As mentioned above, when the switching signal (a) is manually applied,
When one of the channel devices to be switched is in communication, after the switching signal (a), the communication of the channel device is terminated by blocking the transmission of the newly supplied activation signal (b), and the communication is terminated. Execute connection switching at the same time.

〔Effect of the invention〕

In the present invention, communication is terminated and connections are switched in accordance with the switching signal, so even if input/output devices are activated frequently, switching can be performed with minimal waiting time, and the computer system It is possible to improve processing efficiency.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a block diagram showing the configuration of an embodiment, FIG. 3 is a diagram explaining connections, and FIG. 4 is a block diagram showing the configuration of an embodiment of a stop signal output circuit. FIG. 5 is a block diagram showing the configuration of an embodiment of the activation signal holding circuit; FIG. 6 is a timing diagram explaining the operation of the activation signal holding circuit; FIG. 7 is a block diagram showing the configuration of the switching circuit; 9 is a block diagram showing the configuration of an embodiment of the activation signal connection circuit, FIG. 9 is a timing diagram illustrating the overall operation, and FIG. 10 is a block diagram showing the configuration of the entire computer system. In the figure, 110 is a communication state notification means, 111 is a switching means, 113 is a start signal connection means, 115 is an execution notification means, 117 is a start signal holding means, 221 is a start signal holding circuit, 222 is a stop signal output circuit, 223 225 is a switching circuit, 227 is a connection circuit, 411.517.815.825 is an OR circuit, 413
．． 519.711.713.715.717 is a D-type flip-flop circuit, 511 is a JK-type flip-flop circuit, 513.515
．． 811.813.821823 is an AND circuit, and 911.913 is a CPU. 915.917 is a channel device, 919 is a channel switching device, and 921.923 is an input/output device. Principle block diagram of the present invention: Figure 1: Block diagram showing the configuration of an embodiment of the invention. FIG. 6 is a block diagram illustrating the configuration of an embodiment of the activation signal holding circuit; FIG. 6 is a timing diagram illustrating the operation of the activation signal retention circuit; FIG. 7 is a block diagram illustrating the configuration of the switching circuit; FIG. 7 is a timing diagram explaining the operation of the embodiment. Figure 9 is a block diagram showing the configuration of an embodiment of the activation signal connection circuit.

Claims (1)

[Claims] (1) A communication state notification means (110) that notifies the communication end state of the channel device and the input/output device, and a communication state of the channel device in response to the switching signal instructing to switch the connection between the channel device and the input/output device. a switching means (111) that performs switching and outputs the connection information when the connection is made, and a start signal connecting means (111) that outputs a start signal for starting the input/output device to a predetermined input/output device according to the connection information.
13) In the channel switching device, the switching means (111) includes an execution notification means (115) that outputs an execution notification in response to execution of switching, and holds the activation signal in response to the switching signal. and transmits the activation signal to the activation signal connection means (1) in response to the execution notification.
13) A channel switching device characterized by comprising activation signal holding means (117) for outputting to 13).