JPH0376501B2 - - Google Patents

Info

Publication number
JPH0376501B2
JPH0376501B2 JP60080687A JP8068785A JPH0376501B2 JP H0376501 B2 JPH0376501 B2 JP H0376501B2 JP 60080687 A JP60080687 A JP 60080687A JP 8068785 A JP8068785 A JP 8068785A JP H0376501 B2 JPH0376501 B2 JP H0376501B2
Authority
JP
Japan
Prior art keywords
data
ese
msu
data transfer
mcu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60080687A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61239339A (ja
Inventor
Takashi Chiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60080687A priority Critical patent/JPS61239339A/ja
Publication of JPS61239339A publication Critical patent/JPS61239339A/ja
Publication of JPH0376501B2 publication Critical patent/JPH0376501B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP60080687A 1985-04-16 1985-04-16 ペ−ジ・デ−タ転送制御方式 Granted JPS61239339A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60080687A JPS61239339A (ja) 1985-04-16 1985-04-16 ペ−ジ・デ−タ転送制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60080687A JPS61239339A (ja) 1985-04-16 1985-04-16 ペ−ジ・デ−タ転送制御方式

Publications (2)

Publication Number Publication Date
JPS61239339A JPS61239339A (ja) 1986-10-24
JPH0376501B2 true JPH0376501B2 (enrdf_load_stackoverflow) 1991-12-05

Family

ID=13725247

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60080687A Granted JPS61239339A (ja) 1985-04-16 1985-04-16 ペ−ジ・デ−タ転送制御方式

Country Status (1)

Country Link
JP (1) JPS61239339A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02234244A (ja) * 1989-03-08 1990-09-17 Nec Corp 拡張記憶制御方式
JPH036754A (ja) * 1989-06-05 1991-01-14 Fujitsu Ltd データ転送制御方式

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59167761A (ja) * 1983-03-14 1984-09-21 Hitachi Ltd 計算機システム

Also Published As

Publication number Publication date
JPS61239339A (ja) 1986-10-24

Similar Documents

Publication Publication Date Title
US5870625A (en) Non-blocking memory write/read mechanism by combining two pending commands write and read in buffer and executing the combined command in advance of other pending command
EP0542417B1 (en) Method and direct memory access controller for asynchronously reading/writing data from/to a memory with improved throughput
JPH0461383B2 (enrdf_load_stackoverflow)
JPH0337744A (ja) データ処理装置
US5918069A (en) System for simultaneously writing back cached data via first bus and transferring cached data to second bus when read request is cached and dirty
JP2695017B2 (ja) データ転送方式
EP0344886A1 (en) Data transfer processing system
EP0380842A2 (en) Method and apparatus for interfacing a system control unit for a multiprocessor system with the central processing units
JPH05210589A (ja) 高速バッファコピー方法
US6738837B1 (en) Digital system with split transaction memory access
US5615334A (en) Memory reflection system and method for reducing bus utilization and device idle time in the event of faults
JPH0410102B2 (enrdf_load_stackoverflow)
US5107416A (en) Arrangement for simultaneously dealing with transfer requests produced by central, arithmetic and input-output processors of a super computer
JPH0376501B2 (enrdf_load_stackoverflow)
JPH0516061B2 (enrdf_load_stackoverflow)
JP3141948B2 (ja) 計算機システム
JP3039391B2 (ja) メモリシステム
JPH0415496B2 (enrdf_load_stackoverflow)
JP2679440B2 (ja) 情報処理装置
JP2594611B2 (ja) Ｄｍａ転送制御装置
JPH0461384B2 (enrdf_load_stackoverflow)
JP2825589B2 (ja) バス制御方式
JPH058459B2 (enrdf_load_stackoverflow)
JPH02259945A (ja) ストア処理方式
JPS60123944A (ja) 情報処理装置におけるバツフアメモリ制御方式

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees