JPH0373032U - - Google Patents
Info
- Publication number
- JPH0373032U JPH0373032U JP13454089U JP13454089U JPH0373032U JP H0373032 U JPH0373032 U JP H0373032U JP 13454089 U JP13454089 U JP 13454089U JP 13454089 U JP13454089 U JP 13454089U JP H0373032 U JPH0373032 U JP H0373032U
- Authority
- JP
- Japan
- Prior art keywords
- preset memory
- frequency data
- simultaneous
- receiver
- preset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 3
- 238000013497 data interchange Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
Description
第１図はこの考案の１つの実施例に係るプリセ
ツトメモリ付受信機を示すブロツク図、第２図は
第１図中のマイクロコンピユータのＲＡＭに格納
されたデータの説明図、第３図は第１図中のマイ
クロコンピユータの動作を示すフローチヤート、
第４図は２つのチヤンネルキーの同時操作の判断
タイミングを説明する説明図、第５図は第３図の
変形例を示すフローチヤート、第６図は第３図の
他の変形例を示すフローチヤートである。
主な符号の説明、１２……周波数シンセサイザ
式受信部、１４……マイクロコンピユータ、１８
……操作部、２２，２４，２６……チヤンネルキ
ー、３２……メモリキー。
FIG. 1 is a block diagram showing a receiver with preset memory according to one embodiment of this invention, FIG. 2 is an explanatory diagram of data stored in the RAM of the microcomputer in FIG. 1, and FIG. A flowchart showing the operation of the microcomputer in FIG.
FIG. 4 is an explanatory diagram explaining the timing of determining whether to operate two channel keys simultaneously, FIG. 5 is a flowchart showing a modification of FIG. 3, and FIG. 6 is a flowchart showing another modification of FIG. 3. It's a chat. Explanation of main symbols, 12...Frequency synthesizer type receiving unit, 14...Microcomputer, 18
...Operation unit, 22, 24, 26...Channel key, 32...Memory key.
Claims (1)
数シンセサイザ式受信手段と、プリセツト受信用
の周波数データを複数チヤンネル分記憶するプリ
セツトメモリと、チヤンネル別に設けられたチヤ
ンネル選択操作手段と、プリセツトメモリへの書
き込みモードを設定する書き込みモード設定操作
手段と、を含むプリセツトメモリ付受信機におい
て、 チヤンネル選択操作手段に対する２つの同時操
作を検出する同時操作検出手段と、 同時操作検出手段で同時操作が検出されたとき
、同時操作された２つのチヤンネル間でプリセツ
トメモリの周波数データを相互交換させる周波数
データ相互交換手段と、 を設けたことを特徴とするプリセツトメモリ付受
信機。 (2) 周波数データ交換手段は、同時操作検出手
段で同時操作が検出され、かつ、書き込みモード
設定操作手段が操作されたときに周波数データの
相互交換を行うようにしたこと、を特徴とする請
求項１記載のプリセツトメモリ付受信機。[Claims for Utility Model Registration] (1) Frequency synthesizer receiving means that performs electronic tuning based on a tuning control signal, a preset memory that stores frequency data for multiple channels for preset reception, and channels provided for each channel. In a receiver with a preset memory including a selection operation means and a write mode setting operation means for setting a writing mode to the preset memory, a simultaneous operation detection means for detecting two simultaneous operations on the channel selection operation means; A preset memory comprising: frequency data interchange means for mutually exchanging frequency data in the preset memory between two simultaneously operated channels when simultaneous operations are detected by the simultaneous operation detection means. Receiver with. (2) A claim characterized in that the frequency data exchange means mutually exchanges frequency data when simultaneous operations are detected by the simultaneous operation detection means and the writing mode setting operation means is operated. The receiver with preset memory according to item 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13454089U JPH0373032U (en) | 1989-11-20 | 1989-11-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13454089U JPH0373032U (en) | 1989-11-20 | 1989-11-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0373032U true JPH0373032U (en) | 1991-07-23 |
Family
ID=31681871
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13454089U Pending JPH0373032U (en) | 1989-11-20 | 1989-11-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0373032U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR200464945Y1 (en) * | 2012-09-27 | 2013-01-24 | 엘프 주식회사 | SmartPhone Protection Case System For Performing Shortcut Dialing Function In Smartphone By Bluetooth Communication |
-
1989
- 1989-11-20 JP JP13454089U patent/JPH0373032U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR200464945Y1 (en) * | 2012-09-27 | 2013-01-24 | 엘프 주식회사 | SmartPhone Protection Case System For Performing Shortcut Dialing Function In Smartphone By Bluetooth Communication |
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