JPH0369939U - - Google Patents
Info
- Publication number
- JPH0369939U JPH0369939U JP12716989U JP12716989U JPH0369939U JP H0369939 U JPH0369939 U JP H0369939U JP 12716989 U JP12716989 U JP 12716989U JP 12716989 U JP12716989 U JP 12716989U JP H0369939 U JPH0369939 U JP H0369939U
- Authority
- JP
- Japan
- Prior art keywords
- section
- circuit
- demodulation
- resistor
- squelch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 claims 2
- 238000003199 nucleic acid amplification method Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Noise Elimination (AREA)
Description
第１図は本考案の全体構成を示す受信ブロツク
図およびスケルチ回路の具体例、第２図は受信ブ
ロツク図および従来のスケルチ回路の一例。
１……可変抵抗、２……抵抗、３……ＮＰＮト
ランジスタ、４……抵抗、５……抵抗、６……Ｎ
ＰＮトランジスタ、７……抵抗、８……抵抗、９
……抵抗、１０……ＮＰＮトランジスタ、１１…
…抵抗、１２……抵抗、１３……受信入力端子、
１４……スピーカ、１５……ＮＰＮトランジスタ
、１６……抵抗、１７……抵抗。
FIG. 1 is a reception block diagram showing the overall configuration of the present invention and a specific example of a squelch circuit, and FIG. 2 is a reception block diagram and an example of a conventional squelch circuit. 1... Variable resistor, 2... Resistor, 3... NPN transistor, 4... Resistor, 5... Resistor, 6... N
PN transistor, 7...Resistor, 8...Resistor, 9
...Resistor, 10...NPN transistor, 11...
...Resistor, 12...Resistor, 13...Receive input terminal,
14... Speaker, 15... NPN transistor, 16... Resistor, 17... Resistor.
Claims (1)
ツチ部、音声増幅部から構成する受信機で復調出
力から接続される雑音増幅部、整流回路、復調出
力スイツチ部を制御するスイツチ回路を有するス
ケルチ回路において、整流回路出力とアース間に
抵抗を介してトランジスタが直列に接続され、当
該トランジスタのベースが復調出力スイツチを制
御するスケルチ回路の出力に抵抗を介して接続さ
れていることを特徴とするスケルチ回路。 A receiver consisting of a high frequency section, an intermediate frequency section, a demodulation section, a demodulation output switch section, and an audio amplification section, and a squelch circuit that has a noise amplification section connected from the demodulation output, a rectifier circuit, and a switch circuit that controls the demodulation output switch section. In the squelch, a transistor is connected in series between the output of the rectifier circuit and the ground via a resistor, and the base of the transistor is connected via the resistor to the output of a squelch circuit that controls a demodulation output switch. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12716989U JPH0369939U (en) | 1989-11-01 | 1989-11-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12716989U JPH0369939U (en) | 1989-11-01 | 1989-11-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0369939U true JPH0369939U (en) | 1991-07-12 |
Family
ID=31674943
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12716989U Pending JPH0369939U (en) | 1989-11-01 | 1989-11-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0369939U (en) |
-
1989
- 1989-11-01 JP JP12716989U patent/JPH0369939U/ja active Pending
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