JPH0367454U - - Google Patents

Info

Publication number
JPH0367454U
JPH0367454U JP12916989U JP12916989U JPH0367454U JP H0367454 U JPH0367454 U JP H0367454U JP 12916989 U JP12916989 U JP 12916989U JP 12916989 U JP12916989 U JP 12916989U JP H0367454 U JPH0367454 U JP H0367454U
Authority
JP
Japan
Prior art keywords
semiconductor
pellets
semiconductor pellets
positioning
positioning means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12916989U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12916989U priority Critical patent/JPH0367454U/ja
Publication of JPH0367454U publication Critical patent/JPH0367454U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Die Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案の第1の実施例の分解状態を
示す断面図、第2図は同実施例の一部拡大断面図
、第3図は、本考案の第2の実施例の要部の分解
状態を示す断面図、第4図は、同実施例の要部の
一部拡大断面図である。 1……半導体ペレツト、2……マイナス電極板
、2A……溝、3……プラス側電極板、4……パ
ツケージ、5……キヤツプ、6……位置決め板、
6A……孔。
FIG. 1 is a sectional view showing an exploded state of the first embodiment of the present invention, FIG. 2 is a partially enlarged sectional view of the same embodiment, and FIG. 3 is a main part of the second embodiment of the present invention. FIG. 4 is a partially enlarged sectional view of the main part of the same embodiment. DESCRIPTION OF SYMBOLS 1... Semiconductor pellet, 2... Negative electrode plate, 2A... Groove, 3... Positive side electrode plate, 4... Package, 5... Cap, 6... Positioning plate,
6A...hole.

Claims (1)

【実用新案登録請求の範囲】 1 複数の半導体ペレツトと、該複数の半導体ペ
レツトに加圧接触して当該複数の半導体ペレツト
を並列接続するための一対の電極部材と、前記複
数の半導体ペレツトのそれぞれを位置決めするた
めの位置決め手段とを備えたことを特徴とする半
導体装置。 2 前記位置決め手段は、前記一対の電極部材の
いずれか一方または双方に形成した複数の凹所で
あることを特徴とする請求項第1に記載の半導体
装置。 3 前記位置決め手段は、前記各半導体ペレツト
を入れる複数の孔を形成した位置決め板であるこ
とを特徴とする請求項第1項記載の半導体装置。
[Claims for Utility Model Registration] 1. A plurality of semiconductor pellets, a pair of electrode members for connecting the plurality of semiconductor pellets in parallel by pressurizing contact with the plurality of semiconductor pellets, and each of the plurality of semiconductor pellets. and positioning means for positioning the semiconductor device. 2. The semiconductor device according to claim 1, wherein the positioning means is a plurality of recesses formed in one or both of the pair of electrode members. 3. The semiconductor device according to claim 1, wherein the positioning means is a positioning plate having a plurality of holes into which the semiconductor pellets are placed.
JP12916989U 1989-11-06 1989-11-06 Pending JPH0367454U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12916989U JPH0367454U (en) 1989-11-06 1989-11-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12916989U JPH0367454U (en) 1989-11-06 1989-11-06

Publications (1)

Publication Number Publication Date
JPH0367454U true JPH0367454U (en) 1991-07-01

Family

ID=31676825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12916989U Pending JPH0367454U (en) 1989-11-06 1989-11-06

Country Status (1)

Country Link
JP (1) JPH0367454U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008261179A (en) * 2007-04-13 2008-10-30 Artrock:Kk Tile panel and connecting member for the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008261179A (en) * 2007-04-13 2008-10-30 Artrock:Kk Tile panel and connecting member for the same

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