JPH0365359A - Driving device for multi-bit heat generating circuit - Google Patents

Abstract

PURPOSE:To unify the calorific value of respective heat generating resistors by providing a feedback means, regulating the ON-times of respective switching means in accordance with the values of ON-resistances. CONSTITUTION:A drive control signal (a1), having a pulse width ta, is inputted into one terminal of a NOR gate 36i from a logic unit while a feedback signal (g1) is inputted into the other terminal of the same. Here, all of the gate delay times of logical operation circuits 31i, 32i, 36i, 37i are deemed equal to a value (tr). A delay signal (b1) is converted by an inverter 37i into a gate signal Ci. A transistor Ti becomes ON-state while synchronizing with the 'H' level of the gate signal Ci by the delay of a turn-ON period of time (tPHL) and becomes OFF-state by the delay of a turn-OFF period of time (tPLH). A delay time from the rise-up of the drive control signal (ai) until the transistor Ti becomes ON-state is 2tp+tPHL while the delay time from the breaking of the drive control signal (ai) until it becomes OFF-state is 4tp+tPLH+tp. Accordingly, a difference between TON and Ta becomes tp+tPLH-tPHL+2tp. According to this method, the ON-time is regulated automatically even when a variability exists in the ON-resistances, whereby valiability in concentration may be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive device for a multi-bit heat generating circuit suitable as a thermal head drive circuit, and relates to a technique that can equalize the amount of heat generated between each bit.

[Conventional technology]

Conventionally, the thermal head drive circuit of a thermal head printer that prints on thermal paper has a parallel connection structure of 1-bit heat generating circuits 1, 2, 3, 4, etc., as shown in FIG. 2, 3.4 ~ is the heating resistance R,, R2, R
,,R,~ and the high voltage power supply ■□ based on the gate signal as an on/off drive control signal generated by the logic section 10
Insulated gate field effect transistor TT as a switching means for connecting and disconnecting the power supply from □ to the heating resistor
2. It is composed of Ts, T-~. Logic section 10 and insulated gate field effect transistor T1~
is integrated into a single chip as a semiconductor integrated circuit, and the heating resistor R1- is attached externally.

In the printing operation on thermal paper, as shown in Figure 7,
When the gate signal CI supplied from the logic unit 10 to the gate of the insulated gate field effect transistor TI of the corresponding bit becomes H level, the insulated gate field effect transistor T becomes conductive and the output voltage (drain voltage>
D+ goes to L level, which causes high voltage power supply VTHR
A drive current T is applied to the heating resistor R1 of the 1-bit heating circuit from
t flows, and the Joule heat sensitizes the thermal paper.

By the way, the printing density is determined by the amount of heat generated (Joule heat amount) of each heating resistor. In order to eliminate density unevenness, it is necessary to reduce variations in the current value of the drive current flowing through each heating resistor and the power supply time (on time) toM. The cause of the variation in the current value is the variation in the on-resistance of the insulated gate field effect transistor integrated into an IC, which is larger than the variation in the resistance value of the external heating resistor R4.

On the other hand, power supply time t. 4. The cause of the variation in is the delay time for the gate signal of the insulated gate field effect transistor (turn-on period jpLu and turn-off period t□l).
This is the variation in Therefore, an effective means for reducing concentration unevenness is to suppress variations in the on-resistance and delay time values of insulated gate field effect transistors. Therefore, conventionally, in multi-gradation and color thermal head drive circuits where it is necessary to reduce density unevenness as much as possible, the device dimensions (element scale) of insulated gate field effect transistors have been reduced in order to reduce on-resistance variations. At the same time, in order to increase the response speed and reduce variation in delay time, the front-stage element that switches the gate signal of the insulated gate 74 field effect transistor has been made larger.

[Problem to be solved by the invention]

However, the above thermal head drive circuit has the following problems.

In other words, when the device area of an insulated gate field effect transistor and its preceding element is increased, the variation in on-resistance becomes smaller, but the gate capacitance also increases, which slows down the switching speed and increases the variation in delay time. Become.

In other words, although physical expansion of the element area lowers the absolute value of the on-resistance, it reciprocally increases the switching speed, making it impossible to substantially reduce concentration unevenness.

Therefore, the problem of the present invention is not to eliminate concentration unevenness by reducing the on-resistance and switching speed of an insulated gate field effect transistor, but to provide a correlation between on-resistance and on-time for each transistor. Another object of the present invention is to provide a driving device for a multi-bit heat generating circuit that eliminates density unevenness by equalizing the amount of heat generated between elements with a large element size (without 9 and 7).

"Means for Solving the Problems" In order to solve the above problems, the means taken by the present invention is to use a switching means such as an insulated gate field effect type transistor by inputting an ON control signal in the heating circuit of each bit. Feedback control means is provided for delaying the duration of the on-control signal in accordance with the on-voltage value in the on-state of the on-state.

[Function] This means achieves the following effect. There is variation in the on-resistance of the switching means between bits, and switching means with high on-resistance has a high on-voltage, and switching means with a low on-resistance has a high on-voltage. Although the on-state voltage is low, there is an inversely proportional relationship between the on-voltage and the drive current flowing through the heating resistor.
an on-control signal is applied to the switching means;
The switching means is turned on and power supply to the heating resistor is started. In this case, the switching means 1:7 (-=1 band feedback side) (the sum means detects the on-voltage value of the switching means 17, and depending on that value, controls the on-control signal applied to the switching means). The duration is delayed.As a result, even if there are variations in the on-resistance, that is, the value of the drive current flowing through the heat-generating resistors, the on-time is automatically corrected, so the Joule heat amount of each heat-generating resistor is equalized. Density unevenness can be eliminated.

Embodiment Next, an embodiment of the present invention will be described based on the accompanying drawings.

FIG. 1 is a circuit configuration diagram of a 1-bit heat generating circuit in an embodiment of a thermal head drive circuit to which the multi-bit heat generating circuit drive device according to the present invention is applied.

This 1-bit heat generating circuit 1 includes a heat generating resistor R1, an insulated gate 7 field effect transistor T that switches the power supply from the high voltage power supply V T II n to the heat generating resistor R8 based on a gate signal CI, and a gate signal EC1. Feedback control circuit 30 i, :! −
It is roughly composed of.

The feedback control circuit 301 includes a NAND gate 31i that detects the on state of the insulated gate field effect transistor TI and obtains an on state signal di based on a drive control signal al and a gate signal C1 supplied from a logic section (not shown). , based on this on-state signal d and the output signal el of the inverter 32i, the insulated gate field effect transistor T
A transfer gate 331 that introduces the output voltage (drain voltage) fI of I, and a parallel-connected capacitor 34i that charges and discharges the step waveform of the output voltage fI with a time constant CR.
and a resistor 35], a NOR gate 361 which obtains a delay signal bl from a drive control signal a using the charge/discharge voltage as a feedback signal g1, and an inverter 371 which inverts the delay signal S to create a gate signal CI. It is configured.

Next, the operation of the above embodiment will be explained with reference to FIG. First, a drive control signal a having a pulse width T is input from the logic section to one terminal of the NOR gate 36i, and a feedback signal gi, which will be described later, is input to the other terminal.

The falling edge of the delayed signal S outputted from the NOR gate 36i is determined by the rising edge of the drive control signal al, and the falling edge of the delayed signal b
The rise of l is determined by the transition of the discharge waveform of feedback signal g+. In this embodiment, NOR gate 36
j is also used as a comparison circuit, and the NOR gate 36
], the rise of the delay signal S is determined when the voltage of the feedback signal g+ drops to the threshold V, f.

Note that here, the logic circuits 31 i , 32 i , 3
For simplicity, the gate delay times of 6 i and 37 i are all assumed to be equal, and are denoted as t. As described later, the feedback signal gI is the on-voltage (drain voltage) VO of the insulated gate field effect transistor TI.
Although the on-voltage V has a discharge period in which it drops from N to below the threshold voltage V r @f. N to threshold voltage V
If the discharge time required to drop to f@I is t, then this discharge time t is the on-voltage V. The length changes depending on the height of .

The delayed signal bl is inverted by an inverter 371 and converted into a gate signal Cr. The insulated gate field effect transistor TI is synchronized with the H level of the gate signal C8, turns on after a turn-on period t PML, and turns off after a turn-off period t PLI+. The output voltage f of the insulated gate field effect transistor T indicates the drain voltage, and ToM indicates the on-time. When the insulated gate field effect transistor T is in the off state, the output voltage fI is equal to the high voltage power supply voltage VTIII (20 to 30 V) that should be supplied to the heating resistor R8, and 1
The on-state voltage is approximately several volts depending on the on-state resistance. , becomes. On the other hand, the on-state signal d+ of the NAND gate 311 is obtained based on the drive control signal ai and the gate signal CI, and is used together with its inverted signal el as an on/off control signal for the transfer gate 33i. The transfer gate 331 is in an on state when the insulated gate field effect transistor T1 is in an on state,
The output voltage fI is passed to the capacitor 34i side. When the transfer gate 331 is turned on, the on-voltage VOI+ is applied to the capacitor C, and the capacitor C is charged. The charging voltage of the capacitor C is the on-period T of the insulated gate field effect transistor T1. On-voltage V within fI. A steady voltage of H is reached.

The delay time from the rise of the drive control signal a until the insulated gate field effect transistor TI turns on is 2tp+tpHt, and the delay from the fall of the drive control signal a until it turns off. Time is 4 tpl tpL
n+to. Therefore, the difference between TON and Ta is t
pl tpt++ tpl (L+ 2 tp.

Here, consideration will be given using the actual value of the above delay time. The voltage VT□ of the high voltage power supply is 20■1 heat generating resistor R.

is lkΩ, and approximately 20 mA is applied to each bit.

The on-resistance of the insulated gate field effect transistor TI fluctuates between about 50 and 80 Ω, and as a result, the on-voltage V. fluctuates between 1.0 and 1.5V. Capacitor 3 that determines the fall of the feedback signal
The capacitance C of 41 is 2 pF, and the resistance value R of resistor 351 is 500.
If Ω is assumed, the time constant CR is 1 μs.

NOR gate 36] threshold voltage V r e (is 0
．． Set it to 5V. FIG. 3 generally shows the drain voltage V of an insulated gate field effect transistor TI. , l is a graph showing the characteristics of drain current.As is clear from this figure, on-voltage V. If N varies between 1.0 and 1.5 V, the on-current shows a variation of about 3%.

This difference greatly affects print quality. Figure 4 shows the on-voltage V. , and the discharge fall time tp, in this example, the opening time t at the discharge rise time. is 600ns
That's all. The gate delay time t of each logic circuit is several nS
Also, the difference between the rise time and fall time of the insulated gate field effect transistor TI, t PLHt PIIL, is a number I
Since nn5, these can be ignored with respect to the discharge fall time tD. Therefore, the on-time T of the insulating game) IE field effect transistor TI. N is the H level pulse width Ta of the drive control signal a] 5, To, I = Ta
There is a relationship of + t n. FIG. 5 shows the on-voltage V. FIG. 3 is a graph diagram showing the relationship between M and drive current X Tow. However, Ta=20m. Here, the broken line shows the conventional characteristics and has a variation of about 3%, but in this example shown by the solid line, there is almost no variation when the on-voltage VON is 1.0 to 1.3V, and the on-voltage ν. 1. When I is 1.3-1.5V, there is only a variation within about 1%.

Note that although the heat generating resistor R1 and the insulated gate field effect transistor T in the bit heat generating circuit in the second embodiment are connected in series, the on-time can be controlled in the same way even when both are connected in parallel. can.

[Effects of the Invention] As explained above, the present invention is characterized in that it is provided with a feedback means that adjusts the on-time of each switching means according to the value of the on-resistance of each switching means. Even if there is variation in the on-resistance of the on-resistance, the on-time is corrected according to the dispersion distribution, so the amount of heat generated by each heat-generating resistor is equalized without increasing the device area. can suppress unevenness to a degree.

[Brief explanation of drawings]

FIG. 1 is a circuit configuration diagram of a 1-bit heat generating circuit in an embodiment of a thermal head drive circuit to which a multi-bit heat generating circuit drive device according to the present invention is applied. FIG. 2 is a timing chart of each signal in the same embodiment. FIG. 3 is a graph diagram generally showing the drain voltage versus drain current characteristic of an insulated gate field effect transistor. FIG. 4 shows the on-voltage V in the same embodiment. FIG. 2 is a graph diagram showing the relationship between N and falling discharge time t. FIG. 5 shows the on-voltage V. FIG. 3 is a graph diagram showing the relationship between N and drive current×Toi. FIG. 6 is a circuit diagram showing the configuration of a conventional thermal head drive circuit. FIG. 7 is a timing chart showing the relationship between signal waveforms in the conventional example. R3 heating resistor, T, insulated gate field effect transistor, V 7 MR high voltage N source, 301 feedback control circuit,
31i-NAND gate, 32i, 37i
Inverter, 33 Transfer gate, 341 Capacitor, 35] Resistor, 36i-NOR gate, t
. Discharge time, vol on voltage, v rflr ””
” L threshold VTHR High voltage power supply drive current X TON 1.5 Drain voltage (V) Figure VON () Figure Gate signal CI Figure

Claims (1)

[Scope of Claims] 1) A driving device for a multi-bit heat generating circuit in which a heat generating resistor and a switching means for connecting and disconnecting power supply to the heat generating resistor from a constant voltage power source based on an on/off control signal constitute a 1-bit heat generating circuit. A driving device for a multi-bit heat generating circuit, characterized in that each heat generating circuit is provided with feedback control means for delaying the duration of the ON control signal according to the ON voltage value in the ON state of the switching means.