JPH036316U - - Google Patents

Info

Publication number
JPH036316U
JPH036316U JP6554889U JP6554889U JPH036316U JP H036316 U JPH036316 U JP H036316U JP 6554889 U JP6554889 U JP 6554889U JP 6554889 U JP6554889 U JP 6554889U JP H036316 U JPH036316 U JP H036316U
Authority
JP
Japan
Prior art keywords
hole
led out
end surface
surface side
spectacle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6554889U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6554889U priority Critical patent/JPH036316U/ja
Publication of JPH036316U publication Critical patent/JPH036316U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
  • Filters And Equalizers (AREA)
  • Electronic Switches (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の実施例を示す配線図、第2
図は第1図の近似的な等価回路図、第3図は第1
図の精密な等価回路図、第4図及び第5図はそれ
ぞれ第1図の実施例の挿入損失周波数特性及び不
整合減衰量周波数特性の一例を示す図、第6図は
RFスイツチ回路を中心として示したビデオテー
プレコーダのブロツク図、第7図は従来のRFス
イツチ回路の回路図である。
Figure 1 is a wiring diagram showing an embodiment of this invention, Figure 2 is a wiring diagram showing an embodiment of this invention.
The figure is an approximate equivalent circuit diagram of Figure 1, and Figure 3 is an approximate equivalent circuit diagram of Figure 1.
Figures 4 and 5 are diagrams showing an example of the insertion loss frequency characteristics and mismatch attenuation frequency characteristics of the embodiment shown in Figure 1, respectively, and Figure 6 is a diagram centered on the RF switch circuit. 7 is a block diagram of a video tape recorder shown as . FIG. 7 is a circuit diagram of a conventional RF switch circuit.

Claims (1)

【実用新案登録請求の範囲】 眼鏡形コアと、第1、第2巻線と、トランジス
タとを有するRFスイツチ回路であつて、 上記第1、第2巻線は、上記眼鏡形コアの一方
の端面側よりその第1貫通孔に挿入され、他方の
端面側より外部に導出された後折り返されて、上
記眼鏡形コアの第2貫通孔に挿入されて上記一方
の端面側より外部に導出され、 上記一方の端面側において、上記第1貫通孔よ
り導出される上記第2巻線と、上記第2貫通孔よ
り導出される第1巻線とはより合わされて上記ト
ランジスタのコレクタに接続され、 そのトランジスタのエミツタは接地され、ベー
スは制御端子に接続され、 上記一方の端面側において、上記第1貫通孔よ
り導出される上記第1巻線がRF信号の入力端子
に接続され、上記第2貫通孔より導出される上記
第2巻線がRF信号の出力端子に接続され、 上記制御端子に与える制御信号がオン及びオフ
にされて、上記入力端より出力側への伝送がそれ
ぞれ阻止状態及び通過状態とされることを特徴と
する、 RFスイツチ回路。
[Claims for Utility Model Registration] An RF switch circuit including a spectacle-shaped core, first and second windings, and a transistor, wherein the first and second windings are connected to one of the spectacle-shaped cores. It is inserted into the first through hole from the end surface side, led out from the other end surface side, and then folded back, inserted into the second through hole of the spectacle-shaped core, and led out from the one end surface side. , on the one end surface side, the second winding led out from the first through hole and the first winding led out from the second through hole are twisted together and connected to the collector of the transistor, The emitter of the transistor is grounded, the base is connected to a control terminal, the first winding led out from the first through hole is connected to the RF signal input terminal on the one end surface side, and the second The second winding led out from the through hole is connected to the RF signal output terminal, and the control signal applied to the control terminal is turned on and off, so that transmission from the input terminal to the output side is inhibited and disabled, respectively. An RF switch circuit characterized in that it is in a pass state.
JP6554889U 1989-06-05 1989-06-05 Pending JPH036316U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6554889U JPH036316U (en) 1989-06-05 1989-06-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6554889U JPH036316U (en) 1989-06-05 1989-06-05

Publications (1)

Publication Number Publication Date
JPH036316U true JPH036316U (en) 1991-01-22

Family

ID=31597474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6554889U Pending JPH036316U (en) 1989-06-05 1989-06-05

Country Status (1)

Country Link
JP (1) JPH036316U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5142451A (en) * 1974-10-08 1976-04-10 Nippon Electric Co KOSHUHARITOKUSEIGYOKAIRO
JPS5823423B2 (en) * 1978-08-24 1983-05-14 吉田 輝男 Soft writing composition

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5142451A (en) * 1974-10-08 1976-04-10 Nippon Electric Co KOSHUHARITOKUSEIGYOKAIRO
JPS5823423B2 (en) * 1978-08-24 1983-05-14 吉田 輝男 Soft writing composition

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