JPH036314U - - Google Patents

Info

Publication number
JPH036314U
JPH036314U JP6581489U JP6581489U JPH036314U JP H036314 U JPH036314 U JP H036314U JP 6581489 U JP6581489 U JP 6581489U JP 6581489 U JP6581489 U JP 6581489U JP H036314 U JPH036314 U JP H036314U
Authority
JP
Japan
Prior art keywords
output
input
switch
input signal
output terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6581489U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6581489U priority Critical patent/JPH036314U/ja
Publication of JPH036314U publication Critical patent/JPH036314U/ja
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す図で、第2図
はスイツチ回路の一実施例を示す図で、第3図は
本考案の一実施例を示す図で、第4図は従来例を
示す図である。 1……入力端、2……出力端、3
……スイツチ回路、4……負荷、5……過負荷防
止回路、6……ソレノイド、7……スイツチ、8
……電力増幅器である。
Fig. 1 is a diagram showing an embodiment of the present invention, Fig. 2 is a diagram showing an embodiment of a switch circuit, Fig. 3 is a diagram showing an embodiment of the present invention, and Fig. 4 is a diagram showing a conventional switch circuit. It is a figure which shows an example. 1...Input end, 2 1 to n ...Output end, 3 1 to n
...Switch circuit, 4...Load, 5...Overload prevention circuit, 6...Solenoid, 7...Switch, 8
...It is a power amplifier.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号が入力される入力端と、n個の出力端
に入力信号を切換えて接続するn個のスイツチ回
路とを具備し、n個のスイツチ回路のうち1個又
は2個が選択された時はそれぞれのスイツチ回路
で選択された出力端に接続され、3個以上が選択
されたn個の出力端のうち2個のみの出力端に接
続され入力信号が出力端に出力されることを特徴
とする信号切換装置。
It is equipped with an input terminal into which an input signal is input, and n switch circuits that switch and connect the input signal to n output terminals, and when one or two of the n switch circuits are selected. is connected to the selected output terminal of each switch circuit, and is connected to only two output terminals among the n output terminals selected from three or more, and the input signal is output to the output terminal. signal switching device.
JP6581489U 1989-06-07 1989-06-07 Pending JPH036314U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6581489U JPH036314U (en) 1989-06-07 1989-06-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6581489U JPH036314U (en) 1989-06-07 1989-06-07

Publications (1)

Publication Number Publication Date
JPH036314U true JPH036314U (en) 1991-01-22

Family

ID=31597984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6581489U Pending JPH036314U (en) 1989-06-07 1989-06-07

Country Status (1)

Country Link
JP (1) JPH036314U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5087703A (en) * 1973-12-07 1975-07-15
JPS56153428A (en) * 1980-04-28 1981-11-27 Sharp Corp Key input controlling system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5087703A (en) * 1973-12-07 1975-07-15
JPS56153428A (en) * 1980-04-28 1981-11-27 Sharp Corp Key input controlling system

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