JPH0360515A - Voltage detecting circuit - Google Patents

Voltage detecting circuit

Info

Publication number
JPH0360515A
JPH0360515A JP1196393A JP19639389A JPH0360515A JP H0360515 A JPH0360515 A JP H0360515A JP 1196393 A JP1196393 A JP 1196393A JP 19639389 A JP19639389 A JP 19639389A JP H0360515 A JPH0360515 A JP H0360515A
Authority
JP
Japan
Prior art keywords
voltage
transistor
potential
transistors
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1196393A
Other languages
Japanese (ja)
Other versions
JP2893738B2 (en
Inventor
Masashi Shoji
庄司 正志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1196393A priority Critical patent/JP2893738B2/en
Publication of JPH0360515A publication Critical patent/JPH0360515A/en
Application granted granted Critical
Publication of JP2893738B2 publication Critical patent/JP2893738B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To operate a current mirror circuit with a simple circuitry and further with a low power supply voltage by composing the current mirror circuit of the first and second transistors and further setting the driving capacity of the second transistor larger than that of the fourth transistor. CONSTITUTION:When a voltage VIN to be detected is lower in comparison with a set voltage VD only a fine current flows to transistors N1 and N2. How ever, according to a ratio between the capacity of the N1 and N2, a current to flow to the N1 is larger than a current to flow to the N2. Thus, since a current to flow to the current mirror circuit is larger than the current to flow to the N2, an output voltage Vout is the almost same potential as the potential of a potential supply terminal 1. When the voltage VIN to be detected is higher in comparison with the set voltage VD, the output voltage Vout is almost the same potential as the potential of a potential supply terminal 2 by operation reverse to the above mentioned operation. Accordingly, the current mirror circuit can be operated with the voltage lower in comparison with the conven tional voltage.

Description

【発明の詳細な説明】 [産業上の利用分野コ 本発明は検出端子に印加された電圧と所定の電圧との大
小関係を検出する電圧検出回路に関し、特に集積回路化
に好適の電圧検出回路に関する。
[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a voltage detection circuit that detects a magnitude relationship between a voltage applied to a detection terminal and a predetermined voltage, and particularly relates to a voltage detection circuit suitable for integration into an integrated circuit. Regarding.

[従来の技術] 一般に、半導体集積回路の特定の箇所の電圧を検出する
場合は、ツェナーダイオード等の定電圧素子等によりそ
の出力が所定の電圧に設定されている基準電圧源を使用
し、被検出部の電圧とこの基準電圧源の電圧とを差動増
幅等の比較回路で比較することにより行っている。
[Prior Art] Generally, when detecting the voltage at a specific point in a semiconductor integrated circuit, a reference voltage source whose output is set to a predetermined voltage by a constant voltage element such as a Zener diode is used, and the This is done by comparing the voltage of the detection section and the voltage of this reference voltage source using a comparison circuit such as a differential amplifier.

第5図は、従来のこの種の電圧検出回路を示す回路図で
ある。
FIG. 5 is a circuit diagram showing a conventional voltage detection circuit of this type.

この種の電圧検出回路は2つの入力部を有する比較器5
により構成されている。この比較器5の一方の入力部に
は基準電圧源6が接続されており、他方の入力部は検出
端子4に接続されている。このように構成された電圧検
出回路においては、検出端子4に印加される被検出電圧
が基準電圧源の電位を超えたときに、出力端子3に反転
出力電圧が出力される。
This type of voltage detection circuit consists of a comparator 5 with two inputs.
It is made up of. A reference voltage source 6 is connected to one input of the comparator 5, and the other input is connected to the detection terminal 4. In the voltage detection circuit configured in this way, an inverted output voltage is output to the output terminal 3 when the detected voltage applied to the detection terminal 4 exceeds the potential of the reference voltage source.

[発明が解決しようとする課題] しかしながら、上述の電圧検出回路は、基準電圧源及び
比較器に供給される電源が定常状態にあるときにのみ正
常に動作する。例えば、供給電源を投入したとき、又は
電源を遮断したとき等の過渡状態のときには、この電圧
検出回路は正常な動作を行うことができない。また、供
給電源電圧が低く、基準電圧源が所定の電圧を維持する
ことができない場合、又は比較器が通常の動作を行うこ
とができない場合も、被検出電圧の正常な比較検出を行
うことができない。
[Problems to be Solved by the Invention] However, the voltage detection circuit described above operates normally only when the reference voltage source and the power supplied to the comparator are in a steady state. For example, in a transient state such as when the power supply is turned on or when the power supply is cut off, this voltage detection circuit cannot operate normally. In addition, when the power supply voltage is low and the reference voltage source cannot maintain a predetermined voltage, or when the comparator cannot perform normal operation, normal comparison and detection of the detected voltage cannot be performed. Can not.

一方、供給電源電圧が低い場合においても所定の動作を
行うことができる基準電圧源及び比較器を構成すること
は可能である。しかし、このような基準電圧源及び比較
器は複雑な回路構成になるため、多くの集積回路素子が
必要であるという難点がある。
On the other hand, it is possible to configure a reference voltage source and a comparator that can perform predetermined operations even when the supply voltage is low. However, such a reference voltage source and a comparator have a complicated circuit configuration, and thus require a large number of integrated circuit elements.

本発明はかかる問題点に鑑みてなされたものであって、
回路構成が簡単であり、電源電圧が低い場合でも確実に
動作する電圧検出回路を提供することを目的とする。
The present invention has been made in view of such problems, and includes:
It is an object of the present invention to provide a voltage detection circuit that has a simple circuit configuration and operates reliably even when the power supply voltage is low.

[課題を解決するための手段] 本発明に係る電圧検出回路は、第1の電位供給端子と第
2の電位供給端子との間に接続され第1導電型の第1の
トランジスタ、第2導電型の第2のトランジスタ及び抵
抗が直列に接続されて構成された第1の直列回路と、こ
の第1の直列回路に並列接続され、第1導電型の第3の
トランジスタ及び第2導電型の第4のトランジスタが直
列に接続されて構成された第2の直列回路とを有し、前
記第1及び第2のトランジスタの接続点並びに前記第3
及び第4のトランジスタの接続点のうちの一方の接続点
は前記第1及び第3のトランジスタの各制御電極に接続
され、前記第1及び第2のトランジスタの接続点並びに
前記第3及び第4のトランジスタの接続点のうちの他方
の接続点は出力端子に接続され、前記第2及び第4のト
ランジスタの各制御電極は検出端子に接続され、且つ前
記第2のトランジスタは前記第4のトランジスタよりも
駆動能力が大きいことを特徴とする。
[Means for Solving the Problems] A voltage detection circuit according to the present invention includes: a first transistor of a first conductivity type connected between a first potential supply terminal and a second potential supply terminal; a first series circuit configured by connecting a second transistor of the same type and a resistor in series; a third transistor of the first conductivity type and a third transistor of the second conductivity type connected in parallel to the first series circuit; a second series circuit configured by connecting fourth transistors in series, and a connection point between the first and second transistors and the third
and one of the connection points of the fourth transistor is connected to each control electrode of the first and third transistors, and one of the connection points of the first and second transistors and the third and fourth transistors are connected to each control electrode of the first and third transistors. The other of the connection points of the transistors is connected to an output terminal, each control electrode of the second and fourth transistors is connected to a detection terminal, and the second transistor is connected to the fourth transistor. It is characterized by a greater driving capacity than the

[作用コ 第1及び第2の電位供給端子に夫々印加される電位を第
1のレベル及び第2のレベルとすると、検出端子に設定
電位に対して第2のレベル側の電位が印加されたときに
は、第2及び第4のトランジスタに流れる電流は微小で
あるから抵抗での電位降下は少ない。このとき、第2の
トランジスタに流れる電流値は、第4のトランジスタに
流れる電流値よりも少ないので、第1及び第3のトラン
ジスタからなるカレントミラー回路に流れる電流とその
出力に接続されたトランジスタに流れる電流に所定の大
小関係が生じるので、出力゛端子のレベルは第1のレベ
ル又は第2のレベルになる。
[Action] If the potentials applied to the first and second potential supply terminals are the first level and second level, then a potential on the second level side with respect to the set potential is applied to the detection terminal. Sometimes, the current flowing through the second and fourth transistors is so small that the potential drop across the resistor is small. At this time, the current value flowing through the second transistor is smaller than the current value flowing through the fourth transistor, so the current flowing through the current mirror circuit consisting of the first and third transistors and the transistor connected to its output are Since a predetermined magnitude relationship occurs in the flowing current, the level of the output terminal becomes the first level or the second level.

また、検出端子に設定電位に対して第1のレベル側の電
位が印加されたときは、第2及び第4のトランジスタに
流れる電流は大きいので、抵抗での電圧降下が大きくな
る。これにより、カレントミラー回路に流れる電流が抑
制されるか、又は抵抗による電圧降下の影響が直接税れ
て、出力端子は第2のレベル又は第1のレベルになる。
Furthermore, when a potential on the first level side with respect to the set potential is applied to the detection terminal, the current flowing through the second and fourth transistors is large, so the voltage drop across the resistor becomes large. As a result, the current flowing through the current mirror circuit is suppressed, or the effect of the voltage drop due to the resistance is directly reduced, and the output terminal becomes the second level or the first level.

本発明によれば、外部に基準電圧源を設ける必要がなく
、カレントミラー回路の増幅率、第2及び第4のトラン
ジスタの素子寸法及び前記抵抗の抵抗値により、被検出
電圧と比較すべき設定電位が決定される。従って、この
電圧検出回路は第を及び第2の電位供給端子間の電圧が
第1の直列回路が動作できる電圧であれば正常に動作す
るため、その動作可能電圧の下限は極めて低い。
According to the present invention, there is no need to provide an external reference voltage source, and the setting to be compared with the voltage to be detected is determined by the amplification factor of the current mirror circuit, the element dimensions of the second and fourth transistors, and the resistance value of the resistor. The potential is determined. Therefore, since this voltage detection circuit operates normally as long as the voltage between the first and second potential supply terminals is a voltage at which the first series circuit can operate, the lower limit of its operable voltage is extremely low.

[実施例コ 次に、本発明の実施例について添付の図面を参照して説
明する。
[Embodiments] Next, embodiments of the present invention will be described with reference to the accompanying drawings.

第1図は本発明の第1の実施例に係る電圧検出回路を示
す回路図である。
FIG. 1 is a circuit diagram showing a voltage detection circuit according to a first embodiment of the present invention.

電位供給端子1と電位供給端子2との間にはP型MO8
?I!界効果トランジスタP、 、N型MO8電界効果
トランジスタN、及び抵抗R1が直列に接続されている
。また、これと同様に、電位供給端子1と電位供給端子
2との間にはP型MO8電界効果トランジスタP2及び
N型MOS電界効果トランジスタN2が直列に接続され
ている。ここでトランジスタN1はトランジスタN2に
比べて駆動能力が大きく設定されている。そして、P型
MO8)ランジスタPl及びP型MO8)ランジスタP
2は、そのゲートがP型MO8)ランジスタP1のドレ
インに短絡接続されてカレントミラー回路を構成してい
る。また、N型MOS)ランジスタN1及びN型MOS
)ランジスタN2の各ゲートは短絡接続されており、検
出端子4に導出されている。更に、P型MOSトランジ
スタP2及びN型MOS)ランジスタN2の接続点は出
力端子3に接続されている。
P-type MO8 is connected between potential supply terminal 1 and potential supply terminal 2.
? I! A field effect transistor P, , an N-type MO8 field effect transistor N, and a resistor R1 are connected in series. Similarly, a P-type MO8 field effect transistor P2 and an N-type MOS field effect transistor N2 are connected in series between the potential supply terminal 1 and the potential supply terminal 2. Here, the driving ability of the transistor N1 is set larger than that of the transistor N2. Then, P-type MO8) transistor Pl and P-type MO8) transistor P
2 has its gate short-circuited to the drain of a P-type MO transistor P1 to form a current mirror circuit. In addition, N-type MOS) transistor N1 and N-type MOS
) Each gate of the transistor N2 is short-circuited and led out to the detection terminal 4. Furthermore, a connection point between the P-type MOS transistor P2 and the N-type MOS transistor N2 is connected to the output terminal 3.

次に、この電圧検出回路の動作について説明する。Next, the operation of this voltage detection circuit will be explained.

第2図は、横軸に被検出電圧V□、をとり、縦軸に出力
電圧V。UTをとって、本実施例における両者の関係を
示すグラフ図である。被検出電圧VtSが設定電圧VD
に比して低い場合は、トランジスタNl、N2には微小
な電流しか流れないが、トランジスタN1.N2の能力
比からトランジスタN1に流れる電流の方がトランジス
タN2に流れる電流よりも大きい。このため、カレント
ミラー回路に流れる電流はトランジスタN2に流れる電
流よりも大きくなるので、出力電圧V。1.、Tは電位
供給端子lの電位と路間−の電位になる。
In FIG. 2, the horizontal axis represents the detected voltage V□, and the vertical axis represents the output voltage V. It is a graph diagram showing the relationship between the two in this example, taking UT. Detected voltage VtS is set voltage VD
, only a small current flows through the transistors Nl and N2, but the current flows through the transistors N1. The current flowing through the transistor N1 is larger than the current flowing through the transistor N2 from the capability ratio of N2. Therefore, the current flowing through the current mirror circuit becomes larger than the current flowing through transistor N2, so that the output voltage V. 1. , T is the potential between the potential supply terminal l and the potential between the path -.

また、被検出電圧VINが設定電位VDに比して高い場
合は、トランジスタN、、N2には大きな電流が流れ、
抵抗R8による電圧降下でカレントミラー回路の電流値
が抑制されトランジスタN2に流れる電流よりもカレン
トミラー回路に流れる電流の方が小さくなる。このため
、出力電圧VOUTは電位供給端子2の電位と路間−の
電位になる。
Furthermore, when the detected voltage VIN is higher than the set potential VD, a large current flows through the transistors N, N2,
The voltage drop caused by the resistor R8 suppresses the current value of the current mirror circuit, and the current flowing through the current mirror circuit becomes smaller than the current flowing through the transistor N2. Therefore, the output voltage VOUT becomes a potential between the potential of the potential supply terminal 2 and the line.

ここで設定電位VDはP型MO8電界効果トランジスタ
P1.P2により構成されるカレントミラー回路の電流
増幅率、N型MO8電界効果トランジスタNr、N2の
素子寸法及び抵抗R1の抵抗値により決定される。従っ
て、電位供給端子1及び2間の電圧はMO3電界効果ト
ランジスタPs、Nt及び抵抗R1からなる直列回路が
動作することができる電圧よりも高い電圧であれば正常
に動作するため、本実施例に係る電圧検出回路は、従来
に比して低い電圧で動作することができる。
Here, the set potential VD is the P-type MO8 field effect transistor P1. It is determined by the current amplification factor of the current mirror circuit constituted by P2, the element dimensions of N-type MO8 field effect transistor Nr, N2, and the resistance value of resistor R1. Therefore, if the voltage between the potential supply terminals 1 and 2 is higher than the voltage at which the series circuit consisting of the MO3 field effect transistors Ps and Nt and the resistor R1 can operate, it will operate normally. Such a voltage detection circuit can operate at a lower voltage than conventional ones.

ちなみに、本発明者は、各トランジスタとしてエンハン
スメント型MOS電界効果トランジスタを使用し、カレ
ントミラー回路の電流増幅率をlにifし、MOSトラ
ンジスタN1のゲート長に対するゲート幅の値をMOS
)ランジスタN2のゲート長に対するゲート幅の値の2
0倍に設定し、抵抗R1の値をIMΩに設定して、実際
に本実施例に係る電圧検出回路を制作した。その結果、
この電圧検出回路の設定電位Voは0.5v以下であっ
た。
Incidentally, the inventor used an enhancement type MOS field effect transistor as each transistor, set the current amplification factor of the current mirror circuit to l, and set the value of the gate width to the gate length of the MOS transistor N1 as MOS
) 2 of the gate width value for the gate length of transistor N2
0 times, and the value of the resistor R1 was set to IMΩ, and a voltage detection circuit according to this example was actually produced. the result,
The set potential Vo of this voltage detection circuit was 0.5v or less.

また、前述の如く、この設定電圧V。を得ることができ
る動作電圧、即ち電位供給端子l及び2の間の電圧は、
MOSトランジスタPt、Nt及び抵抗R1からなる直
列回路が通常動作状態になる電圧と比較して高い電圧領
域であればよい。このため、電位供給端子l及び2間の
電圧を低い電圧にすることも可能であり、例えば、上述
の例における設定電位(■。: 0.5V)と同程度の
極めて低い電圧にすることも可能である。
In addition, as described above, this set voltage V. The operating voltage at which it is possible to obtain, i.e. the voltage between the potential supply terminals l and 2, is
It is sufficient that the voltage range is higher than the voltage at which the series circuit consisting of the MOS transistors Pt, Nt and the resistor R1 is in a normal operating state. Therefore, the voltage between the potential supply terminals 1 and 2 can be set to a low voltage, for example, it can be set to an extremely low voltage comparable to the set potential (■.: 0.5V) in the above example. It is possible.

更に、上述した第2図の特性とは逆の特性となるように
電圧検出回路を構成することも容易にできる。この場合
は、第1図においてMOS)ランジスタP、及びP2の
ゲートをMOS)ランジスタP2及びN2の接続点に接
続し、MOSトランジスタPt及びN□の接続点を出力
端子3に接続する。これにより、被検出電圧Vxsが設
定電圧Voに比して低い場合に、出力電圧V。LJTは
電位供給端子2の電位近傍となり、被検出電圧VXSが
設定電圧V。に比して高い場合に、出力電圧v out
は電位供給端子1の電位と略等しくなる。
Furthermore, it is also possible to easily configure the voltage detection circuit to have a characteristic opposite to that shown in FIG. 2 described above. In this case, in FIG. 1, the gates of MOS transistors P and P2 are connected to the connection point of MOS transistors P2 and N2, and the connection point of MOS transistors Pt and N□ is connected to output terminal 3. Thereby, when the detected voltage Vxs is lower than the set voltage Vo, the output voltage V. The potential of LJT is near the potential supply terminal 2, and the detected voltage VXS is the set voltage V. If the output voltage v out is higher than
is approximately equal to the potential of the potential supply terminal 1.

第3図は本発明の第2の実施例に係る電圧検出回路を示
す回路図である。
FIG. 3 is a circuit diagram showing a voltage detection circuit according to a second embodiment of the present invention.

本実施例が第1の実施例と異なる点は新たに抵抗R2−
R3及びR4が設けられていることにあり、その他の構
成は基本的には第1の実施例と同様であるので、第3図
において第1図と同一物には同一符号を付してその詳し
い説明は省略する。
The difference between this embodiment and the first embodiment is that a new resistor R2-
R3 and R4 are provided, and the other configuration is basically the same as the first embodiment, so in FIG. 3, the same parts as in FIG. Detailed explanation will be omitted.

本実施例においては、抵抗R1及びN型MOS電界効果
トランジスタN2の接続点と電位供給端子2との間に抵
抗R2が介押されている。また、電位供給端子l及び2
の間に抵抗R3及びR4が直列に接続されており、検出
端子、即ちN型MOS電界効果トランジスタN1及びN
2の各ゲートはこの抵抗R3及びR4の接続点に接続さ
れている。
In this embodiment, a resistor R2 is interposed between the potential supply terminal 2 and the connection point between the resistor R1 and the N-type MOS field effect transistor N2. In addition, potential supply terminals l and 2
Resistors R3 and R4 are connected in series between the detection terminals, that is, N-type MOS field effect transistors N1 and N
Each gate of 2 is connected to the connection point of the resistors R3 and R4.

第4図は、横軸に電源電圧■DDをとり、縦軸に出力電
圧V。UTをとって、本実施例における両者の関係を示
すグラフ図である。この第4図から明らかなように、出
力電圧V。N7は電源電圧V。Dの上昇に伴って上昇し
、電源電圧VOOが設定電位Voに到達すると急激に低
電圧(Lレベル)に反転動作する。
In Figure 4, the horizontal axis shows the power supply voltage ■DD, and the vertical axis shows the output voltage V. It is a graph diagram showing the relationship between the two in this example, taking UT. As is clear from FIG. 4, the output voltage V. N7 is the power supply voltage V. It rises as D rises, and when the power supply voltage VOO reaches the set potential Vo, it rapidly inverts to a low voltage (L level).

MOS)ランジスタN1及びN2を弱反転送領域で動作
するようにこれらMOSトランジスタN1及びN2の素
子寸法を設定すると、設定電圧Voは下記第(1)式に
示すようになる。
When the element dimensions of the MOS transistors N1 and N2 are set so that they operate in the weak anti-transfer region, the set voltage Vo becomes as shown in equation (1) below.

Vo ” (1+R3/R4)@  (Vossz+(
1+P2/Pi)・(R2/R1)・(KT/q)fn
 ((NI IPl)/ (N2・P2)))・・・(
1) 但し、R1乃至R4は各抵抗R,乃至R4の抵抗値、V
O1lIN□はトランジスタN2のゲート・ソース間電
圧、PL、P2.Nl及びN2はトランジスタP、、P
Q、N、及びN2のゲート長に対するゲート幅の値、q
は電子の電荷、Kはボルツマン定数、Tは絶対温度であ
る。
Vo” (1+R3/R4) @ (Vossz+(
1+P2/Pi)・(R2/R1)・(KT/q)fn
((NI IPl)/ (N2・P2)))...(
1) However, R1 to R4 are the resistance values of each resistor R, to R4, and V
O1lIN□ is the gate-source voltage of transistor N2, PL, P2. Nl and N2 are transistors P,,P
Gate width values for gate lengths of Q, N, and N2, q
is the electron charge, K is Boltzmann's constant, and T is the absolute temperature.

この第(1)式から明らかなように、設定電圧Voは一
般に負の温度係数を有するトランジスタのゲート・ソー
ス間電圧と、正の温度係数を有する抵抗R2の電圧降下
分とにより決定される。このゲート・ソース間?U圧と
抵抗R2の電圧降下分が相殺されるように各パラメータ
を設定することにより、温度依存性が小さい電圧検出回
路を得ることができる。
As is clear from equation (1), the set voltage Vo is generally determined by the gate-source voltage of the transistor having a negative temperature coefficient and the voltage drop across the resistor R2 having a positive temperature coefficient. Between this gate and source? By setting each parameter so that the U voltage and the voltage drop across the resistor R2 cancel each other out, a voltage detection circuit with low temperature dependence can be obtained.

例えば、絶対温度Tが300KにおけるトランジスタN
2のゲート・ソース間電圧V。SN□が0.4Vであり
、このゲート・ソース間電圧V。SN2の温度係数が−
2,7mV/”Cであるとき、Nl/N2=Io、P2
/P1= 2、R1=IMΩ、R2=3.5MΩ、R3
/R4= 1というように各定数を設定すると、設定電
圧VDは2.4vとなり、この設定電圧V。は温度変化
に対して優れた安定性を示す。
For example, the transistor N at an absolute temperature T of 300K
2 gate-source voltage V. SN□ is 0.4V, and this gate-source voltage V. The temperature coefficient of SN2 is -
When 2.7mV/”C, Nl/N2=Io, P2
/P1=2, R1=IMΩ, R2=3.5MΩ, R3
When each constant is set such as /R4=1, the set voltage VD becomes 2.4v, and this set voltage V. shows excellent stability against temperature changes.

上述の如く各構成素子を形成することにより、温度に対
する安定性が優れており、低い供給電圧においても正常
に動作できる電圧検出回路を得ることができる。
By forming each component as described above, it is possible to obtain a voltage detection circuit that has excellent stability against temperature and can operate normally even at a low supply voltage.

[発明の効果] 以上説明したように本発明によれば、第1及び第2のト
ランジスタ並びに抵抗からなる第1の直列回路と、第3
及び第4のトランジスタからなる第2の直列回路とが並
列接続されていると共に、前記第1及び第2のトランジ
スタによりカレントミラー回路が構成され、更に第2の
トランジスタの駆動能力を第4のトランジスタの駆動能
力よりも大きく設定することによって電圧検出回路が構
成されている。このため、本発明に係る電圧検出回路は
、低電源電圧で動作させることが可能である。また、こ
の電圧検出回路は構成素子数が少なく、回路構成が簡単
であり、集積回路化に好適である。
[Effects of the Invention] As explained above, according to the present invention, the first series circuit consisting of the first and second transistors and the resistor, and the third
and a second series circuit consisting of a fourth transistor are connected in parallel, and a current mirror circuit is configured by the first and second transistors, and the driving ability of the second transistor is applied to the fourth transistor. The voltage detection circuit is configured by setting the drive capacity to be larger than the drive capacity of the voltage detection circuit. Therefore, the voltage detection circuit according to the present invention can be operated with a low power supply voltage. Further, this voltage detection circuit has a small number of constituent elements, has a simple circuit configuration, and is suitable for integration into an integrated circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第1の実施例に係る電圧検出回路を示
す回路図、第2図は同じくその検出電圧と出力電圧との
関係を示すグラフ図、第3図は本発明の第2の実施例に
係る電圧検出回路を示す回路図、第4図は同じくその電
源電圧と出力電圧との関係を示すグラフ図、第5図は従
来の電圧検出回路を示す回路図である。 1.2;電位供給端子、3:出力端子、4;検出端子、
5;比較器、6;基準電圧源
FIG. 1 is a circuit diagram showing the voltage detection circuit according to the first embodiment of the present invention, FIG. 2 is a graph diagram showing the relationship between the detected voltage and the output voltage, and FIG. FIG. 4 is a graph diagram showing the relationship between the power supply voltage and the output voltage, and FIG. 5 is a circuit diagram showing a conventional voltage detection circuit. 1.2; Potential supply terminal, 3: Output terminal, 4; Detection terminal,
5; Comparator, 6; Reference voltage source

Claims (1)

【特許請求の範囲】[Claims] (1)第1の電位供給端子と第2の電位供給端子との間
に接続され第1導電型の第1のトランジスタ、第2導電
型の第2のトランジスタ及び抵抗が直列に接続されて構
成された第1の直列回路と、この第1の直列回路に並列
接続され、第1導電型の第3のトランジスタ及び第2導
電型の第4のトランジスタが直列に接続されて構成され
た第2の直列回路とを有し、前記第1及び第2のトラン
ジスタの接続点並びに前記第3及び第4のトランジスタ
の接続点のうちの一方の接続点は前記第1及び第3のト
ランジスタの各制御電極に接続され、前記第1及び第2
のトランジスタの接続点並びに前記第3及び第4のトラ
ンジスタの接続点のうちの他方の接続点は出力端子に接
続され、前記第2及び第4のトランジスタの各制御電極
は検出端子に接続され、且つ前記第2のトランジスタは
前記第4のトランジスタよりも駆動能力が大きいことを
特徴とする電圧検出回路。
(1) A first transistor of a first conductivity type, a second transistor of a second conductivity type, and a resistor are connected in series between a first potential supply terminal and a second potential supply terminal. a first series circuit connected in parallel to the first series circuit, and a third transistor of the first conductivity type and a fourth transistor of the second conductivity type connected in series. a series circuit, and one of the connection points of the first and second transistors and the connection point of the third and fourth transistors is connected to each control of the first and third transistors. connected to an electrode, said first and second
The connection point of the transistor and the other of the connection points of the third and fourth transistors are connected to an output terminal, and each control electrode of the second and fourth transistors is connected to a detection terminal, The voltage detection circuit is characterized in that the second transistor has a larger driving capability than the fourth transistor.
JP1196393A 1989-07-28 1989-07-28 Voltage detection circuit Expired - Fee Related JP2893738B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1196393A JP2893738B2 (en) 1989-07-28 1989-07-28 Voltage detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1196393A JP2893738B2 (en) 1989-07-28 1989-07-28 Voltage detection circuit

Publications (2)

Publication Number Publication Date
JPH0360515A true JPH0360515A (en) 1991-03-15
JP2893738B2 JP2893738B2 (en) 1999-05-24

Family

ID=16357125

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1196393A Expired - Fee Related JP2893738B2 (en) 1989-07-28 1989-07-28 Voltage detection circuit

Country Status (1)

Country Link
JP (1) JP2893738B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013074626A (en) * 2011-09-27 2013-04-22 Robert Bosch Gmbh Method and apparatus for inspecting performance of supply voltage switch for driving circuit
CN110501548A (en) * 2019-07-18 2019-11-26 上海芯旺微电子技术有限公司 A kind of micro energy lose low-voltage detection circuit for MCU

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5335465A (en) * 1976-09-14 1978-04-01 Sony Corp Differential input type trigger circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5335465A (en) * 1976-09-14 1978-04-01 Sony Corp Differential input type trigger circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013074626A (en) * 2011-09-27 2013-04-22 Robert Bosch Gmbh Method and apparatus for inspecting performance of supply voltage switch for driving circuit
CN110501548A (en) * 2019-07-18 2019-11-26 上海芯旺微电子技术有限公司 A kind of micro energy lose low-voltage detection circuit for MCU
CN110501548B (en) * 2019-07-18 2020-10-30 上海芯旺微电子技术有限公司 Micro-power-consumption low-voltage detection circuit for MCU

Also Published As

Publication number Publication date
JP2893738B2 (en) 1999-05-24

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