JPH0359750A - Bus multiplexing circuit - Google Patents

Bus multiplexing circuit

Info

Publication number
JPH0359750A
JPH0359750A JP1195802A JP19580289A JPH0359750A JP H0359750 A JPH0359750 A JP H0359750A JP 1195802 A JP1195802 A JP 1195802A JP 19580289 A JP19580289 A JP 19580289A JP H0359750 A JPH0359750 A JP H0359750A
Authority
JP
Japan
Prior art keywords
bus
power supply
signal
package
plug
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1195802A
Other languages
Japanese (ja)
Inventor
Osamu Kono
修 河野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1195802A priority Critical patent/JPH0359750A/en
Publication of JPH0359750A publication Critical patent/JPH0359750A/en
Pending legal-status Critical Current

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  • Bus Control (AREA)

Abstract

PURPOSE:To prevent the generation of bad influence to be exerted upon the other package at the time of connecting/disconnecting one package switching buses without generating instantaneous disconnection after connecting/ disconnecting the package to/from an unused bus. CONSTITUTION:A signal bus is provided with the 1st and 2nd buses 101, 102 which are independent of each other. Each of the packages 4, 5 is provided with two interface means 1, 2 passing a signal transmitted/received to/from the signal bus through a plug-in mounting means and a power supply switch 3 for selecting either one of the power supply terminals of the two interface means 1, 2 and connecting the selected terminal to a power supply bus 103 through the plug-in mounting means. A common bus selecting circuit 6 for connecting either one of the 1st and 2nd signal buses 101, 102 to the power supply bus 103 without generating instantaneous disconnection is also prepared. The selection system of the switch 3 is set up in a system different from a common bus selection circuit selecting system to connect/disconnect the package. Consequently, the supply of an error wave to an unrelational circuit is suppressed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 プラッグイン実装可能なパッケージで構成される装置に
利用する。特に、バス多重化回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] Used in a device configured with a package that can be mounted in plug-in mode. In particular, it relates to bus multiplexing circuits.

〔ヰ既要〕[ヰAlready required]

本発明は、プラッグイン手段で場合に挿脱できるパッケ
ージを有するバス多重化回路において、未使用中のバス
に対して挿脱を行った後にバスの切替を無瞬断で実行す
ることにより、挿脱時の他のパッケージに及ぼす悪影響
を防止することができるようにしたものである。
The present invention provides a bus multiplexing circuit having a package that can be inserted or removed by plug-in means, by performing insertion/removal without interruption after insertion/removal of an unused bus. This makes it possible to prevent adverse effects on other packages at the same time.

〔従来の技術〕[Conventional technology]

プラッグイン実装可能なパッケージから構成される装置
で、信号線のパッケージ間インクフエースに共通バスを
用いて多重化を行う場合の構成を第2図に示す。
FIG. 2 shows a configuration in which a device is constructed from packages that can be mounted in plug-in mode, and multiplexing is performed using a common bus between the ink faces of the signal lines between the packages.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このような従来例では、共通バスが1本であり、1個の
パッケージの挿脱時に過渡的に共通バスが撹乱されるの
で、挿脱に関係ないパッケージにもエラーが発生するな
どの欠点がある。
In such a conventional example, there is only one common bus, and when one package is inserted or removed, the common bus is transiently disturbed, so there are drawbacks such as errors occurring in packages that are not related to the insertion or removal. be.

本発明はこのような欠点を除去するもので、挿脱時の過
渡撹乱による悪影響を防止することができる手段を有す
るバス多重化回路を提供することを目的とする。
The present invention aims to eliminate such drawbacks and provides a bus multiplexing circuit having means capable of preventing adverse effects caused by transient disturbances during insertion/removal.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、プラッグイン装着手段を有するパッケージの
複数個と、このパッケージと授受される信号が経由する
信号バスと、上記パッケージに電力を与えられる電源に
接続された電源バスとを備えたバス多重化回路において
、上記信号バスは、互いに独立する第一信号バスと第二
信号バスとを備え、上記パッケージのそれぞれは、上記
信号バスと授受する信号が上記プラッグイン装着手段を
介して経由する二つのインタフェース手段およびこの二
つのインタフェース手段の電源端子のいずれか一方を選
択し、上記プラッグイン装着手段を介して上記電源バス
に接続する電源供給スイッチを備え、上記第一信号バス
または上記第二信号バスのいずれか一方を上記信号バス
に無瞬断で接続する共通バス選択手段を備えたことを特
徴とする。
The present invention provides a bus multiplex system comprising a plurality of packages having plug-in attachment means, a signal bus through which signals exchanged with the packages pass, and a power supply bus connected to a power source that supplies power to the packages. In the circuit, the signal bus includes a first signal bus and a second signal bus that are independent of each other, and each of the packages has two interfaces through which signals exchanged with the signal bus pass through the plug-in mounting means. means and a power supply switch for selecting one of the power supply terminals of the two interface means and connecting it to the power supply bus via the plug-in attachment means, the first signal bus or the second signal bus; The present invention is characterized by comprising common bus selection means for connecting one of the two to the signal bus without momentary interruption.

〔作用〕[Effect]

パッケージの挿入を行うときに、未使用のバスに未使用
のインフッエースバッファICを挿入し、電源切替供給
をこのインタフェースバッファICに行い、この後に使
用中のバスから未使用のバスに無瞬断で一斉に切替える
When inserting a package, insert an unused interface buffer IC into an unused bus, supply switching power to this interface buffer IC, and then instantaneously transfer power from the bus in use to the unused bus. Switch all at once.

〔実施例〕〔Example〕

以下、本発明の一実施例を図面に基づき説明する。第1
図はこの実施例の構成を示すブロック構成国である。
Hereinafter, one embodiment of the present invention will be described based on the drawings. 1st
The figure shows the block constituent countries showing the configuration of this embodiment.

この実施例は、#lパッケージ4および#nパッケージ
5を備え、それぞれは、O糸信号バス101に接続され
るO系インタフェースバッファICIと、1系信号バス
102に接続される1系インタフエースバツフアIC2
と、0系インタフエースバツフアICIまたは1系イン
タフエースバツフアIC2のいずれに電源を供給するか
を選択する電源供給選択スイッチ3とを有腰電源が供給
されている系のインタフ二−スパ°ノファICを介して
信号が共通バス上に送出され、共通バス選択回路6で選
択されている共通バスにより信号が多重化される。すな
わち、この実施例は、プラッグイン装着手段を有するパ
ッケージ4.5と、このパッケージ4.5と授受される
信号が経由する信号ノくスと、パッケージ4.5に電力
を与えられる電源に接続された電源バス103とを備え
、さらに、本発明の特徴と子る手段として、上記信号ノ
くスは、互いに独立する第一信号バス101と第二信号
ノくス102とを備え、パッケージ4.5のそれぞれは
、上記信号バスと授受する信号が上記プラッグイン装着
手段を介して経由する二つのインタフェース手段1.2
およびこの二つのインタフェース手段1.2の電源端子
のいずれか一方を選択し、上記プラッグイン装着手段を
介して電源バス103に接続する電源供給スイッチ3を
備え、第一信号バス101または第二信号バス102の
いずれか一方を上記信号バスに無瞬断で接続する共通バ
ス選択回路6を備える。
This embodiment includes a #l package 4 and a #n package 5, each of which has an O-system interface buffer ICI connected to an O-thread signal bus 101 and a 1-system interface buffer ICI connected to a 1-system signal bus 102. Hua IC2
and a power supply selection switch 3 that selects whether to supply power to the 0-system interface buffer ICI or the 1-system interface buffer IC2. Signals are sent onto the common bus via the Nofa IC, and the signals are multiplexed by the common bus selected by the common bus selection circuit 6. That is, this embodiment includes a package 4.5 having a plug-in mounting means, a signal node through which signals exchanged with the package 4.5 are connected, and a power supply that supplies power to the package 4.5. Furthermore, as a feature and means of the present invention, the signal node includes a first signal bus 101 and a second signal node 102 that are independent of each other, and the package 4. 5 each include two interface means 1.2 through which signals exchanged with the signal bus pass through the plug-in mounting means.
and a power supply switch 3 for selecting one of the power supply terminals of the two interface means 1.2 and connecting it to the power supply bus 103 via the plug-in mounting means, and for connecting the first signal bus 101 or the second signal bus 102 to the signal bus without momentary interruption.

次に、この実施例の動作を説明する。Next, the operation of this embodiment will be explained.

パッケージが実装され運用されている状態では、各パッ
ケージの電源供給選択スイッチ3と共通バス選択回路6
とは同一の系を選択している。パッケージを挿脱する場
合は、そのパッケージの電源供給選択スイフチ3の選択
系を共通バス選択回路の選択系でない系に設定して挿脱
を行うことによって挿脱時の誤動作が防止される。
When the packages are mounted and in operation, each package's power supply selection switch 3 and common bus selection circuit 6
The same system is selected. When inserting or removing a package, the selection system of the power supply selection switch 3 of the package is set to a system other than the selection system of the common bus selection circuit, and the insertion/removal is performed to prevent malfunctions during insertion/removal.

〔発明の効果〕〔Effect of the invention〕

本発明は、以上説明したように、パッケージ挿脱時にそ
のパッケージに関係のない回線へのエラー波及を防止す
ることができる効果がある。
As described above, the present invention has the effect of preventing errors from spreading to lines unrelated to the package when a package is inserted or removed.

4、4,

【図面の簡単な説明】 第1図は本発明実施例の構成を示すブロック構成因。 第2図は従来例の構成を示すブロック構成図。 ■・・・0系インタフェースバッファIC,2・・・1
系インタフエースバツフアICl3・・・電源供給選択
スイッチ、4・・・#lパッケージ、5・・・#nパッ
ケージ、6・・・共通バス選択回路、7・・・インタフ
ェースバッファIC,101・・・0系信号バス、10
2・・・1系信号バス、103・・・電源バス、104
・・・信号バス。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a block configuration diagram showing the configuration of a conventional example. ■...0 series interface buffer IC, 2...1
System interface buffer ICl3...power supply selection switch, 4...#l package, 5...#n package, 6...common bus selection circuit, 7...interface buffer IC, 101...・0 series signal bus, 10
2...1 system signal bus, 103...Power supply bus, 104
...Signal bus.

Claims (1)

【特許請求の範囲】 1、プラッグイン装着手段を有するパッケージの複数個
と、このパッケージと授受される信号が経由する信号バ
スと、上記パッケージに電力を与えられる電源に接続さ
れた電源バスとを備えたバス多重化回路において、 上記信号バスは、互いに独立する第一信号バスと第二信
号バスとを備え、 上記パッケージのそれぞれは、上記信号バスと授受する
信号が上記プラッグイン装着手段を介して経由する二つ
のインタフェース手段およびこの二つのインタフェース
手段の電源端子のいずれか一方を選択し、上記プラッグ
イン装着手段を介して上記電源バスに接続する電源供給
スイッチを備え、 上記第一信号バスまたは上記第二信号バスのいずれか一
方を上記信号バスに無瞬断で接続する共通バス選択手段 を備えたことを特徴とするバス多重化回路。
[Claims] 1. A device comprising a plurality of packages each having a plug-in mounting means, a signal bus through which signals exchanged with the packages pass, and a power supply bus connected to a power source that supplies power to the packages. In the bus multiplexing circuit, the signal bus includes a first signal bus and a second signal bus that are independent of each other, and each of the packages receives and transmits signals to and from the signal bus via the plug-in mounting means. and a power supply switch for selecting one of the power supply terminals of the two interface means and connecting it to the power supply bus via the plug-in attachment means, the first signal bus or the second A bus multiplexing circuit comprising common bus selection means for connecting one of the signal buses to the signal bus without momentary interruption.
JP1195802A 1989-07-27 1989-07-27 Bus multiplexing circuit Pending JPH0359750A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1195802A JPH0359750A (en) 1989-07-27 1989-07-27 Bus multiplexing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1195802A JPH0359750A (en) 1989-07-27 1989-07-27 Bus multiplexing circuit

Publications (1)

Publication Number Publication Date
JPH0359750A true JPH0359750A (en) 1991-03-14

Family

ID=16347223

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1195802A Pending JPH0359750A (en) 1989-07-27 1989-07-27 Bus multiplexing circuit

Country Status (1)

Country Link
JP (1) JPH0359750A (en)

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