JPH0359394B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a method for checking the remaining time of a timer when a timer is attached to an analog electronic watch.

Various methods can be considered for simply adding a timer to an analog electronic watch. Although the set time of the timer may be displayed using a display element such as a liquid crystal, the structure for setting the time is complicated and it is not easy to use. Furthermore, the design is inferior due to the sense of incongruity between the display element such as a liquid crystal display and the dial plate.

FIG. 1 shows an analog electronic watch in which a push-type external operating member 4 is used as a switch, and the number N of times the external operating member 4 is pressed is stored in a circuit.
When setting 1 push = 1 minute, the device is configured to function as a timer after N minutes.

However, this method has the drawback that there is no way to clearly check the remaining time on the timer from the outside.

The present invention aims to eliminate such drawbacks, and its purpose is to visually confirm the remaining time on the timer.
Moreover, it is an object of the present invention to provide an analog electronic clock with a timer that is easy to use and has an excellent design.

The present invention will be described in detail below based on Examples.
FIG. 2 is a block diagram showing one embodiment of the present invention. Each component in FIG. 2 will be explained below.

The oscillator circuit 1, frequency divider circuit 2, frequency divider circuit 3, step motor drive pulse shaping circuit 7, step motor 8, wheel train 9, and hour/minute/second hands 10 are quartz type analogs that use a crystal oscillator as a time reference source. Since this is well known, a detailed explanation will be omitted using a clock as an example.

Reference numeral 4 denotes a push-type external operating member, and when it is pushed, terminal a, which is normally pulled down to "LOW", becomes "Hi". 5 is a reuse-type external operation member, which has three states: 1st stage, 2nd stage, and 3rd stage. In the 1st stage, both terminals b and c maintain "LOW", and in the 2nd stage, Then, terminal b becomes "Hi". Additionally, the third stage is configured so that the hour and minute hands can be set.

The switch control circuit 6 outputs a signal Sa' which is normally "LOW" and instantaneously becomes "Hi" when the external operating member 4 is pushed, and "Sa'" when the external operating member 5 is in the first and third stages. The signal Sb is "LOW" and becomes "Hi" when the second stage is on, and the signal Sb is normally "LOW" and instantaneously becomes "Hi" when the external operation member 5 is operated from the first or third stage to the second stage. ”, the signal Sb′ becomes
When the external operating member 5 is in the first and second stages, it outputs a signal Sc which is "LOW" and which is "HI" when it is in the third stage.

11, 12, 13, 14, 15, and 16 are timer sections.

When the timer is started, the second counter 11 is a sexagesimal counter that counts the 1Hz signal _φ1 input from the Cp terminal, outputs the 1-minute signal φmin from the Ca terminal, and the signal Sb′ input to the R terminal becomes “Hi”. ”, it will be reset.

The minute counter 12 receives a timer setting signal Sset
This is a sexagesimal up-down counter that is raised by 1 minute signal φmin and is lowered by 1 minute signal φmin, and is reset when signal Sb' becomes "Hi" and the state becomes 59.
When the state changes from 0\ to 0\, the up carry Uca momentarily becomes ``Hi'', and when the state changes from 0\ to 59, the down carry Dca momentarily becomes ``Hi''.

The hour counter 13 is a binary up-down counter that is turned up by the up-carry Uca and down by the down-carry Dca of the minute counter 12, and is reset when the signal Sb' becomes "Hi".

Timer 0\detection circuit 14 is minute counter 12
The signal φ' _T changes from "LOW" to "Hi" only at the moment when both the state of the hour counter 12 and the hour counter 13 become 0\, and it becomes "Hi" when the state of the minute counter 12 and the hour counter 13 are both 0\. At other times, it outputs a signal _φT that is LOW.

The buzzer ringing circuit 15 is configured to ring the buzzer 16 for one second from the moment the signal φ' _T becomes "Hi".

As the buzzer 16, a piezoelectric buzzer, an electromagnetic buzzer, etc. can be considered.

The second hand position counter 17 is a sexagesimal counter for storing the indicated position of the second hand, counts the motor drive signal S _M , and is reset when the signal Sconf becomes "Hi".

The formula Sconf is "Hi" only when the output signal φ _T of the timer 0\detection circuit 14 is "LOW", the output signal Sb of the switch control circuit 6 is "LOW", and the output signal Sa' is "Hi". becomes. At other times, it is always “LOW”.

The coincidence detection circuit 18 compares the states of the minute counter 12 and the second hand position counter 17, and outputs a coincidence signal Ye ₁ which is "Hi" when the contents match and "LOW" otherwise.

The internal time counter 19 is an 8192 binary counter for knowing the original time, counts the 1 Hz signal _φ1 , and is reset when the signal Sconf becomes "Hi".

The display time counter 20 has hour, minute, and second hands 10.
This is an 819 binary counter for knowing the _display position of
It is reset when becomes “Hi”.

The coincidence detection circuit 21 includes an internal time counter 19
The state of the display time counter 20 is compared with the state of the display time counter 20, and when the contents match, a match signal Ye ₂ is outputted which is "Hi" and "LOW" otherwise.

The motor drive control circuit 22 receives Chengxin Sconf, a signal
Depending on the logic states of the signals Ye ₁ and Ye ₂ , the 1 Hz signal φ ₁ or the 2 Hz signal φ ₂ is output as the motor drive signal _SM .

In addition, 23, 24, 25, 26, 27, 28 are
AND gates 29, 30, and 31 are inverters.

This concludes the explanation of each component shown in FIG. 2, and next, a specific example of the structure of the motor drive control circuit 23 shown in FIG. 2 will be shown and explained in FIG.

In FIG. 3, 32 is a flip-flop circuit with a reset terminal, and the states of Q and Q change at the fall of the signal input to the Cp terminal. 33,3
4 is an inverter, 35 and 36 are AND gates, 3
7 is an OR gate. Further, the signal Ye ₁ output from the coincidence detection circuit 18 is output to the terminal I ₁ , the signal Sconf is output to the terminal I ₂ , the signal φ 2 output from the frequency dividing circuit 2 is output to the terminal I ₃ , and the signal φ ₂ output from the frequency dividing circuit 2 is input to the terminal I ₄ . The signal φ ₁ outputted from the frequency dividing circuit 3 is inputted to the terminal I ₅ , and the signal Ye ₂ outputted from the coincidence detection circuit 21 is inputted to the terminal I 5 . Further, the terminal _O1 for outputting the motor drive signal S _M is connected to the second hand position counter 17, the display time counter 20, and the step motor drive pulse forming circuit 7.

Figure 4 shows the timing chart of Figure 3,
The operation of FIG. 3 will be explained.

AND gate 35 is flip-flop circuit 3
When the signal Sconf input to the R terminal of 2 becomes "Hi" momentarily, the signal S ₁ becomes "Hi" and the 2Hz signal φ ₂ is applied to the motor drive signal S _M until the signal Ye ₁ becomes "Hi".
Select as.

AND gate 36 is the flip-flop circuit 3
When the output signal S ₁ of No. 2 is "LOW" and the signal Ye ₂ is "Hi", the 1 Hz signal φ ₁ is selected as the motor drive signal _SM .

This concludes the explanation of FIGS. 3 and 4, and next, the operation of the analog electronic timer with a timer according to this embodiment will be explained with reference to the block diagram of FIG.

When the external operating member 5 is pulled out from the first stage to the second stage during normal time display (the hour, minute, and second hands move at 1Hz and display the current time), a signal is generated.
Sb' momentarily becomes "Hi" and the second counter 11, minute counter 12, and hour counter 13 are reset, and at the same time, the signal Sb becomes "Hi" and enters the timer set mode.

During the timer set mode (Sb is "Hi"), when the external operation member 4 is pushed once, the signal Sa' momentarily becomes "Hi", the output of the AND gate 23 becomes "Hi", and the output from the AND gate 28 becomes "Hi". set signal
Sset is output and minute counter 12 is set. That is, 1 push = 1 minute is set.

In addition, the timer setting time is determined by the hour counter 13.
When the _Q1 output of the
It's a minute.

After finishing setting the timer, press the external operating member 5.
is returned from the second stage to the first stage and the signal Sb becomes "LOW". Since the output signal φ _T of the timer 0\detection circuit is also "LOW", the output signal _{ST of the AND gate 26 becomes "LOW"} . becomes “Hi” and 1Hz signal φ ₁
passes through the AND gate 27 and is input to the second counter 11, and the timer starts. seconds counter 1
1, a 1-minute signal φmin is output every minute after the timer starts, and the minute counter 12 is turned down. Note that, after the timer starts, when the external operating member 5 is pulled out to the second stage, the timer is reset.

When the external operating member 4 is pressed once while the timer is operating, the output signal of the AND gate 24 becomes “Hi”.
Therefore, the output signal Sconf of the AND gate 25 becomes "Hi". This signal Sconf resets the second hand position counter 17, internal time counter 19, and display time counter 20. At this time, the motor drive control circuit 22 operates at 2 Hz until the contents of the minute counter 12 and second hand position counter 17 match and the output signal Ye ₁ of the match detection circuit 18 becomes "Hi".
Select signal φ ₂ as motor drive signal S _M. That is, when the external operation member 4 is pressed once while the timer is operating, the second hand moves at a fast forward rate of 2 Hz for the same number of seconds as the remaining time on the timer, thereby displaying the remaining time on the timer.

After the remaining time of the timer is displayed, the internal time counter 19 and the display time counter 20 do not match, and the output signal Ye ₂ of the match detection circuit 21
becomes “LOW” and the motor drive control circuit 22 changes the internal time counter 19 to the display time counter 2.
The motor drive signal S _M is not output until it matches the contents of 0. That is, the clock is stopped until the current time matches the time displayed on the clock.

When the internal time counter 19 and the display time counter 20 match, the match detection circuit 21 outputs a signal.
Ye ₂ becomes "Hi" and the motor drive control circuit 22 selects the 1 Hz signal φ ₁ as the motor drive signal S _M.

Minute counter 12 and hour counter 13 are both 0\
(When the remaining time of the timer reaches 0\), the signal φ _T output from the timer 0\ detection circuit 14 becomes “Hi”.
Since the output signal _ST of the AND gate 26 becomes "LOW", the AND gate 27 does not allow the 1 Hz signal φ ₁ to pass through, and the timer stops. At the same time, the signal φ' _T becomes "Hi" momentarily, and the buzzer ringing circuit 15 causes the buzzer 16 to ring for one second, indicating that the timer has ended.

With the above configuration as shown in FIG. 2, by pressing the external operating member 4 once while the timer is operating, an analog electronic timepiece with a timer that displays the remaining time of the timer by the amount of fast-forwarding of the second hand becomes possible.

This concludes the explanation of this embodiment.

The present invention displays the remaining time of the timer by the amount of movement of the hand after the timer starts, so that the remaining time of the timer can be confirmed visually and in an analog manner, and moreover, it can be easily confirmed without complicated operations unlike digital timers. Moreover, since it does not require the use of a display element such as a liquid crystal, it is possible to create an analog electronic clock with a timer that is excellent in design, and is extremely effective in practical terms.

Incidentally, in the embodiment of the present invention, when setting the timer, an example was shown in which 1 push of the external operating member 4 = 1 minute, but it may be set so that 1 push = 1 hour, or it may be set continuously (for example, from 1 to 1). It is optional to set the timer in 10 minute increments (2 seconds).

In addition, in the embodiment of the present invention, a 2Hz signal is used as a signal for fast forwarding of the step motor, but it is not limited to a 2Hz signal, and as long as one cycle is larger than the transient vibration period of the step motor, fast forwarding can be performed. Any frequency signal may be used as the signal.

Further, in the embodiment of the present invention, the timer reset after the timer start is performed by turning the external operating member 5 to 1.
Although it is configured to be reset by pulling it out from the first stage to the second stage, it may also be configured to reset by continuing to press the external operating member 4 for 1 to 2 seconds.

Further, in the embodiment of the present invention, the timer is set to a maximum of 60 minutes, but the maximum setting time can be changed to 10 minutes, 12 hours, etc. as desired.

Further, in the embodiment of the present invention, after the timer remaining time is displayed, since the time displayed on the display section is ahead of the current time, the step motor is not driven and the step motor is waited for the current time to catch up with the displayed time. However, as another method, the step motor may be reversed.

As explained above, the present invention is an electronic timepiece with a timer that includes a timer circuit, an internal counter, a motor control selection circuit, a motor, a display hand, and a display counter. When the timer display signal is received during the subtraction operation of the timer circuit, the internal counter and display counter are initialized, while the motor control selection circuit, which had been outputting the standard signal,
A fast-forward signal is sent to the motor to fast-forward the display hand. In this state, while the count value of the timer circuit is being subtracted by the standard signal, the count value of the display counter receiving the fast-forward signal is being added at a higher speed than usual. The ratio of the counted values becomes a predetermined value. In the above-described embodiment, the count value of the remaining time of the timer in minutes matches the count value of the display counter in seconds. At this point, a stop signal is supplied by the count value correspondence determination means, the motor control selection circuit stops outputting the signal, and the display hands also stop. Since the amount of movement of the display hand from the fast forward state to the stop is proportional to the remaining time of the timer, by looking at the fast forward movement angle of the hand, it is possible to know the remaining time of the set time held by the timer circuit at the time of stopping.

In this way, the timer circuit and the display counter count in opposite directions, and the count value of the display counter increases at high speed due to the fast forward signal, so it is possible to know the remaining time of the timer circuit in a short time. In particular, within the range where the motor can be driven, the faster the display hand movement speed using the fast-forward signal, the shorter the time required to display the remaining time on the timer, and the difference between the hand movement speed and the normal speed. Since the value becomes larger, the visibility of the amount of hand movement also improves. As a result, it is possible to simultaneously reduce the required display time and improve display visibility at a high level.

When the display hand first stops, the count value on the display counter is larger than the count value on the internal counter as a result of high-speed addition, but from this point on, the display counter stops counting, while the internal The counter continues counting using standard signals. Therefore, the count value of the internal counter will soon catch up with the count value of the display counter, and when the two match, the count value coincidence determination means will supply a return signal, and the motor control selection circuit will start supplying the standard signal to the motor. do. As a result, the display hand returns to normal operation based on the standard signal. The time it takes to return to normal operation increases as the speed of movement of the display hand using the fast-forward signal increases, but this has the effect of making it easier to grasp the remaining time on the timer. However, by changing the count ratio between the timer circuit and the display counter when the display hand stops, and compressing the scale of the timer remaining time display, it is possible to increase the hand movement speed and shorten the return time. .

In the present invention, the remaining time of the timer is displayed not by the display hand position but by the fast forward movement amount of the display hand by switching and stopping the output signal of the motor drive signal. It is now possible to switch between the time display on the hand display and the remaining time display on the timer at any time in a short time. Also, from the viewpoint of display operation, simply by generating a timer display signal, the display automatically returns to the normal display after displaying the remaining time, so there is an advantage that the display can be operated with one action.

[Brief explanation of drawings]

FIG. 1: External view of an analog electronic timer equipped with a timer using the present invention. FIG. 2: A block diagram showing an embodiment of the present invention. FIG. 3: A specific configuration example of the motor drive control circuit 22 shown in FIG. 2. Figure 4...3rd
Figure timing chart. 1... Oscillation circuit, 2, 3... Frequency dividing circuit, 4, 5
...External operation member, 6...Switch control circuit, 7
...Step motor drive pulse shaping circuit, 8...
Step motor, 9... Gear train, 10... Hours, minutes,
Second hand, 11...Second counter, 12...Minute counter, 13...Hour counter, 14...Timer 0\detection circuit, 15...Buzzer ringing circuit, 16...
Buzzer, 17...Second hand position counter, 18...
Coincidence detection circuit, 19...Internal time counter, 2
0...display time counter, 21...coincidence detection circuit, 22...motor drive control circuit.

Claims (1)

[Claims] 1. A timer circuit that is initialized by a reset signal output based on an external input and counts a set time based on a standard signal, and a timer circuit that is output based on an external input. an internal counter that is initialized by a timer display signal and counts based on the standard signal; a motor control selection circuit that outputs the standard signal or fast-forward signal; and a motor that receives the output of the motor control selection circuit and operates the display hand. , a display position counter and a display movement amount counter that are initialized by the timer display signal and count based on the output of the motor control circuit; and when the count values of the timer circuit and the display position counter match a predetermined value. The motor control selection circuit has a count value correspondence determining means for providing a stop signal, and a count value coincidence determining means for supplying a return signal when the count values of the display movement amount counter and the internal counter match. takes the arrival of the timer display signal as a trigger to output the fast-forward signal to the display position counter, display time counter, and the motor, takes the arrival of the stop signal as a trigger to output the output, and outputs the output signal to the return signal. An electronic clock with a timer, characterized in that the standard signal is output when the arrival of the clock occurs.