JPH0352686U - - Google Patents

Info

Publication number
JPH0352686U
JPH0352686U JP11438789U JP11438789U JPH0352686U JP H0352686 U JPH0352686 U JP H0352686U JP 11438789 U JP11438789 U JP 11438789U JP 11438789 U JP11438789 U JP 11438789U JP H0352686 U JPH0352686 U JP H0352686U
Authority
JP
Japan
Prior art keywords
relay
turned
driver
analog switch
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11438789U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11438789U priority Critical patent/JPH0352686U/ja
Publication of JPH0352686U publication Critical patent/JPH0352686U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案によるバーインテストシステ
ムの構成図、第2図は従来のバーインテストシス
テムの構成図である。 1……ドライバ、2……アナログスイツチ、3
……ドライバ、4……リレー、5…リレー、6…
…終端抵抗、7……バーインボード、7A〜7C
……デバイス、11……高電圧信号、12……テ
スト信号、13……アナログスイツチ制御信号、
14……リレー4の制御信号、15……リレー5
の制御信号。
FIG. 1 is a block diagram of a burn-in test system according to this invention, and FIG. 2 is a block diagram of a conventional burn-in test system. 1... Driver, 2... Analog switch, 3
...Driver, 4...Relay, 5...Relay, 6...
...Terminal resistor, 7... Bar-in board, 7A to 7C
... Device, 11 ... High voltage signal, 12 ... Test signal, 13 ... Analog switch control signal,
14...Control signal for relay 4, 15...Relay 5
control signal.

Claims (1)

【実用新案登録請求の範囲】 高電圧信号11が加えられる第1のドライバ1
と、 アナログスイツチ制御信号13でオンオフし、
第1のドライバ1の出力を複数の測定デバイスに
供給するアナログスイツチ2と、 テスト信号12が加えられる第2のドライバ3
と、 リレー制御信号14で接点をオンオフし、第2
のドライバ3の出力を前記測定デバイスに供給す
る第1のリレー4と、 リレー制御信号15で接点をオンオフし、終端
抵抗6を接地に対して接断する第2のリレー5と
を備え、 高電圧信号11を前記測定デバイスに供給する
ときは、アナログスイツチ2をオンに、第1のリ
レー4をオフに、第2のリレー5をオフにし、 テスト信号12を前記測定デバイスに供給する
ときは、アナログスイツチ2をオフに、第1のリ
レー4をオンに、第2のリレー5をオンにするこ
とを特徴とするバーインテストシステム。
[Claims for Utility Model Registration] First driver 1 to which high voltage signal 11 is applied
and turn it on and off with the analog switch control signal 13,
an analog switch 2 that supplies the output of the first driver 1 to a plurality of measurement devices; and a second driver 3 to which a test signal 12 is applied.
Then, the relay control signal 14 turns the contact on and off, and the second
A first relay 4 that supplies the output of the driver 3 to the measurement device, and a second relay 5 that turns on and off the contacts using a relay control signal 15 and connects and disconnects the terminating resistor 6 to the ground. When supplying the voltage signal 11 to the measuring device, the analog switch 2 is turned on, the first relay 4 is turned off, and the second relay 5 is turned off, and when the test signal 12 is supplied to the measuring device: , a burn-in test system characterized in that an analog switch 2 is turned off, a first relay 4 is turned on, and a second relay 5 is turned on.
JP11438789U 1989-09-29 1989-09-29 Pending JPH0352686U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11438789U JPH0352686U (en) 1989-09-29 1989-09-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11438789U JPH0352686U (en) 1989-09-29 1989-09-29

Publications (1)

Publication Number Publication Date
JPH0352686U true JPH0352686U (en) 1991-05-22

Family

ID=31662758

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11438789U Pending JPH0352686U (en) 1989-09-29 1989-09-29

Country Status (1)

Country Link
JP (1) JPH0352686U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007018020A1 (en) * 2005-08-09 2007-02-15 Advantest Corporation Semiconductor testing apparatus
JPWO2010001440A1 (en) * 2008-07-03 2011-12-15 株式会社アドバンテスト Test equipment and socket board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007018020A1 (en) * 2005-08-09 2007-02-15 Advantest Corporation Semiconductor testing apparatus
JP5038137B2 (en) * 2005-08-09 2012-10-03 株式会社アドバンテスト Semiconductor test equipment
JPWO2010001440A1 (en) * 2008-07-03 2011-12-15 株式会社アドバンテスト Test equipment and socket board

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