JPH035090B2 - - Google Patents

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a differential amplifier.

(Prior Art) FIGS. 3 and 4 are circuit diagrams showing typical examples of conventional differential amplifiers. First, in the conventional differential amplifier shown in FIG. 3, a transistor Q1 whose base is connected to input terminal 1 and a transistor Q2 whose base is connected to input terminal 2 have their commonly connected emitters and power supply. A current source IS1 is connected between them, a diode D is connected between the collector of the transistor Q1 and the ground, and an output terminal 3 is connected to the collector of the transistor Q2. Along with being there,
The collector of transistor Q3 is connected.
The emitter of the transistor Q3 is grounded, and the base of the transistor Q3 is connected to the collector of the transistor Q1. In the differential amplifier shown in FIG. 3 configured as described above, transistors Q1 and Q
2 and current source IS1 constitute a well-known differential amplifier circuit, and diode D and transistor Q3
constitutes a well-known current mirror circuit.

In the differential amplifier shown in FIG.
When an input signal Vi is supplied between 2 and 2, a current I1 flows through the transistor Q1 forming the differential amplifier circuit in accordance with the input signal Vi, and the transistor Q1 forming the differential amplifier circuit flows through the transistor Q1 forming the differential amplifier circuit. A current I2 flows through Q2 in response to the input signal Vi.

FIG. 5 shows the input signal Vi applied to the transistors Q1 and Q2 constituting the differential amplifier circuit described above.
It shows the currents I1 and I2 that flow according to the current. That is, when the input signal Vi supplied to the differential amplifier circuit consisting of transistors Q1 and Q2 in the differential amplifier shown in FIG.
1/2 currents I1 and I2 flow, and the magnitudes of the above-mentioned currents I1 and I2 depend on changes in the input signal Vi supplied to the input terminals 1 and 2 of the differential amplifier.
As shown in FIG. 5, it changes differentially in the range of 0 to Io.

In the current mirror circuit to which the current I1 appearing on one output side of the differential amplifier circuit described above is given as an input signal, the current I1 flows through the transistor Q3 on the output side of the current mirror circuit. Therefore, the current Il flowing through the output terminal 3 is Il=I1−
As shown in Figure 6, the current Il changes depending on the change in the input signal Vi supplied to the input terminals 1 and 2 of the differential amplifier. It changes from -Io to +Io depending on the change in the input signal, centering on the state of = 0.The circuit layout in Figure 3 is a differential amplifier that can obtain an output signal with a current output depending on the input signal. It is composed of

Next, in the conventional differential amplifier shown in FIG. 4, the commonly connected emitters of the transistor Q1 whose base is connected to the input terminal 1 and the transistor Q2 whose base is connected to the input terminal 2 and the power supply A current source IS1 is connected between the transistor Q1 and the ground, a diode D is connected between the collector of the transistor Q1 and the ground, and a diode D1 is connected between the collector of the transistor Q2 and the ground. Furthermore, a transistor Q is connected to the collector of the transistor Q1 described above.
The base of transistor Q3 is connected to the base of transistor Q2, and the base of transistor Q5 is connected to the collector of transistor Q2.

The emitters of the transistors Q3 and Q5 are grounded, and the collector of the transistor Q5 is connected to the power supply via the diode D2 and to the base of the transistor Q6. The emitter of the transistor Q6 described above is connected to the power supply, and the output terminal 3 is connected to the collector of the transistor Q6 and the collector of the transistor Q3.

In the differential amplifier shown in FIG. 4 configured as described above, transistors Q1 and Q2 and a current source
IS1 constitutes a well-known differential amplifier circuit, and diode D and transistor Q3, diode D1 and transistor Q5, and diode D2 and transistor Q6 constitute well-known current mirror circuits, respectively.

In the differential amplifier shown in FIG.
When an input signal Vi is supplied between 2 and 2, a current I1 flows through the transistor Q1 that constitutes the differential amplifier circuit in accordance with the input signal Vi, and the transistor Q1 that constitutes the differential amplifier circuit flows. A current I2 flows through Q2 in response to the input signal Vi.

A current I1, which is the same as the current I1 flowing through the collector of the transistor Q1, is applied to the emitter of the transistor Q3 by the operation of the current mirror circuit constituted by the diode D and the transistor Q3. flows, and at the emitter of the transistor Q6,
For the operation of two continuously connected current mirror circuits, one consisting of a diode D1 and a transistor Q5, and the other a current mirror circuit consisting of a diode D2 and a transistor Q6. Therefore, the same current I2 as the current I2 flowing through the collector of the transistor Q2 described above flows.

Therefore, the current Il flowing through the output terminal 3 is Il
= I1 - I2, but the current Il changes depending on the change in the input signal Vi supplied to the input terminals 1 and 2 of the differential amplifier, as shown in Figure 6, when the input signal is zero. The state changes from -Io to +Io depending on the change in the input signal, centering on the state of Il = 0 in the state, and the circuit layout in Figure 4 shows the difference in the output signal obtained by the current output depending on the input signal. It constitutes a dynamic amplifier.

(Problems to be Solved by the Invention) By the way, the lower limit of the DC potential Vl of the output signal in the differential amplifier explained with reference to FIG. 3 is limited by the transistor Q3, and also,
Its upper limit is controlled by transistor Q2, but under the condition that the collector-base junctions of transistor Q2 and transistor Q3 are not forward biased, the base voltage of transistor Q2 is set to Vb. When you do,
The DC potential Vl of the output signal mentioned above is limited to the range shown by the relationship (base-emitter voltage V _BE of transistor Q3) < Vl < (base voltage of transistor Q2), so the DC potential Vl of the output signal is The problem is that the usage rate is low. On the other hand, the DC potential Vl of the output signal in the differential amplifier having the configuration shown in FIG. 4 is (base-emitter voltage V _BE of transistor Q3) <
It is limited to the range shown by the relationship Vl < {(power supply voltage Vcc) - (base voltage of transistor Q6)},
In this case, the power supply utilization rate with respect to the power supply voltage Vcc is improved compared to the power supply utilization rate with respect to the power supply voltage Vcc in the differential amplifier having the configuration shown in FIG.

However, in the conventional differential amplifier having the configuration shown in FIG.
is the current I1 flowing to the emitter of the transistor Q3 due to the operation of the current mirror circuit constituted by the diode D and the transistor Q3.
and a current mirror circuit constituted by diode D1 and transistor Q5, and a current mirror circuit constituted by diode D2 and transistor Q6, to the emitter of transistor Q6. Naturally, the current I1 flows through one current mirror circuit to the emitter of transistor Q3, and the current I1 flows to the emitter of transistor Q6 through two current mirror circuits. Since there is a phase shift between the flowing current I2 and the fact that, especially in monolithic integrated circuits, a PNP transistor is used as the transistor Q6, which has a poor gain-bandwidth product compared to an NPN transistor, this causes a phase shift. The differential amplifier having the configuration shown in FIG.
The problem is that the high frequency characteristics are greatly deteriorated compared to the differential amplifier having the configuration shown in FIG.

(Means for Solving the Problems) The present invention provides an output side of a current mirror circuit whose input side is connected to one output side of a differential amplifier circuit to which an input signal is supplied, and a differential amplifier circuit as described above. A current source is connected to the connection point with the other output side of the circuit, and the connection point between the output side of the current mirror circuit described above and the other output side of the differential amplifier circuit is connected to the input side of the current mirror circuit described above. A feedback path is formed by a transistor whose base and emitter are connected between the transistors, and an output signal is obtained from the collector side of the transistor.

(Example) Hereinafter, specific contents of the differential amplifier of the present invention will be explained in detail with reference to the accompanying drawings.
1 and 2 are circuit diagrams of different embodiments of the differential amplifier of the present invention, and in the differential amplifier shown in FIGS. The same drawing numerals as those used in FIGS. 3 and 4 are used for components corresponding to those in the differential amplifier shown in FIGS. There is.

In FIGS. 1 and 2, a transistor Q1 whose base is connected to input terminal 1 and a transistor Q2 whose base is connected to input terminal 2
A current source IS1 is connected between the commonly connected emitters of the transistors Q1 and the power supply, a diode D is connected between the collector of the transistor Q1 and the ground, and a diode D is connected between the collector of the transistor Q1 and the ground. The base of the transistor Q4 is connected to the collector, and the collector of the transistor Q3 is also connected to the collector.

The emitter of the transistor Q3 described above is grounded, and the collector of the transistor Q1 described above is connected to the base of the transistor Q3. Connection point A between the collectors of the transistors Q2 and Q3 and the base of the transistor Q4
A current source IS2 is connected between the transistor Q4 and the power supply Vcc, and the emitter of the transistor Q4 is connected to the base of the transistor Q3 and the collector of the transistor Q1. The output terminal 3 is connected to the collector of the transistor Q4, and the current source IS3 is connected between the collector of the transistor Q4 and the power supply in the circuit arrangement shown in the first diagram, and the current source IS3 is connected between the collector of the transistor Q4 and the power supply in the circuit arrangement shown in the second diagram. In the circuit arrangement, a load resistor R is connected.

The aforementioned transistor Q4, whose base and emitter are connected between the two outputs of the differential amplifier circuit formed by the transistors Q1 and Q2, forms a feedback path between the two outputs of the differential amplifier circuit formed by the transistors Q1 and Q2. are doing.

Now, A in Fig. 1 and Fig. 2 mentioned above.
The voltage at the point A is determined by the balance between the current I2 of the transistor Q2, the current I4 of the transistor Q3, and the current I3 of the current source IS2.
It is automatically determined as follows by the feedback action of 4.

That is, when the input signal Vi is supplied between the input terminals 1 and 2 of the differential amplifier, a current of I1 flows to the collector of the transistor Q1 of the differential amplifier circuit composed of the transistors Q1 and Q2, and a current of I1 flows to the collector of the transistor Q2. Suppose that a current I2 flows through the current source IS2, a current I3 flows from the current source IS2, and a current I4 flows through the output side of the current mirror circuit. If the relationship is I4<(I2+I3),
In this case, the voltage at point A tries to rise, but
Since the voltage at the emitter of transistor Q4 is fixed by diode D, the voltage at the emitter of transistor Q4 is fixed at a voltage higher than the fixed emitter voltage of transistor Q4 by the voltage between the base and emitter. A current of {(I2+I3)-I4} flows to the base. The increase in the base current of transistor Q4 increases the emitter current I5 of transistor Q4, which is supplied to the input side of the current mirror circuit. As a result, the current I4 on the input side of the current mirror circuit increases, but due to the characteristics of the current mirror circuit, the current on the output side is made equal to the current on the input side.
The voltage at the point A is determined by the feedback effect of the transistor Q4, so that the relationship between the currents is I4=I2+I3.
The voltage value is automatically set so that

In the above case, the relationship in magnitude between each current is I4>(I2+I3), contrary to I4<(I2+I3).
In this case, the voltage at point A tends to decrease, contrary to the above case, but since the emitter potential of transistor Q4 is fixed by diode D, the fixed emitter voltage of transistor Q4 , the transistor Q is fixed at a voltage higher than the base-emitter voltage.
A current of {I4-(I2+I3)} flows to the base of 4. Due to the decrease in the base current of transistor Q4, the emitter current I of transistor Q4 increases.
5 is reduced and fed to the input side of the current mirror circuit. As a result, the current I4 on the input side of the current mirror circuit decreases, but due to the characteristics of the current mirror circuit, the current on the output side is made equal to the current on the input side. The voltage at point A is automatically set to a voltage value such that the relationship between the currents is I4 = I2 + I3 due to the feedback effect of the transistor Q4.

When the current I4 = I2 + I3 as described above flows through the current mirror circuit, the current I5 flowing through the transistor Q4 becomes I5 = I4 - I1 = I2 - I1 + I3, so
In the embodiment circuit shown in FIG. 1, the current Il flowing to the output terminal 3 is Il = I3 - I5 = I1 - I2, where the current of the current source IS3 is I3, that is, the circuit arrangement shown in FIG. This constitutes a differential amplifier having input signal versus output signal characteristics as shown in FIG. 6, which is similar to that described for the conventional differential amplifier described above.

The upper limit of the DC potential of the output signal in the differential amplifier shown in Figure 1 is limited by the current source IS3, and the lower limit is limited by the base-emitter voltage of the transistor Q4. Since the source IS3 is composed of a current mirror circuit using NPN transistors, the upper limit of the DC potential of the output signal from the differential amplifier shown in Figure 1 is as follows.
(power supply voltage Vcc) - (transistor base-emitter voltage), and the lower limit of the DC potential of the output signal from the differential amplifier shown in Figure 1 is twice the voltage at point A, that is, the transistor The voltage is twice the base-emitter voltage of .

Therefore, the DC potential Vl of the output signal from the differential amplifier shown in the first diagram is 2VBE<Vl<{(power supply voltage
Vcc) - (voltage between the base and emitter of the transistor)} Therefore, the utilization rate of the power supply Vcc in the differential amplifier shown in Figure 1 is the utilization rate of the power supply Vcc in the conventional differential amplifier shown in Figure 3, which was already mentioned. It can be seen that it is improved compared to .

Furthermore, since feedback is applied to the current mirror circuit in the differential amplifier of the present invention, its phase shift is large compared to the conventional differential amplifier explained with reference to FIGS. 3 and 4. (The same applies to the embodiment shown in the second figure, which will be described later).

Next, in the embodiment circuit shown in the second figure, instead of the current source IS3 in the embodiment circuit shown in the first figure,
Although the load resistor R is connected, the transistor Q4
The current I5 flowing through is I5 = I2 - I1 + I3 as in the case of the first embodiment shown above, and when this current I5 flows through the load resistor R, the output voltage Vo appearing at the output terminal 3 is ( I2−I1)R+I3・
It becomes R. Here, since I3・R is the output DC potential, let I3・R=Vl, and (I2−I1)=−Il
Then, the DC voltage Vo appearing at the output terminal 3 becomes Vo=-Il.R+Vl, and the output signal can be taken out as a voltage output.

(Effects) As is clear from the detailed explanation below, the differential amplifier of the present invention is a current mirror circuit whose input side is connected to one output side of a differential amplifier circuit to which an input signal is supplied. A current source is connected to the connection point between the output side of the circuit and the other output side of the differential amplifier circuit described above, and the output side of the current mirror circuit described above is connected to the other output side of the differential amplifier circuit. A feedback path is formed by a transistor whose base and emitter are connected between the point and the input side of the current mirror circuit, and an output signal is obtained from the collector side of the transistor. Since it is an amplifier, it is possible to easily provide a differential amplifier that has a high power utilization rate of output potential, has little phase shift, and has good high frequency characteristics. Various drawbacks in dynamic amplifiers can be solved.

[Brief explanation of the drawing]

Figures 1 and 2 are circuit diagrams of different embodiments of the differential amplifier of the present invention, Figures 3 and 4 are circuit diagrams of conventional differential amplifiers, and Figures 5 and 6 are characteristic curves. This is an example diagram. Q1-Q6...transistor, D, D1, D2
...Diode, IS1 to IS3...Current source, 1,2
...Input terminal, 3...Output terminal.

Claims (1)

[Claims] 1. The output side of a current mirror circuit whose input side is connected to one output side of the differential amplifier circuit to which the input signal is supplied, and the other output side of the differential amplifier circuit described above. Connect a current source to the connection point of
Further, a feedback path is formed by a transistor whose base and emitter are connected between the connection point between the output side of the current mirror circuit and the other output side of the differential amplifier circuit and the input side of the current mirror circuit. and further obtains an output signal from the collector side of the transistor. 2. The differential amplifier according to claim 1, wherein a current source is connected to the collector of the transistor forming the feedback path, and the output signal is obtained as a current output. 3. The differential amplifier according to claim 1, wherein a load resistor is connected to the collector of the transistor forming the feedback path, and the output signal is obtained as a voltage output.