JPH0348971U - - Google Patents
Info
- Publication number
- JPH0348971U JPH0348971U JP11015889U JP11015889U JPH0348971U JP H0348971 U JPH0348971 U JP H0348971U JP 11015889 U JP11015889 U JP 11015889U JP 11015889 U JP11015889 U JP 11015889U JP H0348971 U JPH0348971 U JP H0348971U
- Authority
- JP
- Japan
- Prior art keywords
- image signal
- gain control
- signal
- still image
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004044 response Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Studio Circuits (AREA)
Description
第１図は、本考案の一実施例を示す回路図、及
び第２図は従来のテレビジヨンカメラ装置を示す
回路図である。
１１……メモリ、１４……第１ＧＣＡ、１５…
…第２ＧＣＡ、１７……利得制御回路、１８……
加算器、２０……スイツチ回路。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional television camera device. 11...Memory, 14...1st GCA, 15...
...Second GCA, 17...Gain control circuit, 18...
Adder, 20... switch circuit.
Claims (1)
メモリと、 該メモリからの静止画像信号が印加される第１
ゲインコントロールアンプと、 通常撮影状態での通常画像信号が印加される入
力端子と、 該入力端子からの通常画像信号が印加される第
２ゲインコントロールアンプと、 前記第２ゲインコントロールアンプにαの利得
制御信号を、前記第１ゲインコントロールアンプ
に１−αの利得制御信号を印加する利得制御回路
と、 前記第１及び第２ゲインコントロールアンプの
出力信号を加算する加算器と、 前記入力端子からの通常画像信号及び前記加算
器の出力信号を前記静止画像信号の存在に応じて
選択的に出力するスイツチ回路と、 から成り、前記スイツチ回路の出力信号に基づい
で通常画像信号と静止画像信号との混合された画
像信号を得るようにしたことを特徴とするテレビ
ジヨンカメラ装置。 (2) 前記入力端子と前記スイツチ回路の一方の
入力端子との間に利得が一定の増幅器を備えたこ
とを特徴とする請求項第１項記載のテレビジヨン
カメラ装置。[Claims for Utility Model Registration] (1) A memory that stores a still image signal in response to a control signal, and a first memory to which the still image signal from the memory is applied.
a gain control amplifier; an input terminal to which a normal image signal in a normal shooting state is applied; a second gain control amplifier to which a normal image signal from the input terminal is applied; and a gain of α to the second gain control amplifier. a gain control circuit that applies a gain control signal of 1-α to the first gain control amplifier; an adder that adds the output signals of the first and second gain control amplifiers; a switch circuit that selectively outputs the normal image signal and the output signal of the adder depending on the presence of the still image signal, and a switch circuit that selectively outputs the normal image signal and the output signal of the adder according to the presence of the still image signal, and outputs the normal image signal and the still image signal based on the output signal of the switch circuit. A television camera device characterized in that it obtains mixed image signals. (2) The television camera apparatus according to claim 1, further comprising an amplifier having a constant gain between the input terminal and one input terminal of the switch circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11015889U JPH0348971U (en) | 1989-09-20 | 1989-09-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11015889U JPH0348971U (en) | 1989-09-20 | 1989-09-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0348971U true JPH0348971U (en) | 1991-05-13 |
Family
ID=31658710
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11015889U Pending JPH0348971U (en) | 1989-09-20 | 1989-09-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0348971U (en) |
-
1989
- 1989-09-20 JP JP11015889U patent/JPH0348971U/ja active Pending
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