JPH0348735B2 - - Google Patents

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Publication number
JPH0348735B2
JPH0348735B2 JP58102322A JP10232283A JPH0348735B2 JP H0348735 B2 JPH0348735 B2 JP H0348735B2 JP 58102322 A JP58102322 A JP 58102322A JP 10232283 A JP10232283 A JP 10232283A JP H0348735 B2 JPH0348735 B2 JP H0348735B2
Authority
JP
Japan
Prior art keywords
phase correction
synchronous machine
amplification
reactance value
stabilizing device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58102322A
Other languages
Japanese (ja)
Other versions
JPS59230429A (en
Inventor
Tetsuyuki Mitani
Hiroshi Sugimoto
Kunio Matsushita
Tatsumi Maeda
Masaru Shimomura
Masanori Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP58102322A priority Critical patent/JPS59230429A/en
Publication of JPS59230429A publication Critical patent/JPS59230429A/en
Publication of JPH0348735B2 publication Critical patent/JPH0348735B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 この発明は、電力系統の安定度向上に寄与する
系統安定化装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a system stabilizing device that contributes to improving the stability of a power system.

従来この種の系統安定化装置として、同期機か
ら自端情報として有効電力を検出する方式(通常
ΔP方式と呼ばれる)、同期機の端子電圧より周波
数を検出する方式(通常ΔF方式と呼ばれる)及
び同期機の速度を検出する方式(通常Δω方式と
呼ばれる)とがあるが、ここでは一例としてΔP
方式を例にして説明する。
Conventionally, this type of system stabilization device has a method of detecting active power from a synchronous machine as self-end information (usually called the ΔP method), a method of detecting the frequency from the terminal voltage of the synchronous machine (usually called the ΔF method), and There is a method to detect the speed of a synchronous machine (usually called the Δω method), but here we will use ΔP as an example.
The method will be explained using an example.

第1図は従来の系統安定化装置の構成図を示
す。第1図において、1は有効電力変換器、2は
系統安定化装置の位相補正要素、3は系統安定化
装置の増幅要素、4は自動電圧調整装置、5は同
期機、6は界磁しや断器、7は変流器(以下CT
と呼ぶ)及び8は変圧器(以下PTと呼ぶ)を示
す。
FIG. 1 shows a configuration diagram of a conventional system stabilizing device. In Fig. 1, 1 is an active power converter, 2 is a phase correction element of the system stabilization device, 3 is an amplification element of the system stabilization device, 4 is an automatic voltage regulator, 5 is a synchronous machine, and 6 is a field magnet. 7 is a current transformer (CT
(hereinafter referred to as PT) and 8 represent a transformer (hereinafter referred to as PT).

次に動作について説明する。CT7及びPT8を
経て有効電力変換器1によつて検出された同期機
の有効電力信号を、位相補正要素2及び増幅要素
3を通して自動電圧調整装置4に供給する。
Next, the operation will be explained. The active power signal of the synchronous machine detected by the active power converter 1 via CT7 and PT8 is supplied to the automatic voltage regulator 4 through the phase correction element 2 and the amplification element 3.

ここで、上記位相補正要素2及び増幅要素3は
通常下記の式(1)のような伝達関数G(S)で表わ
される。
Here, the phase correction element 2 and the amplification element 3 are usually expressed by a transfer function G(S) such as the following equation (1).

G(s)=TRS/1+TRS・1+TLD1S/1+TLG1S ・1/1+TLG2SK …(1) 但し、ここでK…増幅率(ゲイン定数) TR…第1時定数 TLD1…第2時定数 TLG1…第3時定数 TLG2…第4時定数 式(1)の右項の各時定数により第1、第2及び第
3位相補正値が決定され、この全位相補正値及び
増幅率が適当な値であれば有効電力の変動に対し
て自動電圧調整装置4を通して同期機5の励磁量
を変化させることによつて電力系統の安定化を計
ることが可能である。
G(s)=T R S/1+T R S・1+T LD1 S/1+T LG1 S ・1/1+T LG2 SK...(1) However, here K...Amplification factor (gain constant) T R ...First time constant T LD1 ...Second time constant TLG1 ...Third time constant TLG2 ...Fourth time constant The first, second, and third phase correction values are determined by each time constant on the right side of equation (1), and this total phase If the correction value and amplification factor are appropriate values, it is possible to stabilize the power system by changing the amount of excitation of the synchronous machine 5 through the automatic voltage regulator 4 in response to fluctuations in active power. .

従来のこの種の系統安定化装置は、単一の系統
構成条件のもとで、位相補正要素2及び増幅要素
3のそれぞれの位相補正値及び増幅率等の制御定
数を決定している。このため送電線に設けた断路
器、しや断器等の開閉に伴い系統構成条件が変化
した場合には、それらの制御定数が最適なもので
なくなり、充分な系統の安定化が達成できない欠
点があつた。
A conventional system stabilizing device of this type determines control constants such as phase correction values and amplification factors for each of the phase correction element 2 and the amplification element 3 under a single system configuration condition. For this reason, if the system configuration conditions change due to the opening and closing of disconnectors, cable breakers, etc. installed on power transmission lines, their control constants will no longer be optimal, making it impossible to achieve sufficient system stabilization. It was hot.

本発明は、上記のような従来のものの欠点を除
去するためになされたもので、系統構成条件の変
化に応じて常に最適な制御定数を付与することが
可能な機能を発揮する系統安定化装置を提供する
ことを目的とするものである。
The present invention was made in order to eliminate the drawbacks of the conventional ones as described above, and provides a system stabilizing device that exhibits a function that can always provide optimal control constants in response to changes in system configuration conditions. The purpose is to provide the following.

以下、この発明の一実施例を図について説明す
る。第2図に一般的な電力系統の系統構成図を示
す。第2図に於いて、5は同期機、11〜14は
送電線、15〜18は母線、19a〜19dは送
電線11〜14のしや断器にして、各送電線の両
端部に設けられているが図示例は1つにまとめて
画いている。
An embodiment of the present invention will be described below with reference to the drawings. Figure 2 shows a system configuration diagram of a general power system. In Fig. 2, 5 is a synchronous machine, 11 to 14 are transmission lines, 15 to 18 are bus bars, and 19a to 19d are disconnectors for the transmission lines 11 to 14, which are installed at both ends of each transmission line. However, in the illustrated example, they are all shown together.

第3図は本発明の一実施例による系統安定化装
置の構成図示す。第3図において、2〜2′は有
効電力変換器1の出力側に並列に接続された複数
の位相補正要素、3〜3′は各位相補正要素2〜
2′の出力側に接続した複数の増幅要素、21〜
29は各増幅要素3〜3′の出力側に設けた接点
で、いずれも系統構成条件の変化に応じた系統リ
アクタンス値によつて選択閉成される。
FIG. 3 shows a configuration diagram of a system stabilizing device according to an embodiment of the present invention. In FIG. 3, 2 to 2' are a plurality of phase correction elements connected in parallel to the output side of the active power converter 1, and 3 to 3' are each phase correction element 2 to 3'.
A plurality of amplification elements connected to the output side of 2', 21-
Reference numeral 29 denotes a contact provided on the output side of each amplifying element 3 to 3', which is selectively closed according to a system reactance value corresponding to a change in system configuration conditions.

第4図は、送電線11〜14に設けた断路器又
はしや断器の開閉情報により変化する系統構成条
件により系統リアクタンス値を計算する系統リア
クタンス演算器の概念ブロツク図を示すもので、
同図において、30は上記送電線11〜14の
各々のリアクタンス値を定めた定数回路、31は
定数回路30に定めたリアクタンス値と系統構成
情報とにより系統リアクタンス値を計算する演算
器、32は演算器31により計算された系統リア
クタンス値に基づいて上記接点21〜19を選択
的に閉成する出力回路である。
FIG. 4 shows a conceptual block diagram of a system reactance calculator that calculates a system reactance value based on system configuration conditions that change based on opening/closing information of disconnectors or breakers installed on power transmission lines 11 to 14.
In the figure, 30 is a constant circuit that determines the reactance value of each of the power transmission lines 11 to 14, 31 is an arithmetic unit that calculates a system reactance value based on the reactance value determined in the constant circuit 30 and system configuration information, and 32 is a This is an output circuit that selectively closes the contacts 21 to 19 based on the system reactance value calculated by the calculator 31.

第5図は出力回路32よりの上記系統リアクタ
ンス値Xeによつて動作する接点21〜29のそ
れぞれの動作を決定する接点作動処理のフロー図
であり、第5図に於いてステツプ331,33
2,333は比較部を示す。
FIG. 5 is a flowchart of a contact operation process that determines the operation of each of the contacts 21 to 29 operated by the system reactance value Xe from the output circuit 32.
2,333 indicates a comparison section.

第6図は、第4図の系統リアクタンス演算部の
ブロツク図及び第5図の接点作動処理のフロー図
を考慮して具体的にハードウエアで表わした系統
リアクタンスに基づく最適な設定定数の選択切換
回路の構成図である。第6図において、40は調
整抵抗、41〜44は送電線11〜14の作動状
態情報を入れる接点、51〜54は送電線を模擬
した抵抗、60は増幅器であり、これらにより第
4図における演算器31を構成している。61〜
69はあらかじめ設定したリアクタンス値Xrと
演算器31により計算されたリアクタンスXeと
を比較して、このリアクタンス値Xeに応じて最
適の位相補正要素及び増幅要素を判定する判定回
路としての比較器、71〜79は第3図に示すそ
れぞれ接点21〜29を動作させるリレーであ
り、これ等により、第4図における出力回路32
を構成している。
Figure 6 shows the selection and switching of optimal setting constants based on the system reactance specifically expressed in hardware in consideration of the block diagram of the system reactance calculation section in Figure 4 and the flow diagram of the contact operation process in Figure 5. It is a block diagram of a circuit. In FIG. 6, 40 is an adjustment resistor, 41 to 44 are contacts for inputting operating status information of the power transmission lines 11 to 14, 51 to 54 are resistors simulating power transmission lines, and 60 is an amplifier. A computing unit 31 is configured. 61~
A comparator 71 69 serves as a determination circuit that compares a reactance value Xr set in advance with a reactance Xe calculated by the arithmetic unit 31 and determines the optimal phase correction element and amplification element according to this reactance value Xe. 79 are relays that operate the contacts 21 to 29 shown in FIG. 3, respectively, and these actuate the output circuit 32 in FIG.
It consists of

次に動作について説明する。説明にあたつて、
第3図及び第4図で示した系統安定化装置を第2
図に示した系統構成の電力系統に適用した場合を
例として説明する。第2図の系統構成条件の場合
例えば送電線12がしや断されたものと仮定する
と、同期機5から母線18までの系統リアクタン
ス値が変化するが、これらの系統情報、例えばし
や断器あるいは断路器からの系統構成情報と、定
数回路30に設定された各送電線11〜14のリ
アクタンス値とから、第4図に示す演算器31系
統リアクタンス値Xeを簡単に計算できる。
Next, the operation will be explained. In explaining,
The system stabilization device shown in Figures 3 and 4 is
A case where the present invention is applied to a power system having the system configuration shown in the figure will be explained as an example. In the case of the system configuration conditions shown in Fig. 2, for example, assuming that the transmission line 12 is suddenly cut off, the system reactance value from the synchronous machine 5 to the bus bar 18 changes, but this system information, for example, the sudden break Alternatively, the reactance value Xe of the computing unit 31 system shown in FIG. 4 can be easily calculated from the system configuration information from the disconnector and the reactance value of each power transmission line 11 to 14 set in the constant circuit 30.

この計算された系統リアクタンス値Xeを第5
図に示すフロー図のステツプ331〜339で、
第6図に示した比較器61〜69の比較判断を行
なうことによつて系統構成条件を識別できること
になる。従つて第3図に示した系統安定化装置と
しては、その各々に対して最適の位相補正値及び
増幅率に設定された位相補正要素2及び増幅要素
3を、予め系統構成条件の変化し得る種類に応じ
て複数、即ちこの実施例では9段階だけ準備して
おけば、系統構成条件の変化に応じて、常に最適
な設定定数の位相補正要素及び増幅要素を選択で
きることになる。
This calculated system reactance value Xe is
In steps 331 to 339 of the flowchart shown in the figure,
System configuration conditions can be identified by comparing and determining the comparators 61 to 69 shown in FIG. Therefore, in the system stabilizing device shown in FIG. 3, the phase correction element 2 and the amplification element 3, each of which is set to the optimal phase correction value and amplification factor, can be adjusted in advance by changing the system configuration conditions. By preparing a plurality of stages, that is, nine stages in this embodiment, depending on the type, it is possible to always select the phase correction element and amplification element with the optimum set constants in response to changes in system configuration conditions.

次に、第4図及び第5図に示した系統リアクタ
ンス演算器を、より具体的構成として開示した第
6図の系統リアクタンス演算処理装置に基づい
て、本実施例の動作を説明する。すなわち、第6
図に於いて、送電線11〜14に設けたしや断器
あるいは断路器の開閉情報を接点41〜44に取
り入れると、増幅器60の出力信号に系統リアク
タンス値Xeが出力される。この系統リアクタン
ス値Xeを比較器61〜69によつてそれぞれの
基準値と比べ、最も近い系統リアクタンス値のと
ころで、接点21〜29のいずれかを動作させ
る。これにより、その系統構成条件に応じて常に
最適な制御定数を有する位置補正要素及び増幅要
素を選択できる系統安定化装置を得ることができ
る。なお上記実施例では、系統安定化装置のハー
ドウエアを接点等を掲げて説明したがこれらは全
てデジタル装置でもよく、またアナログ回路とリ
レー回路との組合せもしくはデジタル回路とアナ
ログ回路との併用でも上記実施例と同様の効果を
奏する。
Next, the operation of this embodiment will be described based on the system reactance calculation processing device shown in FIG. 6, which discloses the system reactance calculation unit shown in FIGS. 4 and 5 as a more specific configuration. That is, the sixth
In the figure, when the opening/closing information of the disconnectors or disconnectors provided on the power transmission lines 11 to 14 is input to the contacts 41 to 44, the system reactance value Xe is outputted as the output signal of the amplifier 60. This system reactance value Xe is compared with each reference value by comparators 61 to 69, and one of the contacts 21 to 29 is operated at the closest system reactance value. Thereby, it is possible to obtain a system stabilizing device that can always select position correction elements and amplification elements having optimal control constants according to the system configuration conditions. In the above embodiment, the hardware of the system stabilization device was explained by referring to contacts, etc., but all of these may be digital devices, or a combination of an analog circuit and a relay circuit, or a combination of a digital circuit and an analog circuit may also be used. The same effects as in the embodiment are achieved.

以上のように本発明によれば、同期機が連系さ
れる系統の系統構成条件のそれぞれに対応して設
けた相異なる制御定数を有する複数の位相補正要
素及び増幅要素と、上記系統に設けられたしや断
器又は断路器の開閉情報に基づき上記同期機の端
末から見た系統リアクタンス値を求める演算器
と、この演算器からのリアクタンス値に応じて最
適な制御定数を有する位相補正要素及び増幅要素
を選択する判定回路とを具備したので、常にその
時点、時点に応じた系統構成条件に対して電力系
統をより高度に安定化でき、しかも追従性の優れ
た制御性をもつた系統安定化装置が実現できる効
果がある。
As described above, according to the present invention, a plurality of phase correction elements and amplification elements having different control constants are provided corresponding to each of the system configuration conditions of a system to which a synchronous machine is interconnected, and a plurality of phase correction elements and amplification elements are provided in the system. an arithmetic unit that calculates the system reactance value as seen from the terminal of the synchronous machine based on the opening/closing information of the disconnector or disconnector, and a phase correction element having an optimal control constant according to the reactance value from this arithmetic unit. and a judgment circuit for selecting an amplification element, the power system can always be highly stabilized against the system configuration conditions depending on the time, and the system can be controlled with excellent followability. There are effects that the stabilizing device can achieve.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の系統安定化装置の構成図、第2
図は本発明の一実施例の系統安定化装置を適用す
る電力系統例の系統構成説明図、第3図は本発明
の一実施例による系統安定化装置の構成図、第4
図は同実施例の一部である系統リアクタンス演算
器の概念ブロツク図、第5図は第4図に示す演算
器の動作説明のフロー図、第6図は第4、第5図
に示す概念系統リアクタンス演算器を更に具体化
した系統リアクタンス演算処理装置の構成図を示
す。 1……有効電力変換器、2〜2′……位相補正
要素、3〜3′……増幅要素、4……自動電圧調
整装置、5……同期機、6……界磁しや断器、7
……CT、8……PT、11〜14……送電線、1
5〜18……母線、21〜29……接点、30…
…リアクタンス値定数回路、31……演算器、3
2……出力回路、331〜339……ステツプ、
40……調整抵抗、41〜44′……接点、51
〜54……抵抗、60……増幅器、61〜69…
…比較器、71〜79……リレー。 なお、図中、同一符号は同一又は相当部分を示
す。
Figure 1 is a configuration diagram of a conventional grid stabilizing device, Figure 2
The figure is an explanatory diagram of the system configuration of an example of a power system to which a system stabilizing device according to an embodiment of the present invention is applied, FIG.
The figure is a conceptual block diagram of the system reactance calculator which is a part of the same embodiment, Figure 5 is a flow diagram explaining the operation of the operator shown in Figure 4, and Figure 6 is the concept shown in Figures 4 and 5. A configuration diagram of a system reactance calculation processing device that further embodies the system reactance calculation unit is shown. 1...Active power converter, 2-2'...Phase correction element, 3-3'...Amplification element, 4...Automatic voltage regulator, 5...Synchronous machine, 6...Field magnet and disconnector ,7
...CT, 8...PT, 11-14...Power line, 1
5-18...Bus bar, 21-29...Contact, 30...
... Reactance value constant circuit, 31 ... Arithmetic unit, 3
2... Output circuit, 331-339... Step,
40...Adjustment resistor, 41-44'...Contact, 51
~54...Resistor, 60...Amplifier, 61-69...
...Comparator, 71-79...Relay. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 1 同期機からの有効電力、周波数又は回転速度
等の状態出力信号を入力する位相補正要素と、こ
の位相補正要素の出力信号を増幅要素を介して入
力し上記同期機の励磁量を制御する自動電圧調整
装置とを有する系統安定化装置において、上記同
期機が連系される系統の系統構成条件のそれぞれ
に対応して設けた相異なる制御定数を有する複数
の位相補正要素及び増幅要素と、上記系統に設け
られたしや断器又は断路器の開閉情報に基づき上
記同期機の端末から見た系統リアクタンス値を求
める演算器と、この演算器からのリアクタンス値
に応じて最適な制御定数を有する位相補正要素及
び増幅要素を選択する判定回路とを具備したこと
を特徴とする系統安定化装置。
1. A phase correction element that inputs status output signals such as active power, frequency, or rotational speed from the synchronous machine, and an automatic element that inputs the output signal of this phase correction element via an amplification element to control the amount of excitation of the synchronous machine. A system stabilizing device having a voltage regulator, a plurality of phase correction elements and amplification elements having different control constants provided corresponding to respective system configuration conditions of a system to which the synchronous machine is interconnected; It has a computing unit that calculates the system reactance value as seen from the terminal of the synchronous machine based on the opening/closing information of the disconnector or disconnector installed in the grid, and has an optimal control constant according to the reactance value from this computing unit. A system stabilizing device comprising a phase correction element and a determination circuit for selecting an amplification element.
JP58102322A 1983-06-08 1983-06-08 System stabilizer Granted JPS59230429A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58102322A JPS59230429A (en) 1983-06-08 1983-06-08 System stabilizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58102322A JPS59230429A (en) 1983-06-08 1983-06-08 System stabilizer

Publications (2)

Publication Number Publication Date
JPS59230429A JPS59230429A (en) 1984-12-25
JPH0348735B2 true JPH0348735B2 (en) 1991-07-25

Family

ID=14324320

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58102322A Granted JPS59230429A (en) 1983-06-08 1983-06-08 System stabilizer

Country Status (1)

Country Link
JP (1) JPS59230429A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2633842B2 (en) * 1986-11-21 1997-07-23 株式会社日立製作所 Power system stabilizer

Also Published As

Publication number Publication date
JPS59230429A (en) 1984-12-25

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