JPH0348622Y2 - - Google Patents
Info
- Publication number
- JPH0348622Y2 JPH0348622Y2 JP1031086U JP1031086U JPH0348622Y2 JP H0348622 Y2 JPH0348622 Y2 JP H0348622Y2 JP 1031086 U JP1031086 U JP 1031086U JP 1031086 U JP1031086 U JP 1031086U JP H0348622 Y2 JPH0348622 Y2 JP H0348622Y2
- Authority
- JP
- Japan
- Prior art keywords
- electrode group
- back electrode
- front electrode
- panel
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000010409 thin film Substances 0.000 claims description 30
- 239000000758 substrate Substances 0.000 claims description 22
- 239000011521 glass Substances 0.000 claims description 18
- 239000011159 matrix material Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 claims description 3
- 239000011295 pitch Substances 0.000 description 15
- 230000000694 effects Effects 0.000 description 3
- 238000005304 joining Methods 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000565 sealant Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
【考案の詳細な説明】
〔産業上の利用分野〕
本考案は薄膜EL（エレクトロルミネツセンス）
パネルに関し、特に表示容量の大きな大面積グラ
フイツク表示ELパネルをつなぎ合せ方式によつ
て組立てる際に用いて好適な薄膜ELパネルに関
するものである。[Detailed explanation of the invention] [Industrial application field] This invention is a thin film EL (electroluminescence)
The present invention relates to panels, and particularly to thin film EL panels suitable for use in assembling large-area graphic display EL panels with a large display capacity by a joining method.
〔従来の技術〕
従来の薄膜ELパネルは、その基本構造を第４
図に示すごとく、ガラス基板１上に形成された前
面電極群２、EL層３、背面電極群４からなり、
EL層３は発光層を絶縁層でサンドイツチ状には
さんだ３層構造を有している。また、前面電極群
２と背面電極群４は互いに直交したストライプ状
パターン電極（電極ラインともいう）からなり、
Ｘ−Ｙ（図では３×３）マトリクス電極を構成し
ている。そして、ガラス基板１上の各前面電極群
２、背面電極４の終端にはそれぞれ電極外部引き
端子１５，１６を設け、これら外部引き出し端子
１５，１６に図示しないリード線を導通接続して
防湿用外囲器（図示せず）外へ引き出すことによ
り、これらリード線を通して各前面電極群２およ
び背面電極群４に交流電源１３から交流電圧を印
加して、それら両電極の交点つまりRL層３の発
光ドツト１２を発光させ文字、図形などを表示す
るものとなつている。[Conventional technology] The basic structure of conventional thin-film EL panels is
As shown in the figure, it consists of a front electrode group 2, an EL layer 3, and a back electrode group 4 formed on a glass substrate 1.
The EL layer 3 has a three-layer structure in which a light-emitting layer is sandwiched between insulating layers in a sandwich-like structure. Further, the front electrode group 2 and the back electrode group 4 are composed of striped pattern electrodes (also referred to as electrode lines) that are orthogonal to each other.
An XY (3×3 in the figure) matrix electrode is configured. Electrode external lead terminals 15 and 16 are provided at the ends of each front electrode group 2 and back electrode 4 on the glass substrate 1, respectively, and lead wires (not shown) are electrically connected to these external lead terminals 15 and 16 for moisture proofing. By drawing out the envelope (not shown), an AC voltage is applied from the AC power supply 13 to each front electrode group 2 and back electrode group 4 through these lead wires, and the intersection of these two electrodes, that is, the RL layer 3 The light emitting dots 12 are made to emit light to display characters, figures, etc.
ところで、このような薄膜ELパネルの製造に
は真空容器を用いた蒸着装置またはスパツタ装置
を必要とするため、真空容器の大きさ、薄膜の膜
厚分布などに関する技術的問題から製造できるパ
ネルの大きさはたかだか30×30cm2である。 By the way, manufacturing such thin-film EL panels requires evaporation equipment or sputtering equipment using a vacuum container, so the size of the panels that can be manufactured is limited due to technical issues such as the size of the vacuum container and the thickness distribution of the thin film. The size is at most 30 x 30 cm2 .
このようなことから、表示容量の大きな大面積
グラフイツク表示ELパネルを製造するには個別
の薄膜ELパネル同志をつなぎ合せ方式によつて
組立てる方法がとられているが、上記した従来の
ような薄膜ELパネルの構造によると、ガラス基
板１上の周面に前面電極、背面電極の外部引き出
し端子１５，１６を形成して、その基板上に外囲
器を封着しているため、表示領域周辺のデツドス
ペースが大きくなる。そのため、薄膜ELパネル
同志を各ELパネルの電極ピツチと等ピツチでつ
なぎ合せることができず、表示品位を低下させる
という問題点があつた。
For this reason, in order to manufacture large-area graphic display EL panels with a large display capacity, a method of assembling individual thin-film EL panels by joining them together is used. According to the structure of the EL panel, the external lead-out terminals 15 and 16 of the front electrode and back electrode are formed on the peripheral surface of the glass substrate 1, and the envelope is sealed on the substrate, so that the surrounding area of the display area The dead space becomes larger. Therefore, the thin film EL panels could not be connected at the same pitch as the electrode pitch of each EL panel, resulting in a problem of deterioration of display quality.
本考案は上記のような問題点を解消するために
なされたもので、その目的は、基板上の表示領域
のデツドスペースをなくして薄膜ELパネル同志
をその電極ピツチと等ピツチでつなぎ合せ可能な
薄膜ELパネルを提供することにある。 This invention was devised to solve the above-mentioned problems, and its purpose is to eliminate the dead space in the display area on the substrate and to create a thin film that can connect thin film EL panels at the same pitch as their electrode pitches. Our goal is to provide EL panels.
本考案に係る薄膜ELパネルは、ガラス基板上
に互いに直交する前面電極群と背面電極群を形成
してＸ−Ｙマトリクス電極を構成し、前記前面電
極群と背面電極群間に、発光層を絶縁層でサンド
イツチ状にはさんだEL層を介在させた薄膜ELパ
ネルにおいて、前記前面電極群及び背面電極群の
外部引き出し端子を表示領域内で、かつ該前面電
極群と背面電極群との非交差部に設けるととも
に、前記ガラス基板の側面に封着された外囲器を
設け、前記前面電極群及び背面電極群の最外部に
位置する電極ラインとパネル縁端との距離を当該
電極群の電極ピツチの半分以下としたことを特徴
とするものである。
The thin film EL panel according to the present invention has a front electrode group and a back electrode group orthogonal to each other formed on a glass substrate to form an X-Y matrix electrode, and a light emitting layer is provided between the front electrode group and the back electrode group. In a thin film EL panel with an EL layer sandwiched between insulating layers in a sandwich-like pattern, the external lead-out terminals of the front electrode group and the back electrode group are located within the display area, and the front electrode group and the back electrode group do not intersect. At the same time, an envelope sealed to the side surface of the glass substrate is provided, and the distance between the outermost electrode line of the front electrode group and the back electrode group and the edge of the panel is determined by the electrode line of the electrode group. It is characterized by being less than half the size of pitch.
本考案の薄膜ELパネルにおいては、表示領域
に対してデツドスペースがなくなり、薄膜ELパ
ネル同志をその電極ピツチと等ピツチでつなぎ合
せることが可能となる。
In the thin film EL panel of the present invention, there is no dead space in the display area, and it becomes possible to connect the thin film EL panels to each other at the same pitch as their electrode pitches.
以下、本考案を図面に示す実施例に基づいて詳
細に説明する。
Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings.
第１図は本考案の一実施例による薄膜ELパネ
ルの基本構造を示す模式的な平面図、第２図は第
１図−線の断面図である。これらの図におい
て第４図と同一または相当部分は同一符号を示す
もので、前面電極群２と背面電極群４の交点群か
らなる表示領域の内側には当該前面電極及び背面
電極の外部引き出し端子５，６をそれぞれ設け
る。これらの外部引き出し端子５，６は各々の前
面電極群２と背面電極群４との非交差部に設けら
れていて、前面電極の外部引き出し端子５は、発
光層３０を第１、第２の絶縁層３１，３２でサン
ドイツチ状にはさんだ３層構造のEL層３を貫通
するスルーホール７とリード接続する電極パツド
８からなり、前面電極群２の各々を背面電極群４
と同一面上に引き出している。 FIG. 1 is a schematic plan view showing the basic structure of a thin film EL panel according to an embodiment of the present invention, and FIG. 2 is a sectional view taken along the line of FIG. 1. In these figures, the same or corresponding parts as in FIG. 5 and 6 respectively. These external lead terminals 5 and 6 are provided at non-intersecting parts of the front electrode group 2 and the back electrode group 4, and the external lead terminal 5 of the front electrode connects the light emitting layer 30 to the first and second It consists of a through hole 7 that penetrates the EL layer 3 with a three-layer structure sandwiched between insulating layers 31 and 32 in a sandwich pattern, and an electrode pad 8 for lead connection, and each of the front electrode group 2 is connected to the back electrode group 4.
It is pulled out on the same side as the
また、前面電極群２及び背面電極群４の最外部
に位置する電極ライン２1，２o及び４1，４oとガ
ラス基板１の終端（エツジ部）との距離は当該電
極群の電極ピツチＰの半分以下とするものとなつ
ている。そして、ガラス基板１の周側面にはそれ
を取り囲みかつ内部を気密封止すべく形成された
防温用外囲器９を所定の封着剤１０で封着するこ
とにより、その構成層つまりEL層３をガラス基
板１上の縁端まで形成されるものとなつている。
なお、第２図中、１１は前面電極及び背面電極の
外部引き出し端子５，６と半田付けなどにより導
通接続して外囲器９外へ基板面と垂直方向にそれ
ぞれ引き出されたリード線である。 Furthermore, the distance between the outermost electrode lines 2 1 , 2 o and 4 1 , 4 o of the front electrode group 2 and the back electrode group 4 and the end (edge portion) of the glass substrate 1 is the electrode pitch of the electrode group. It is supposed to be less than half of P. Then, a heat-insulating envelope 9 formed to surround the glass substrate 1 and hermetically seal the inside thereof is sealed with a predetermined sealing agent 10 on the peripheral side of the glass substrate 1, so that the constituent layers, that is, the EL The layer 3 is formed on the glass substrate 1 up to the edge thereof.
In FIG. 2, reference numerals 11 denote lead wires that are electrically connected to the external lead-out terminals 5 and 6 of the front electrode and the back electrode by soldering, etc., and are drawn out of the envelope 9 in a direction perpendicular to the substrate surface. .
このように、本考案の上記実施例の構成による
ときは、前面電極及び背面電極の外部引き出し端
子５，６を当該前面電極群２と背面電極群４との
非交差部に設けることにより、その両電極間の交
差つまりEL層３の発光ドツト１２上での十分小
さいスポツト状絶縁破壊で発生するガス、熱ある
いは飛散電極材料を効果的に薄膜外に発散させる
ことができるので、スポツト状絶縁破壊の拡大を
防ぐことができる。また、防湿用外囲器９の封着
をガラス基板１の周側面で行うことによつて、
EL層３はガラス基板１上の縁端まで形成でき、
しかも多数枚採り大型基板前面に構成層のEL層
３及び電極を形成した後、カツテイングにて所定
寸法のガラス基板１とすることができるので、そ
のガラス基板縁端での薄膜の膜厚分布に基づく輝
度ムラを生ずることもない。さらには、上記EL
層３及び電極を多数枚同時に形成できるので、コ
スト低減となる利点を奏する。 As described above, when the configuration of the above-described embodiment of the present invention is used, the external lead-out terminals 5 and 6 of the front electrode and the back electrode are provided at the non-intersecting portions of the front electrode group 2 and the back electrode group 4, thereby making it possible to The gas, heat, or scattered electrode material generated by a sufficiently small spot-like dielectric breakdown at the intersection between both electrodes, that is, on the light-emitting dot 12 of the EL layer 3, can be effectively radiated out of the thin film, so that spot-like dielectric breakdown can be avoided. can prevent the spread of Furthermore, by sealing the moisture-proof envelope 9 on the peripheral side of the glass substrate 1,
The EL layer 3 can be formed up to the edge of the glass substrate 1,
Moreover, after forming the constituent EL layer 3 and electrodes on the front surface of a large substrate, it is possible to cut a large number of sheets into a glass substrate 1 of a predetermined size, so that the thickness distribution of the thin film at the edge of the glass substrate is There will be no uneven brightness due to the brightness. Furthermore, the above EL
Since a large number of layers 3 and electrodes can be formed at the same time, there is an advantage of cost reduction.
しかして、このようにして製作された本考案の
薄膜ELパネルは、前面電極及び背面電極群２，
４の最外部の電極ライン２1，２o及び４1，４oが
パネル縁端より電極ピツチＰの半分以下となるた
め、第３図に示すごとく、上下左右の隣接する各
薄膜ELパネル２１〜２４と電極ピツチＰを等ピ
ツチにして並べることができ、つぎ目の目立たな
い大面積グラフイツク表示ELパネルの製作が可
能となる。 Therefore, the thin film EL panel of the present invention manufactured in this way has a front electrode group, a back electrode group 2,
Since the outermost electrode lines 2 1 , 2 o and 4 1 , 4 o of 4 are less than half the electrode pitch P from the edge of the panel, as shown in FIG. 24 and the electrode pitches P can be arranged at equal pitches, making it possible to produce a large-area graphic display EL panel with inconspicuous seams.
次に、本考案者の行つた実験結果を具体的に説
明する。ここでは、前面電極、背面電極群とも電
極ライン増１mm、電極ピツチ３mmの薄膜ELパネ
ルの場合について示す。すなわち、背面電極の外
部引き出し端子６として、前面電極群２と交差し
ない該前面電極の間隔２mm幅の部分にNi薄膜を
形成した。また前面電極の外部引き出し端子５
は、EL層３の薄膜形成後、背面電極群４の交差
しない間隙２mm幅の部分にスルーホール７を形成
し、その上にNi薄膜を電極パツド８として形成
した。そして、各Ni薄膜にはリード線１１を半
田付けし互いに電気的絶縁性を保つたうえ、これ
らリード線１１を外囲器９外へ引き出した。一
方、前面電極及び背面電極２，４の最外部の電極
ライン２1，２o及び４1，４oは、使用したガラス
基板１の縁端から１mmの位置とし、厚さ0.15mmの
金属製外囲器９を封着剤１０を用いてガラス基板
１の側面に封着した。このようにして製作した薄
膜ELパネルは、上記最外部の電極ライン２1，２
ｏ及び４1，４oがパネル縁端から封着剤１０の厚
み0.1mmを含め1.25mmの位置となり、電極ピツチ
（Ｐ＝３mm）の半分（1.5mm）以下となる。これに
よつて、複数個の薄膜ELパネルをつなぎ合わせ
ても電極は等ピツチを保つことができた。 Next, the experimental results conducted by the present inventor will be specifically explained. Here, the case of a thin film EL panel with an electrode line increase of 1 mm and an electrode pitch of 3 mm for both the front electrode and rear electrode groups will be shown. That is, as the external lead-out terminal 6 of the back electrode, a Ni thin film was formed on a portion of the front electrode that did not intersect with the front electrode group 2 and had a width of 2 mm. Also, the external lead-out terminal 5 of the front electrode
After forming the thin film of the EL layer 3, a through hole 7 was formed in a 2 mm wide portion of the non-intersecting gap of the back electrode group 4, and a Ni thin film was formed as an electrode pad 8 thereon. Then, lead wires 11 were soldered to each Ni thin film to maintain electrical insulation from each other, and these lead wires 11 were drawn out of the envelope 9. On the other hand, the outermost electrode lines 2 1 , 2 o and 4 1 , 4 o of the front and back electrodes 2 and 4 are located 1 mm from the edge of the glass substrate 1 used, and are made of metal with a thickness of 0.15 mm. The envelope 9 was sealed to the side surface of the glass substrate 1 using a sealant 10. The thin film EL panel manufactured in this way has the outermost electrode lines 2 1 , 2
o and 4 1 , 4 o are located at a distance of 1.25 mm from the edge of the panel including the thickness of 0.1 mm of the sealant 10, which is less than half (1.5 mm) of the electrode pitch (P=3 mm). This enabled the electrodes to maintain the same pitch even when multiple thin-film EL panels were connected together.
以上のように本考案の薄膜ELパネルによれば、
互いに直交する前面電極群及び背面電極群の外部
引き出し端子を表示領域内で、かつ該前面電極群
と背面電極群との非交差部に設けるとともに、ガ
ラス基板の側面に封着された外囲器を設け、前記
前面電極群及び背面電極群の最外部に位置する電
極ラインとパネル縁端との距離を当該電極群の電
極ピツチの半分以下とすることにより、表示領域
周辺のデツドスペースがなくなり、かつ薄膜形成
が容易になつて膜厚均一性が上がる。しかもEL
パネル同志のつなぎ合せが可能となり、したがつ
て、表示品位にすぐれた大面積グラフイツク表示
ELパネルが実現できる効果がある。
As described above, according to the thin film EL panel of the present invention,
External lead-out terminals of the front electrode group and the back electrode group that are perpendicular to each other are provided within the display area and at non-intersecting parts of the front electrode group and the back electrode group, and an envelope is sealed to the side surface of the glass substrate. By setting the distance between the outermost electrode line of the front electrode group and the back electrode group and the edge of the panel to be less than half the electrode pitch of the electrode group, dead space around the display area can be eliminated, and Thin film formation becomes easier and film thickness uniformity improves. Moreover, EL
It is now possible to connect panels together, resulting in large-area graphic display with excellent display quality.
There are effects that EL panels can achieve.
第１図及び第２図は本考案の一実施例による薄
膜ELパネルの基本構造を示す模式的な平面図及
び第１図−線の断面図、第３図は上記実施例
の薄膜ELパネルをつなぎ合せによつて組立てた
ときの概略図、第４図は従来の薄膜ELパネルの
概略平面図である。
１……ガラス基板、２……前面電極群、３……
EL層、４……背面電極群、５……前面電極の外
部引き出し端子、６……背面電極の外部引き出し
端子、７……スルーホール、８……電極パツド、
９……外囲器、１０……封着剤、１１……リード
線。
1 and 2 are a schematic plan view and a sectional view taken along the line shown in FIG. 1, showing the basic structure of a thin film EL panel according to an embodiment of the present invention, and FIG. FIG. 4 is a schematic plan view of a conventional thin film EL panel when it is assembled by joining. 1...Glass substrate, 2...Front electrode group, 3...
EL layer, 4... Back electrode group, 5... External lead-out terminal of front electrode, 6... External lead-out terminal of back electrode, 7... Through hole, 8... Electrode pad,
9...Envelope, 10...Sealing agent, 11...Lead wire.
Claims (1)
面電極群を形成してＸ−Ｙマトリクス電極を構成
し、前記前面電極群と背面電極間に、発光層を絶
縁層でサンドイツチ状にはさんだEL層を介在さ
せた薄膜ELパネルにおいて、前記前面電極群及
び背面電極群の外部引き出し端子を表示領域内
で、かつ該前面電極群と背面電極群との非交差部
に設けるとともに、前記ガラス基板の側面に封着
された外囲器を設け、前記前面電極群及び背面電
極群の最外部に位置する電極ラインとパネル縁端
との距離を当該電極群の電極ピツチの半分以下と
したことを特徴とする薄膜ELパネル。 An EL layer in which a front electrode group and a back electrode group are formed perpendicularly to each other on a glass substrate to constitute an X-Y matrix electrode, and a light emitting layer is sandwiched between the front electrode group and the back electrode in a sandwich pattern with an insulating layer. In the thin-film EL panel in which external lead-out terminals of the front electrode group and the back electrode group are provided within the display area and at non-intersecting parts of the front electrode group and the back electrode group, and The method is characterized by providing an envelope sealed to the front electrode group and the back electrode group, and making the distance between the outermost electrode line of the front electrode group and the back electrode group and the edge of the panel less than half the electrode pitch of the electrode group. Thin film EL panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1031086U JPH0348622Y2 (en) | 1986-01-29 | 1986-01-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1031086U JPH0348622Y2 (en) | 1986-01-29 | 1986-01-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62123690U JPS62123690U (en) | 1987-08-06 |
| JPH0348622Y2 true JPH0348622Y2 (en) | 1991-10-17 |
Family
ID=30796482
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1031086U Expired JPH0348622Y2 (en) | 1986-01-29 | 1986-01-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0348622Y2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8846066B2 (en) | 2004-05-19 | 2014-09-30 | The Regents Of The University Of California | Methods and related compositions for reduction of fat and skin tightening |
| US9186364B2 (en) | 2009-03-03 | 2015-11-17 | Kythera Biopharmaceuticals, Inc. | Formulations of deoxycholic acid and salts thereof |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000298446A (en) * | 1999-02-08 | 2000-10-24 | Sony Corp | Planar display device |
| JP2001296830A (en) * | 2000-04-13 | 2001-10-26 | Sony Corp | Planar display device |
| JP5907766B2 (en) * | 2012-03-14 | 2016-04-26 | 株式会社カネカ | Light emitting device and method for manufacturing light emitting device |
-
1986
- 1986-01-29 JP JP1031086U patent/JPH0348622Y2/ja not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8846066B2 (en) | 2004-05-19 | 2014-09-30 | The Regents Of The University Of California | Methods and related compositions for reduction of fat and skin tightening |
| US9186364B2 (en) | 2009-03-03 | 2015-11-17 | Kythera Biopharmaceuticals, Inc. | Formulations of deoxycholic acid and salts thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62123690U (en) | 1987-08-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2004103582A (en) | Organic el display pannel and its manufacturing method | |
| JPS60182487A (en) | Display for decoration | |
| JPS61284091A (en) | Thin film el display element | |
| RU2082286C1 (en) | Electroluminescent panel manufacturing process | |
| JP2000243555A (en) | Organic el display | |
| JPH0348622Y2 (en) | ||
| JPH06310275A (en) | El element and el panel | |
| TW385468B (en) | Field emission device | |
| JPH0443995Y2 (en) | ||
| JP3442295B2 (en) | Flat panel | |
| JPH05303995A (en) | Electroluminescent lamp and its manufacture | |
| JP2003223988A (en) | Organic el panel | |
| JPH0310602Y2 (en) | ||
| CN214203731U (en) | Electrode structure, organic light-emitting device and lighting panel | |
| JPS60126687A (en) | Solid video display plate and manufacture thereof | |
| JP3234028B2 (en) | Gas discharge display panel | |
| JPS6129194Y2 (en) | ||
| JPH10177894A (en) | Distributed-electroluminescent element board | |
| JPH0515756Y2 (en) | ||
| JPH0138623Y2 (en) | ||
| JPH051198U (en) | Electroluminescent device | |
| JP2759803B2 (en) | Fluorescent display tube | |
| JP2631939B2 (en) | Gas discharge display panel and method of manufacturing the same | |
| JPH0226123Y2 (en) | ||
| JPH02126589A (en) | Membranous el panel |