JPH02126589A - Membranous el panel - Google Patents
Membranous el panelInfo
- Publication number
- JPH02126589A JPH02126589A JP63280050A JP28005088A JPH02126589A JP H02126589 A JPH02126589 A JP H02126589A JP 63280050 A JP63280050 A JP 63280050A JP 28005088 A JP28005088 A JP 28005088A JP H02126589 A JPH02126589 A JP H02126589A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- dielectric breakdown
- ageing
- back electrode
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011521 glass Substances 0.000 claims abstract description 12
- 239000010409 thin film Substances 0.000 claims description 12
- 230000032683 aging Effects 0.000 abstract description 24
- 230000015556 catabolic process Effects 0.000 abstract description 20
- 230000000694 effects Effects 0.000 abstract description 5
- 230000003679 aging effect Effects 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 6
- 230000007547 defect Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 230000002431 foraging effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Electroluminescent Light Sources (AREA)
Abstract
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明は、交流電界の印加によりＥＬ発光を呈する薄膜
ＥＬパネルに関する。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a thin film EL panel that emits EL light upon application of an alternating current electric field.
〈従来の技術〉
ＸＹマトリックス表示に用いられる従来の薄膜ＥＬパネ
ルの構造を第３図に示す。背面電極６としては、通常安
定で加工が容易なＡ／（アルミニウム）が用いられる。<Prior Art> The structure of a conventional thin film EL panel used for XY matrix display is shown in FIG. As the back electrode 6, A/(aluminum), which is stable and easy to process, is usually used.
給電端子部７は、／・ンダ接続するために、ＡＩ！とＮ
ｉにソケル）の積層膜が用いられている。The power supply terminal section 7 is connected to AI! and N
A laminated film of Sokel is used for i.
】
薄膜ＥＬパネルは、輝度特性の安定化のため、エージン
グ処理が必要である。このエージング処理は、透明電極
の給電端子部と背面電極の給電端子部を、エージング電
源に電気的に接続してなされる。この接続は、金属箔等
を均一に接触されて隣接する給電端子を短絡させること
によりなされる。] Thin-film EL panels require aging treatment to stabilize their brightness characteristics. This aging process is performed by electrically connecting the power supply terminal portion of the transparent electrode and the power supply terminal portion of the back electrode to an aging power source. This connection is made by uniformly contacting metal foil or the like to short-circuit adjacent power supply terminals.
このエージング処理後、駆動用回路と、ＥＬパネルを接
続して表示装置となるが、このときの接続はハンダ付が
用いられる。After this aging treatment, the driving circuit and the EL panel are connected to form a display device, and the connections at this time are soldered.
〈発明が解決しようとする問題点〉
薄１１ＮＥＬパネルのエージングは、極性対称のパルス
電圧を印加することによりなされるが、このとき周波数
や電圧が高く、又温度が高い程エージング処理は短時間
ですむ。しかしながら、薄膜ＥＬパネルを構成する薄膜
中にはピンホール等の欠陥が存在しこのため、エージン
グ中に絶縁破壊を起こすことがある。特に、短時間でエ
ージングを完了させるだめの加速エージングにおいて絶
縁破壊が起こりやすい。<Problem to be solved by the invention> Aging of a thin 11NEL panel is done by applying a pulse voltage with polarity symmetry, but the higher the frequency and voltage and the higher the temperature, the shorter the aging process will be. nothing. However, there are defects such as pinholes in the thin film that constitutes the thin film EL panel, which may cause dielectric breakdown during aging. In particular, dielectric breakdown is likely to occur during accelerated aging in which aging is completed in a short period of time.
この絶縁破壊は、小さな破壊で止まれば、表示上問題と
ならないが、従来の第３図に示す構造の薄膜ＥＬ、パネ
ルでは、背面電極として低抵抗のＡ／膜を用い、給電端
子部にもＡＪとＮｉの積層膜を用いているため、絶縁破
壊時にエージング電源からの電流供給に制限がかからず
、絶縁破壊が大きくなる。This dielectric breakdown does not pose a problem for display as long as it is a small breakdown, but in the conventional thin-film EL panel with the structure shown in Figure 3, a low-resistance A/film is used as the back electrode, and the power supply terminal is also Since a laminated film of AJ and Ni is used, there is no restriction on the current supply from the aging power supply at the time of dielectric breakdown, which increases the dielectric breakdown.
〈問題点を解決するための手段〉
本発明は、上述の問題点を解決するためになされたもの
であって、薄膜ＥＬパネルのエージング時の絶縁破壊の
拡大を防止するため、背面電極の給電端子部のガラス端
に抵抗体を設け、この抵抗体を介してエージング電源に
接続することにより、絶縁破壊時の電流に制限を加える
ことを可能としたものである。この構造を第１図を用い
て説明する。背面電極の給電端子部７のガラス端部にＩ
ＴＯ等からなる１〜ＩＯｋΩα鉱体８を形成し、エージ
ング時この抵抗体のガラス端側をエージング用の電源に
接続する。抵抗体の抵抗値は１〜ＩＯｋΩが最適で、こ
れより小さいと絶縁破壊の拡大を防止する効果がなく、
又、大きいとエージング、駆動のパルスが正常な波形で
かからなくなり、エージング効果が低くなる。<Means for Solving the Problems> The present invention has been made to solve the above-mentioned problems, and in order to prevent the expansion of dielectric breakdown during aging of thin film EL panels, the power supply of the back electrode is By providing a resistor at the glass end of the terminal portion and connecting it to the aging power source through the resistor, it is possible to limit the current at the time of dielectric breakdown. This structure will be explained using FIG. 1. I on the glass end of the power supply terminal part 7 of the back electrode
A 1 to IO kΩα ore body 8 made of TO or the like is formed, and during aging, the glass end side of this resistor is connected to a power source for aging. The optimal resistance value of the resistor is 1 to IO kΩ; if it is smaller than this, it will not be effective in preventing the expansion of dielectric breakdown.
Moreover, if it is large, the aging and driving pulses will not be applied with a normal waveform, and the aging effect will be reduced.
本発明では、背面電極側の給電端子部に抵抗体を設けて
いるが、透明電極側は、用いられるＩＴＯの比抵抗が高
く、抵抗体を設けても効果は少ない。In the present invention, a resistor is provided in the power supply terminal portion on the back electrode side, but since the specific resistance of ITO used on the transparent electrode side is high, even if the resistor is provided, there is little effect.
〈発明の作用〉
上記構造により、工〜ジング中の電流は抵抗体を介して
供給されることになり、従ってエージング中の絶縁破壊
の拡大による不良を低減することが可能となる。<Operation of the Invention> With the above structure, current during processing is supplied through the resistor, and therefore it is possible to reduce defects due to expansion of dielectric breakdown during aging.
〈実施例〉 以下、本発明を図面に基づいて説明する。<Example> Hereinafter, the present invention will be explained based on the drawings.
第１図は、本発明による薄膜ＥＬパネルの一実施例を示
す。ガラス基板】上に、ＩＴＯ（Ｉｎ２０ｇ−＋−５ｎ
ｏ２．）からなる透明導電膜をスパッタで形成した後、
エツチングによりストライブ状に成形し、透明電極２と
する。このとき、ガラス端部にもＩＴＯでストライブを
形成し、抵抗体８とする。FIG. 1 shows one embodiment of a thin film EL panel according to the present invention. Glass substrate] ITO (In20g-+-5n
o2. ) After forming a transparent conductive film by sputtering,
The transparent electrode 2 is formed into a stripe shape by etching. At this time, stripes are also formed on the edges of the glass using ITO to form the resistor 8.
抵抗値が１〜ＩＯｋΩとなる様に、ストライプ幅と長さ
を設定する。The stripe width and length are set so that the resistance value is 1 to IO kΩ.
次に、スパッタ、真空蒸着等で５ｉ０２．Ｓｉ３Ｎ４等
からなる第１誘電体３を形成する。次に発光層４をＺｎ
Ｓ：Ｍｎ焼結ペレットを用いて電子ビーム蒸着により形
成する。次にＳ ｉ３ Ｎ４ 、Ａ１２０３等からなる
第２誘電体５を第１誘電体と同様の方法で形成する。次
にＡＩ！からなる背面電極６及びＡＩ’とＮｉの積層膜
からなる給電端子７を蒸着及びエツチングにより形成す
る。この給電端子は、背面電極６と抵抗体８を接続する
形状で形成する。Next, 5i02. A first dielectric 3 made of Si3N4 or the like is formed. Next, the light emitting layer 4 is made of Zn
S: Formed by electron beam evaporation using Mn sintered pellets. Next, a second dielectric 5 made of S i3 N4, A1203, etc. is formed in the same manner as the first dielectric. Next is AI! A back electrode 6 made of the same material and a power supply terminal 7 made of a laminated film of AI' and Ni are formed by vapor deposition and etching. This power supply terminal is formed in a shape that connects the back electrode 6 and the resistor 8.
エージング処理時、背面電極側は、抵抗体のガラス端部
を第２図に示す様な方法で抵抗体を介して電圧が印加さ
れる様にする。During the aging process, a voltage is applied to the glass end of the resistor through the resistor in the manner shown in FIG. 2 on the back electrode side.
以上の様な方法でエージング処理すると、絶縁破壊時電
流制限がかかり、破壊を小さく抑えることが可能となる
。When the aging treatment is performed in the manner described above, current is limited at the time of dielectric breakdown, making it possible to suppress breakdown to a small level.
本実施例では、透明電極に用いるＩＴＯを抵抗体として
用いたが、５ｎ０２やＴｉＯ２等からなる抵抗体を別途
スパッタリング及びエツチングを用いて形成しても、効
果は同じである。In this embodiment, ITO used for the transparent electrode is used as the resistor, but the same effect can be achieved even if a resistor made of 5n02, TiO2, etc. is separately formed using sputtering and etching.
エージノブ後のハンダ付は、抵抗体の内側のＡ／とＮｉ
の積層よりなる給電端子を用いれば、従来と同じ様に可
能である。Soldering after the age knob is A/ and Ni inside the resistor.
This is possible in the same way as in the conventional case by using a power supply terminal made of a stack of layers.
〈発明の効果〉
従来、背面電極の抵抗が小さいため、エージング処理中
に膜欠陥に起因して発生した絶縁破壊が大きくなり、薄
膜ＥＬパネルの不良要因となっていだが、本発明により
背面電極の給電端子部のガラス端側に、ＩＴＯ等からな
る１〜ＩＯｋΩの抵抗体を設けこの抵抗体を介して、エ
ージングのパルス波形を印加することにより絶縁破壊時
の電流に制限がかかり、絶縁破壊を小さくすることが可
能となった。<Effects of the Invention> Conventionally, since the resistance of the back electrode was small, dielectric breakdown caused by film defects during aging treatment became large, causing failure of thin-film EL panels. A resistor of 1 to IO kΩ made of ITO or the like is installed on the glass end of the power supply terminal, and by applying an aging pulse waveform through this resistor, the current at the time of dielectric breakdown is limited, and the dielectric breakdown is prevented. It became possible to make it smaller.
第１図は本発明の一実施例の構成を示す斜視図である。
第２図は、エージング時の接続方法を示す断面図である
。
第３図は、従来の薄膜ＥＬパネルの構成を示す斜視図で
ある。
１・・ガラス基板、２・・・透明電極、３・・・第１誘
電体、４・・・発光層、５・・・第２誘電体、６・・・
背面電極、７・・給電端子、８・・抵抗体。FIG. 1 is a perspective view showing the configuration of an embodiment of the present invention. FIG. 2 is a sectional view showing a connection method during aging. FIG. 3 is a perspective view showing the structure of a conventional thin film EL panel. DESCRIPTION OF SYMBOLS 1... Glass substrate, 2... Transparent electrode, 3... First dielectric, 4... Light emitting layer, 5... Second dielectric, 6...
Back electrode, 7...power supply terminal, 8...resistor.
Claims (1)
有する薄膜ＥＬパネルにおいて、前記三層構造部の背面
側に位置する背面電極の給電端子部のガラス端側に１〜
１０ｋΩの抵抗体を設けたことを特徴とする薄膜ＥＬパ
ネル。1. In a thin film EL panel having a three-layer structure in which a light-emitting layer is sandwiched between upper and lower sides by dielectric layers, 1 to 1 are attached to the glass end side of the power supply terminal portion of the back electrode located on the back side of the three-layer structure.
A thin film EL panel characterized by having a 10kΩ resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63280050A JPH02126589A (en) | 1988-11-04 | 1988-11-04 | Membranous el panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63280050A JPH02126589A (en) | 1988-11-04 | 1988-11-04 | Membranous el panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02126589A true JPH02126589A (en) | 1990-05-15 |
Family
ID=17619602
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63280050A Pending JPH02126589A (en) | 1988-11-04 | 1988-11-04 | Membranous el panel |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02126589A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100617187B1 (en) * | 2003-12-11 | 2006-08-31 | 엘지전자 주식회사 | Method for cutting aging pattern of Organic electron luminescence panel |
| WO2011136205A1 (en) * | 2010-04-28 | 2011-11-03 | Ｎｅｃライティング株式会社 | Organic electroluminescent lighting device and method for manufacturing same |
-
1988
- 1988-11-04 JP JP63280050A patent/JPH02126589A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100617187B1 (en) * | 2003-12-11 | 2006-08-31 | 엘지전자 주식회사 | Method for cutting aging pattern of Organic electron luminescence panel |
| WO2011136205A1 (en) * | 2010-04-28 | 2011-11-03 | Ｎｅｃライティング株式会社 | Organic electroluminescent lighting device and method for manufacturing same |
| JPWO2011136205A1 (en) * | 2010-04-28 | 2013-07-22 | Ｎｅｃライティング株式会社 | ORGANIC ELECTROLUMINESCENT LIGHTING DEVICE AND ITS MANUFACTURING METHOD |
| US9680125B2 (en) | 2010-04-28 | 2017-06-13 | Nec Lighting, Ltd. | Organic electroluminescent lighting device and method for manufacturing the same |
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