JPH0348337A - Interruption control system - Google Patents

Abstract

PURPOSE:To make it possible to accept also an interruption with low priority and process it by forming an interruption control circuit for a priority order operating circuit in regard to interruption control asynchronously generated from plural circuits and processing a low-priority interruption factor which is not processed for a fixed time. CONSTITUTION:The interruption control circuit 3 is constituted so as to reverse the priority order of a priority order operating circuit 2 when a low-priority interruption is not processed even after the lapse of a fixed time from the generation of the interruption. Thereby, a low-priority interruption which ca not be processed by a conventional method can be accepted. When the low- priority interruption is processed, the circuit 3 restores the priority order of the circuit 2 again. Consequently, the generation of a phenomenon that a high- priority interruption is frequently generated and a low-priority interruption is neglected is prevented.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an interrupt control method from a device having a plurality of circuits, and particularly to an interrupt control method that processes interrupt events occurring individually in a plurality of circuits in order of priority. Regarding.

[Conventional technology]

Conventionally, this type of interrupt control method provides an interface between the interrupt source and the control unit, latches each interrupt signal in a latch circuit, and uses a priority control circuit to send the interrupt to the interrupt controller in order of priority. It's under control.

[Problem that the invention seeks to solve]

In the conventional interrupt control method described above, the priority is fixed, so depending on how the priority is assigned to each interrupt, if a high priority interrupt event occurs frequently, a low priority interrupt may not be accepted. The disadvantage is that situations may occur that are not processed immediately, causing failures.

An object of the present invention is to provide an interrupt processing method that can accept and process even such low priority interrupts.

[Means to solve the problem]

The interrupt control method of the present invention is an interrupt control method that controls interrupts from a device having a plurality of circuits operating independently, and processes interrupt events from individual circuits that occur asynchronously using priorities. The present invention is configured to include a priority operation circuit that controls the priority, an interrupt control circuit that controls the priority, and a control section that controls the operation circuit and the interrupt control circuit.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic block diagram of an interrupt control system showing one embodiment of the present invention.

As shown in FIG. 1, this embodiment includes circuits El, E2, E3, E4, and circuits that generate interrupts through independent operations.
......, En, and the register l that accepts the interrupt request has bits }Fl, F'2, F3, respectively.
F4, . . . , Fn correspond to each generating circuit on a one-to-one basis. This register l is cleared in advance, and the bits Fl-Fn paired with the circuit El"-En that generated the event are set when an interrupt occurs.
A priority level operation circuit 2 connected to the CPU determines the priority level based on a preset priority level, and based on the priority level, passes the interrupt request with the highest priority level to the control unit 4 based on the state of the register 1. When the interrupt processing is completed, the bit in the register l that caused the interrupt processed by the control unit 4 is cleared.

The purpose of this embodiment is to prevent high-priority interrupts from frequently occurring and low-priority interrupts from being ignored in the interrupt processing described above.For this purpose, an interrupt control circuit 3 is provided to prevent low-priority interrupts from being ignored. After an interrupt occurs,
If this interrupt is not processed after a certain period of time has elapsed, the interrupt control circuit 3 reverses the priority order in the priority order operation circuit 2. This allows low-priority interrupts that have not been processed up to now to be accepted. Further, when such low priority interrupt processing is performed, the interrupt control circuit 3 restores the priority order in the priority order operation circuit 2 to the original state.

〔Effect of the invention〕

As explained above, the interrupt control method of the present invention provides an interrupt control circuit for a priority operation circuit in controlling interrupts generated asynchronously from a plurality of circuits, and handles low-priority interrupt factors that are unprocessed for a certain period of time. By doing so, the requested interrupt processing will be executed at least once after a certain period of time, which has the effect of improving the reliability of the interrupt.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an interrupt control system showing one embodiment of the present invention. El, E2, E3, E4 to En = interrupt event generation circuit, 1... register, 2... priority operation circuit, 3... interrupt control circuit, 4...・・・
...control section, Fl, F2, F3, F4 to Fn...
- Bits in registers.

Claims (1)

[Claims] In an interrupt control method for controlling interrupts from a device having a plurality of circuits operating individually and independently, a priority operation circuit that processes interrupt events from the individual circuits that occur asynchronously using priorities; An interrupt control method comprising: an interrupt control circuit that controls priority; and a control section that controls the operation circuit and the interrupt control circuit.