JPH0345684U - - Google Patents
Info
- Publication number
- JPH0345684U JPH0345684U JP10663989U JP10663989U JPH0345684U JP H0345684 U JPH0345684 U JP H0345684U JP 10663989 U JP10663989 U JP 10663989U JP 10663989 U JP10663989 U JP 10663989U JP H0345684 U JPH0345684 U JP H0345684U
- Authority
- JP
- Japan
- Prior art keywords
- hole
- solder
- circuit board
- land
- insulating substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims 2
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
第１図は本考案による回路基板の概略平面図、
第２図は第１図中の矢示−線に沿う概略断面
図、第３図は従来の回路基板の概略平面図、第４
図は第３図中の矢示−線に沿う概略断面図、
そして、第５図はスルーホールが半田により閉塞
された状態を示す概略断面図である。
１，１０……回路基板、２……絶縁基板、２ｓ
……部品面、２ｂ……半田面、３……スルーホー
ル、５ｃ……ランド、５ｂ……ランド、６……ソ
ルダーマスク、Ｍ……被覆部、Ｅ……露出部。
FIG. 1 is a schematic plan view of a circuit board according to the present invention;
2 is a schematic sectional view taken along the arrow line in FIG. 1, FIG. 3 is a schematic plan view of a conventional circuit board, and FIG.
The figure is a schematic cross-sectional view along the arrow line in Figure 3,
FIG. 5 is a schematic sectional view showing a state in which the through hole is closed with solder. 1, 10...Circuit board, 2...Insulating board, 2s
...Component surface, 2b...Solder surface, 3...Through hole, 5c...Land, 5b...Land, 6...Solder mask, M...Covered part, E...Exposed part.
Claims (1)
ーホールが形成されると共に、このスルーホール
の周囲に部品面及び半田面の各面についてランド
が形成された回路基板に於いて、 半田面のランドを、ソルダーマスクにより、被
覆部と露出部が交互に不連続状態で形成されるよ
うに被覆すると共に、スルーホールの壁面に絶縁
基板の肌を露出させるようにしたことを特徴とす
る回路基板。[Claims for Utility Model Registration] A circuit board in which a through hole is formed in an insulating substrate to communicate a component surface and a solder surface, and a land is formed around the through hole on each surface of the component surface and the solder surface. In this process, the land on the solder surface was covered with a solder mask so that covered parts and exposed parts were formed alternately and discontinuously, and the skin of the insulating substrate was exposed on the wall of the through hole. A circuit board characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10663989U JPH0345684U (en) | 1989-09-13 | 1989-09-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10663989U JPH0345684U (en) | 1989-09-13 | 1989-09-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0345684U true JPH0345684U (en) | 1991-04-26 |
Family
ID=31655365
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10663989U Pending JPH0345684U (en) | 1989-09-13 | 1989-09-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0345684U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008270426A (en) * | 2007-04-18 | 2008-11-06 | Alps Electric Co Ltd | Electric component module |
-
1989
- 1989-09-13 JP JP10663989U patent/JPH0345684U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008270426A (en) * | 2007-04-18 | 2008-11-06 | Alps Electric Co Ltd | Electric component module |