JPH0345574B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse width detection method that accurately measures the pulse width of a pulse signal whose rise and fall are relatively gentle and includes DC bias and sag.

Generally, earth (earth) mounted on artificial sanitary
The output pulse of the sensor is a pulse signal whose rise and fall are relatively slow, and the exact level of signal zero is unknown. Conventionally, as a method for measuring the pulse width of such a pulse signal, a differential mode shown in FIG. 1 and a threshold mode shown in FIG. 2 have been used. The differential mode circuit shown in Figure 1 is
A differentiating circuit 1 for the input signal, a positive peak detecting circuit 2 and a negative peak detecting circuit 3 that detect positive and negative peaks from the output of the differentiating circuit 1, and the output of the differentiating circuit 1 and each peak detecting circuit 2, 3. The circuit includes a positive rise detection comparison circuit 4 and a negative rise detection comparison circuit 5 which detect each rise from the output, and a flip-flop circuit 6 driven by each of these comparison circuits 4 and 5. In this circuit, an input signal is differentiated by a differentiation circuit 1, and peak detection circuits 4 and 5 perform peak detection on the differential values of rising and falling edges. Furthermore, by comparing this detected value with an appropriately divided voltage value and a differentiated value using comparison circuits 4 and 5, the rising and falling edges of the input signal are detected.
This signal sets flip-flop 6,
It detects the pulse width. This circuit has the disadvantage that when the pulse width is narrow, the differential values of rising and falling edges tend to overlap, resulting in errors, and when the S/N ratio is low, noise causes false triggers to occur, resulting in malfunctions.

In the threshold mode shown in FIG. 2, 7 is an equalizer, 8 is a pulse peak detection circuit, 9 is a zero level detection circuit, and 10 is a voltage dividing circuit. After the input signal is made as close to the original waveform as possible by the equalizer 7, the level of the input pulse is detected by the peak detection circuit 8 and the zero level detection circuit 9. This is appropriately divided by a voltage dividing circuit 10 to set a detection level, and a comparator 4 is used to detect the input pulse width. This circuit has the disadvantage that the zero level detection circuit becomes unstable due to noise. Furthermore, if there is a sag, it is corrected by the equalizer 7, but in order to perform accurate correction it is necessary to use an integrating circuit, which has the drawback that it tends to cause instability of the DC level.

SUMMARY OF THE INVENTION An object of the present invention is to solve these drawbacks and provide a pulse width detection method that can stably detect the pulse width without being affected by noise or sag.

The pulse width detection method of the present invention includes an AC coupling circuit that removes the DC component included in the input pulse and switches the input time constant, and outputs a pulse corresponding to the pulse width of the input pulse from the output of this AC coupling circuit. a switching circuit that switches the input time constant to a large value when there is an output pulse of the pulse detection circuit; an integrating circuit that integrates the output of the AC coupling circuit; and a switching circuit that integrates the output of the AC coupling circuit; an adder circuit that adds the output of the circuit; a peak detector circuit that calculates the peak value from the output pulse of the adder circuit, divides this peak value, and outputs a reference voltage; The device includes a comparison circuit that detects the pulse width by comparing the pulse width with the output of the circuit.

The present invention will be explained in detail below with reference to the drawings.

FIG. 3 is a block diagram of an embodiment of the present invention, and FIGS. 4a to 4f are operational waveform diagrams of FIG. 3. In the figure, 11
is an AC coupling circuit, 12 is a buffer, 13 is a pulse detection circuit, 14 is an integration circuit, 15 is an addition circuit, 1
6 is a peak detection circuit, and 4 is a comparison circuit. First, when an input pulse as shown in FIG. 2a is passed through the AC coupling circuit 11, the DC component of the input signal is removed. In this AC coupling circuit 11, the switching circuit 17 is turned on in the absence of a pulse signal, and the input of the buffer 2 is set to OV. When a pulse signal is input to this circuit, the rise of the pulse signal is selected to be sufficiently small compared to the time constant of the AC coupling circuit 11, so the change in the input remains unchanged.
It is output as a relative output change of the AC coupling circuit (Figure 4b). Further, the pulse detection circuit 13 sets a constant reference comparison level TH, and detects a pulse by comparing this value with the input. By switching the switching circuit 17, the time constant of the AC coupling circuit 11 is set to infinity. As a result, the output of the AC coupling circuit 11 has the same waveform as the input, and the zero signal level is fixed at 0V. If the input signal has a sag S as shown in Figure 4a (if the signal source has a large DC component, sag may occur by using an AC coupling circuit), the rise of the input pulse If it is too gradual, the equivalent slice level will fluctuate and the linearity of the measured values will deteriorate.
It is necessary to correct that sag.

In this embodiment, the signal whose zero level is clamped (Fig. 4b) is integrated by the integrator 14, and as shown in Fig. 4d, a waveform with a sag and an inverse slope of the input and signal is generated. . This slope signal is shown in Fig. 4b.
The sag of the pulse can be corrected by adding the input signal with the adder 15. Since this integrating circuit 14 is reset by the pulse detection circuit 13, the direct current output of the integrating circuit 14 will not reach an excessive value. In addition, the peak detection circuit 1
6 detects the peak level of the pulse signal and divides it to generate a reference voltage R for slicing the pulse signal. The comparator 4 compares the output of the adder 15 with the reference voltage R of the output of the peak detection circuit 16 to detect the pulse width as shown in the output of FIG. 4f.

The conventional threshold mode uses a peak hold circuit to detect the zero level, but the zero level has a long time period and is more susceptible to noise than the pulse signal peak detection circuit. This is prevented by the coupling circuit 11, and since the pulse signal detection circuit is used to control the time constant to prevent sag due to the time constant of AC coupling, almost no waveform distortion occurs. Furthermore, in the low-frequency correction circuit, the conventional integrating circuit had a difficulty in ensuring DC stability, but in this embodiment, the low-frequency correction circuit is reset, so that DC stability can be easily ensured.

As described above, according to the present invention, it is possible to accurately detect the pulse width even when the input pulse signal has a slow rise and a sag in its waveform. Furthermore, even when noise is added to the input, errors in measurement values are less likely to occur. For this reason,
It is possible to accurately measure the pulse width of waveforms such as those output from earth sensors mounted on satellites.

[Brief explanation of drawings]

1 and 2 are block diagrams of a conventional pulse width detection circuit, FIG. 3 is a block diagram of an embodiment of the present invention, and FIGS. 4a to 4f are operational waveform diagrams of FIG. 3. In the figure, 1...differential circuit, 2, 3, 16...
...Peak detection circuit, 4, 5...Comparison circuit, 6...
Flip-flop circuit, 7... Equalizer, 8...
... Pulse peak detection circuit, 9 ... Zero level detection circuit, 10 ... Voltage dividing circuit, 11 ... AC coupling circuit,
12... Buffer, 13... Pulse detection circuit, 1
4... Integrating circuit, 15... Adding circuit, 17... Switching circuit.

Claims (1)

[Claims] 1. An AC coupling circuit that removes the DC component included in the input pulse and switches the input time constant, a pulse detection circuit that outputs a pulse corresponding to the pulse width of the input pulse from the output of this AC coupling circuit, and this pulse a switching circuit that switches the input time constant to a large value when there is an output pulse from the detection circuit; an integrating circuit that integrates the output of the AC coupling circuit; and an addition that adds the output of the integrating circuit and the output of the AC coupling circuit. a peak detection circuit that calculates the peak value from the output pulse of this adder circuit, divides this peak value and outputs a reference voltage, and compares the reference voltage of this peak detection circuit with the output of the adder circuit. A pulse width detection method that includes a comparison circuit that detects pulse width.