JPH034537A - Flattening of semiconductor device - Google Patents
Flattening of semiconductor deviceInfo
- Publication number
- JPH034537A JPH034537A JP14044889A JP14044889A JPH034537A JP H034537 A JPH034537 A JP H034537A JP 14044889 A JP14044889 A JP 14044889A JP 14044889 A JP14044889 A JP 14044889A JP H034537 A JPH034537 A JP H034537A
- Authority
- JP
- Japan
- Prior art keywords
- plasma
- semiconductor device
- shock wave
- tube
- projected material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 28
- 230000035939 shock Effects 0.000 claims abstract description 36
- 238000000034 method Methods 0.000 claims abstract description 11
- 239000003990 capacitor Substances 0.000 claims abstract description 8
- 239000004020 conductor Substances 0.000 claims description 4
- 230000001141 propulsive effect Effects 0.000 claims description 2
- 238000002955 isolation Methods 0.000 abstract description 7
- 239000000463 material Substances 0.000 abstract 4
- 238000009792 diffusion process Methods 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明(飄 半導体装置の平坦化法に関するものである
。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for planarizing a semiconductor device.
従来の技術
従来 素子分離技術において、03ELO(offse
t 1ocal oxidation)素子分離法があ
る力丈 上記03ELO素子分離法では パターニング
された熱酸化膜及び5isNa膜及びCVD酸化膜の積
層構造に対し ストレス緩和のための熱酸化膜を介せず
く 直像 5isNa膜及びCVDI!化膜を形成し
上記形成後、異方性エツチング技術により、積層マスク
層端部の段差を利用して、Si*N4膜とCVD酸化膜
から構成される側壁を投法 フィールドイオン注入を行
な一\ さら番ζ 続いてCVD酸化膜を除去した微
選択酸化を行なっていた このよう頓 05ELO素子
分離法について(友 例えば 超高速ディジタルデバイ
ス・シリ−X 超高速MOSデバイス; 培風館(19
86年)第140頁から第141頁に記載されていも第
2図は03ELO素子分離法の一例であも第2図におい
て、24は第1SiOa、25は第2SisNaの突起
1扱 26はSiO2,27はホウ素イオン注入部であ
ム
発明が解決しようとする課題
ところ力丈 上記08ELO素子分離法を用いて素子分
離領域を形成した結果 第2図に示すように選択酸化の
ため第2SisN4膜の突起物25が残留してしまう。Conventional technology Conventional In element isolation technology, 03ELO (offse
In the above 03ELO element isolation method, direct image 5isNa is removed for the layered structure of patterned thermal oxide film, 5isNa film, and CVD oxide film without intervening the thermal oxide film for stress relief. Membranes and CVDI! Forms a chemical film
After the above formation, field ion implantation is performed using the anisotropic etching technique to form sidewalls consisting of the Si*N4 film and the CVD oxide film by utilizing the step at the end of the laminated mask layer. Next, the CVD oxide film was removed.
Regarding the 05ELO element isolation method (for example, ultra-high-speed digital device Series-X ultra-high-speed MOS device; Baifukan (19
Although it is described in pages 140 to 141 (1986), Fig. 2 is an example of the 03ELO element isolation method. 27 is a boron ion implanted part, and the problem to be solved by the invention is strength.As shown in FIG. Object 25 remains.
突起物25は液体による洗浄では除去しにくく、そのた
取 上記突起物上部にAI (アルミニウム)配線を
施す場色 配線の段切れ等を起こし ひいては電気的特
性に悪影響を及ぼすという課題があっ九
本発明ζよ 上述の課題に鑑みて為されたもので、簡単
な方法で突起物を除去できる半導体装置の平坦化法を提
供することを目的とすも
課題を解決するための手段
本発明(よ 上述の課題を解決するためへ 駆動プラズ
マを生成するための電磁駆動T字型衝撃波豫 上部電極
下部電極 コンデンサ・パン久真空スイッチ及びパル
ス発生器と、前記駆動プラズマに推進力であるローレン
ツ力を加え 衝撃波及び衝撃波プラズマを生成するため
の帯状導体(バックストラップ)とを備えた装置におい
て、前記装置内に突起物のある半導体装置を固定させ、
前記衝撃波及び衝撃波プラズマを用いて前記半導体装置
の平坦化を行なった後、不要となった前記半導体装置の
突起物及び衝撃波プラズマの試料となった試料ガスを排
気させるという構成を備えたものであも
作用
本発明は上述の構成によって、数個のコンデンサと充電
回路からなるコンデンサ・バンクに蓄えられた電荷をパ
ルス発生器によって真空スイッチを始動させることによ
り、上部電極と下部電極間に高電圧による電子なだれを
誘引し いわゆるプラズマを生成させ& −4バック
ストラップによりできる磁場Bと、プラズマが生成した
ことによる電流Iの相互作用によってローレンツ力Fを
引き起こさせ、ローレンツ力Fを推進力としてプラズマ
を電磁駆動T字型衝撃波管左部に押し出させも プラズ
マを駆動プラズマ(ピストンの役目をする)として、駆
動プラズマ前方の気体を押しだす際へ 駆動プラズマの
前方に衝撃波及び衝撃波プラズマが発生ず41撃波及び
衝撃波プラズマを突起物のある半導体装置上部に通過さ
せ、衝撃波及び衝撃波プラズマの力を利用して、半導体
装置の不要な突起物を除去させることができもまた 除
去した突起物及び衝撃波プラズマの試料となったガス(
上 直ちに排気口から排気することができも
実施例
以下本発明の一実施例について図面を参照しながら説明
する。The protrusions 25 are difficult to remove by cleaning with liquid, and when removing them, there is a problem that when applying AI (aluminum) wiring above the protrusions, the protrusions 25 may cause breaks in the wiring, which in turn may adversely affect the electrical characteristics. Invention ζ The present invention has been made in view of the above-mentioned problems, and its purpose is to provide a method for planarizing a semiconductor device that can remove protrusions in a simple manner. In order to solve the above problems, an electromagnetic drive T-shaped shock wave for generating a driving plasma, an upper electrode, a lower electrode, a capacitor, a vacuum switch, a pulse generator, and a Lorentz force, which is a propulsive force, is applied to the driving plasma. A device comprising a belt-shaped conductor (backstrap) for generating shock waves and shock wave plasma, in which a semiconductor device having a protrusion is fixed within the device;
The semiconductor device is configured to planarize the semiconductor device using the shock wave and shock wave plasma, and then exhaust the unnecessary protrusions of the semiconductor device and the sample gas that became the sample of the shock wave plasma. According to the above-described configuration, the present invention utilizes a high voltage between the upper and lower electrodes by triggering a vacuum switch using a pulse generator to activate the charge stored in a capacitor bank consisting of several capacitors and a charging circuit. Attracts an electron avalanche and generates so-called plasma & -4 The interaction between the magnetic field B created by the backstrap and the current I caused by the plasma generation causes the Lorentz force F, and the plasma is electromagnetically generated using the Lorentz force F as a driving force. The plasma can also be pushed out to the left of the driving T-shaped shock wave tube When the plasma is used as a driving plasma (acts as a piston) and the gas in front of the driving plasma is pushed out, a shock wave and shock wave plasma are not generated in front of the driving plasma, resulting in 41 shock waves. It is also possible to remove unnecessary protrusions from the semiconductor device by passing shock wave plasma over the top of the semiconductor device that has protrusions and using the power of the shock waves and shock wave plasma. The gas (
EXAMPLE 1 Hereinafter, an example of the present invention will be described with reference to the drawings.
第1図は本発明の一実施例における半導体装置の平坦化
を説明するための装置の構成断面図であム 第1図にお
いて、 1は電磁駆動1字型衝撃波管、 2は突起物の
ある半導体装に3は真空チャッ久 4は半導体装置搬入
U2.5は排気0,6は排気用ボン″j、7は拡散ボン
ズ 8はガス・ボンベ 9はガス供給弁、10は圧力i
t 11は真空圧力比 12は上部電極 13は下部
電極 14はコンデンサ・パン久 15は真空スイッチ
、16はパルス発生器17は帯状導体(バックストラッ
プ)、18は試料ガス注入Fl 19はプラズマ生成
による電流■、20は磁場&21はローレンツ力F、2
2は駆動ブラズス 23は衝撃波及び衝撃波プラズマで
あも以上のように構成された装置を用いて、半導体装置
の平坦化法について、以下にその動作を説明すも
ま哄 半導体装置搬入口4から上記08ELO素子分離
法等で形成された突起物のある半導体装置2を搬入し
電磁駆動1字型衝撃波管1内に設置された真空チャック
3て 突起物のある半導体装置2を固定すも その後、
直ち鳳 排気用ポンプ6及び拡散ポンプ7を用いて、電
磁駆動1字型衝撃波管1の内部を真空状態(1x 10
−’[Torr]程度)にすa その際の真空度を真空
圧力計11で確認すも 上記確認抵 衝撃波及び衝撃波
プラズマ23の試料ガスをガス・ボンベ8よりガス供給
弁9及び圧力計10を用いて、試料ガス注入口18から
上記電磁駆動1字型衝撃波管1内番−所要量(10〜1
2[Torrl程度)だけ供給すも 上記試料ガス供給
機 数個のコンデンサと充電回路からなるコンポンプ・
バンク14に充電(12[kV]程、度)を行なう。FIG. 1 is a cross-sectional view of the structure of an apparatus for explaining planarization of a semiconductor device in an embodiment of the present invention. In FIG. 1, 1 is an electromagnetically driven single-shaped shock tube; 3 is a vacuum chuck for the semiconductor device, 4 is a semiconductor device carry-in U2.5 is an exhaust 0, 6 is an exhaust bomb "j, 7 is a diffusion bomb, 8 is a gas cylinder, 9 is a gas supply valve, 10 is a pressure i
t 11 is the vacuum pressure ratio, 12 is the upper electrode, 13 is the lower electrode, 14 is the capacitor, 15 is the vacuum switch, 16 is the pulse generator 17 is the strip conductor (back strap), 18 is the sample gas injection Fl, 19 is due to plasma generation Current ■, 20 is magnetic field & 21 is Lorentz force F, 2
2 is a driving plasma 23 is a shock wave and a shock wave plasma The operation of the planarization method for semiconductor devices using the device configured as described above will be explained below. Semiconductor device 2 with protrusions formed by 08ELO element isolation method etc. is brought in.
A vacuum chuck 3 installed in the electromagnetically driven single-shaped shock tube 1 is used to fix the semiconductor device 2 with protrusions.
Using the exhaust pump 6 and the diffusion pump 7, the inside of the electromagnetically driven single-shaped shock wave tube 1 is brought into a vacuum state (1 x 10
-' [Torr] degree) The degree of vacuum at that time is confirmed using the vacuum pressure gauge 11. using the sample gas inlet 18 to inject the required amount (10 to 1
The above sample gas supply device is a comp pump consisting of several capacitors and a charging circuit.
The bank 14 is charged (approximately 12 [kV], degrees).
上記充電後、パルス発生器16によって真空スイッチ1
5を始動させ、上部電極12と下部電極13間で放電を
開始させる。上記放電開始後、電子なだれによるプラズ
マが発生す& −人 上記プラズマが発生したこと
によって、プラズマ生成による電流119が流れも 電
流119をバックストラップ17上に通過させることに
より磁場B20を発生させもその結果 上記プラズマに
(瓜 プラズマ生成による電流119と磁場B20の相
互作用による強力なローレンツ力F21が矢印の方向に
作用し ローレンツ力F21を推進力として、上記プラ
ズマ(′!、電磁電磁駆動型字型衝撃波管1部に押し上
られ 駆動プラズマ22となも 駆動プラズマ22力丈
さらにローレンツ力F21及び上記プラズマによって
押し進められると、駆動プラズマ22の前方に強力な衝
撃波及び衝撃波プラズマ23が生成されも本発明で(よ
上記衝撃波を用いて、上記電磁駆動1字型衝撃波管1
の内部に固定された突起物のある半導体装置2の不要と
される突起物を吹き飛ばり、 if撃波に続く衝撃波
プラズマによって、上記突起物除去後の半導体装置を洗
浄する。つまり、突起物のある半導体装置の平坦化を行
(\ 上記洗浄後、直ちに 上記突起物と上記衝撃波及
び衝撃波プラズマの試料ガスを排気用ポンプ6及び拡散
ポンプ7によって排気することができも発明の効果
以上の説明から明かなように 本発明によれζ瓜03E
LO素子分離法等で形成された半導体装置の不要な突起
物を衝撃波及び衝撃波プラズマを用いて除去することが
でき、簡単な方法で半導体装置の平坦化ができ、平坦化
後のプロセスの均一化を容易にし ひいてにLAI配線
の断線等を引き起こす原因を除去することになり、実用
上 極めて価値の高いものであaAfter the above charging, the vacuum switch 1 is activated by the pulse generator 16.
5 is started, and discharge is started between the upper electrode 12 and the lower electrode 13. After the start of the discharge, plasma is generated due to the electron avalanche. Due to the generation of the plasma, a current 119 due to plasma generation flows. Result A strong Lorentz force F21 due to the interaction between the current 119 generated by the plasma and the magnetic field B20 acts on the above plasma in the direction of the arrow. When the driving plasma 22 is pushed up into the first part of the shock wave tube and further pushed forward by the Lorentz force F21 and the above plasma, a strong shock wave and shock wave plasma 23 are generated in front of the driving plasma 22. (Yo) Using the above shock wave, the above electromagnetic drive single-shaped shock wave tube 1
The unnecessary protrusions of the semiconductor device 2 having protrusions fixed therein are blown away, and the semiconductor device after the protrusions have been removed is cleaned by shock wave plasma following the IF bombardment wave. In other words, the semiconductor device having protrusions can be planarized (\ After the above cleaning, the protrusions, the shock wave, and the sample gas of the shock wave plasma can be immediately evacuated by the exhaust pump 6 and the diffusion pump 7. As is clear from the explanation above, the present invention provides
Unnecessary protrusions on semiconductor devices formed by LO element isolation methods can be removed using shock waves and shock wave plasma, and semiconductor devices can be planarized with a simple method, making the process after planarization more uniform. This is extremely valuable in practical terms, as it facilitates the process and eliminates the causes of disconnections in LAI wiring.
第1図は本発明の一実施例における半導体装置の平坦化
法を説明するための装置の構成断面諷第2図は同実施例
の試料として用いられる05ELO素子分離法で形成さ
れた突起物のある半導体装置の例を示した断面図であa
1・・・電磁駆動1字型衝撃波管、 2・・・突起物の
ある半導体装置 3・・・真空チャッ久 5・・・排気
112・・・上部型! 13・・・上部電極14・・
・コンデンサ・パン久 15・・・真空スイッチ、16
・・・パルス発生像17・・・帯状導体(バックストラ
ップ)、19・・・プラズマ生成による電流1.20・
・・磁場&21・・・ローレンツ力F、22・・・駆動
プラズス 23・・・衝撃波及び衝撃波プラズマ。FIG. 1 is a cross-sectional view of the structure of a device for explaining a planarization method for a semiconductor device in one embodiment of the present invention. 1 is a cross-sectional view showing an example of a certain semiconductor device.・Upper type! 13... Upper electrode 14...
・Capacitor Pankyu 15...Vacuum switch, 16
...Pulse generation image 17...Strip conductor (backstrap), 19...Current due to plasma generation 1.20.
...Magnetic field &21...Lorentz force F, 22...Driving plasma 23...Shock wave and shock wave plasma.
Claims (1)
、上部電極、下部電極、コンデンサ・パンク、真空スイ
ッチ及びパルス発生器と、前記駆動プラズマに推進力で
あるローレンツ力を加え、衝撃波及び衝撃波プラズマを
生成するための帯状導体(バックストラップ)とを有す
る装置において、前記装置内に突起物のある半導体装置
を固定させ、前記衡撃波及び衡撃波プラズマを用いて前
記半導体装置の平坦化を行なった後、不要となった前記
半導体装置の突起物及び衡撃波プラズマの試料となった
試料ガスを排気させることを特徴とする半導体装置の平
坦化法。An electromagnetically driven T-shaped balanced wave tube, an upper electrode, a lower electrode, a capacitor puncture, a vacuum switch, and a pulse generator are used to generate a driving plasma, and a Lorentz force as a propulsive force is applied to the driving plasma to generate a shock wave and In an apparatus having a belt-shaped conductor (backstrap) for generating shock wave plasma, a semiconductor device having a protrusion is fixed in the apparatus, and the equilibrated wave and the equilibrated wave plasma are used to flatten the semiconductor device. 1. A method for planarizing a semiconductor device, which comprises exhausting unnecessary protrusions of the semiconductor device and a sample gas serving as an acoustic wave plasma sample.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14044889A JPH034537A (en) | 1989-06-01 | 1989-06-01 | Flattening of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14044889A JPH034537A (en) | 1989-06-01 | 1989-06-01 | Flattening of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH034537A true JPH034537A (en) | 1991-01-10 |
Family
ID=15268860
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14044889A Pending JPH034537A (en) | 1989-06-01 | 1989-06-01 | Flattening of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH034537A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7215697B2 (en) * | 1999-08-27 | 2007-05-08 | Hill Alan E | Matched impedance controlled avalanche driver |
-
1989
- 1989-06-01 JP JP14044889A patent/JPH034537A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7215697B2 (en) * | 1999-08-27 | 2007-05-08 | Hill Alan E | Matched impedance controlled avalanche driver |
US7489718B2 (en) | 1999-08-27 | 2009-02-10 | Hill Alan E | Matched impedance controlled avalanche driver |
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