JPH0345344B2 - - Google Patents

Description

Detailed Description of the Invention The present invention provides a power transmission line consisting of three terminals, by calculating the impedance up to the fault point using the measured values of voltage and current detected at each terminal when a fault occurs. This paper relates to a fault point locating method for locating distance.

When a failure occurs in a system with electrical stations A, B, and C as shown in Figure 1, knowing the distance or location from points A, B, and C to the failure point is essential for determining the location of the subsequent failure location. It is necessary and essential for repair work, etc. For this reason, devices have been developed that can measure the location of the failure point, but the current devices measure the propagation time of the traveling wave that occurs when a failure occurs.

(b) Artificially applying a traveling wave when a failure occurs,
The time until the reflected wave is received is measured.

(c) Measure impedance using commercial frequency voltage and current.

etc.

However, methods (a) and (b) require special equipment, and in high-resistance grounding systems or arc-extinguishing reactor systems, the traveling waves generated on the line are distorted by various factors, so it is necessary to It has been reported that it is difficult to measure. On the other hand, in the case of method (c), since the measuring device is installed at the A terminal, B terminal, or C terminal in FIG. 1, the measurement is performed based on the voltage and current at that terminal. Now, since the failure is simple, assuming a three-phase short circuit at point F, the equivalent circuit shown in FIG. 2 is established. In addition, in the following explanation,
All electrical quantities are vector quantities unless otherwise stated. In the equivalent circuit of FIG. 2, if E _A = E _B = E _C , the current flowing through the circuit is only the fault component and is a positive sequence current. Fault resistance due to arc etc. at the fault point
R _F exists and fault current flows into it from each end
I _1A , I _1B , and I _1C will flow. The relationship between voltage and current at terminal A can be expressed as follows: V _1A = Z _1A1 ·I _1A + R _F (I _1A + I _1B + I _1C ) (1). Calculating the impedance z _A from this, z _A = V _1A I _1A = Z _1A1 + R _F (1 + I _1B + I _1C / I _1A ) ...(2), and in addition to the positive sequence impedance up to the fault point, R _F (1 + I _1B + I _1C / I _1A ) will be introduced and will contain an error. If R _F (1 + I _1B + I _1C / I _1A ) is a pure resistance, then by separating only the reactance of Z _A , the distance to the failure point can be measured from the point where the reactance is proportional to the distance, but R _F
(1 + I _1B + I _1C / I _1A ) includes I _1B and I _1C , so if the impedance configuration on the B and C ends is different from the A end, it cannot be treated as a resistance component and an error will occur. Become.

Since in actual case E _A ≠E _B ≠E _C
It is almost impossible for the phases of I _1A , I _1B and I _1C to match, and it is difficult to correct the error.

Furthermore, finding the impedance z _B seen from the B end, V _1B = Z _1B・I _B + Z _1A2 (I _1B + I _1C ) + R _F (I _1A + I _1B + I _1C ) ...(3) ∴z _B = V _1B /I _1B =Z _1B +Z _1A2 (1+I _1C /I _1B ) + R _F (1+I _1A +I _1C /I
_1B ) ...(4) Finding the impedance z _C seen from the C end, V _1C = Z _1C・I _1C + Z _1A2 (I _1B + I _1C ) + R _F (I _1A + I _1B + I _1C ) ...(5) ∴ Z _C = Z _1C + Z _1A2 (1 + I _1B / I _1C ) + R _F (1 + I _1A + I _1B / I _1C )
...(6) and the impedance is measured respectively,
The error term is definitely more than z _A.

In view of the above, an object of the present invention is to provide a failure point locating method using a measurement method that does not produce an error such as the second term in equation (2) above using commercial frequency voltage and current.

The present invention is based on the following principle.
Now, if the positive-sequence voltage and current measured at each terminal at the other two terminals are obtained by transmission, etc., then the impedance that does not include the fault resistance R _F can be determined. First, when the fault point is between the A terminal and the branch point, the fault resistance R _F can be expressed as follows from equations (1), (3), and (5).

_{R R _ _ _ _ _ _ _ _ _ _ _ _ _ _ 1C}
...(3') R _F = V _1C −Z _1C・I _1C −Z _1A2 (I _1B + I _1C )/I _1A + I _1B + I _1C
...(5') Since the fault resistance R _F is unknown, the following equation is established by eliminating the fault resistance R _F using equations (1') and (5').

V _1A −Z _1A1・I _1A /I _1A +I _1B +I _1C =V _1C −Z _1C・I _1C −Z _1A2 (I _1B +I _1C ) /I _1A +I _1B +I _1CHere , Z _1A =Z _1A1 +Z _1A2 Therefore, by substituting Z= _1A2 =Z _1A −Z _1A1 into this equation, we can calculate the impedance from terminal A to the fault point.
To summarize Z _1A1 , the following formula holds true.

Z _1A1 = V _1A −V _1C +Z _1C・I _1C +Z _1A (I _1B + I _1C )/I _1A + I _1
B + I _1C ... (7) In equation (7), V _1A , V _1C , I _1A , I _1B , I _1C are the voltage and current values measured at each terminal, and Z _1A and Z _1C are Since these values are known, the impedance from the A terminal to the fault point Z _1A1
can be found.

If the fault point is between the B terminal and the branch point, the impedance from the B terminal to the fault point Z _1B1
can be obtained using the following equation in the same way as equation (7).

Z _1B1 = V _1B −V _1A +Z _1A・I _1A +Z _1B (I _1A + I _1C ) / I _1A + I _1
B + I _1C (8) Similarly, when the fault point is between the C terminal and the branch point, the impedance Z _1C1 from the C terminal to the fault point can be calculated using the following equation.

Z _1C1 = V _1C −V _1B +Z _1B・I _1B +Z _1C (I _1A + I _1B )/I _1A + I _1
B + I _1C ...(9) Therefore, if the positive sequence voltage and current of each terminal can be transmitted to the other terminal, the impedance up to the failure point can be measured using equations (7), (8), and (9). Become.
Since the impedance is the same along the line, it is easy to calculate the distance.

When calculating the impedance from the A terminal to the fault point using equation (7), if there is a fault point F between the A terminal and the branch point as shown in FIG. 1, the fault point can be identified. On the other hand, when calculating the impedance from the C terminal to the fault point using equation (9), as shown in Figure 1, when the fault point F is between the A terminal and the branch point, and when the fault point F is between the B terminal and the branch When there is a fault point F' between the two points, the same impedance may be exhibited, and this poses a problem in that the fault point cannot be identified. This is a similar problem when the failure point is located other than between the A terminal and the branch point when viewed from the A terminal. Therefore, in order to correctly locate the fault point, it is necessary to use equations (7), (8), and (9) depending on the location of the fault point.

Next, an example of determining in which section divided by each terminal and a branch point a failure point exists will be explained.
Now, assuming a failure at point F in Figure 1, (7),
Between the impedances Z _1A1 , Z _1B1 , Z _1C1 from each terminal to the failure point F calculated by equations (8) and (9) and the known impedances Z _1A , Z _1B , Z _1C , | Z _1A1 | < | Z _1A | | | Z _1B1 | > | Z _1B | | Z _1C1 | > | Z _1C |...(10) holds true. In other words, if there is a fault point between the A terminal and the branch point, the impedance obtained from the A terminal using the location calculation formula will have a smaller absolute value than the impedance from the A terminal to the branch point. On the other hand, each impedance obtained from the B and C terminals using the orientation calculation formula has a larger absolute value than each impedance from the B and C terminals to the branch point.

Similarly, if there is a fault point between the B terminal and the branch point, the following relationship holds true.

｜Z _1A1 ｜＞｜Z _1A ｜ ｜Z _1B1 ｜＜｜Z _1B ｜ ｜Z _1C1 ｜＞｜Z _1C ｜……(11) Similarly, there is a failure point between the C terminal and the branch point. In this case, the following relationship holds true.

｜Z _1A1 ｜＞｜Z _1A ｜ ｜Z _1B1 ｜＞｜Z _1B ｜ ｜Z _1C1 ｜＜｜Z _1C ｜……(12) Therefore, when locating the fault point, use equations (10) and (12). It can be seen that the failure point can be easily located by using any of equations (7), (8), and (9) according to the judgment used.

Various techniques for measuring the amount of electricity at the other end have been announced so far, but it is said to be nearly impossible to measure while maintaining synchronization between both ends due to the time delay in transmission, and even if it were possible, it would be extremely difficult to do so. This had to be expensive and was considered impractical.

Today, as the application of optical fibers advances, the time has come to solve the problem of transmission lines, but practical proof has not yet been obtained. The present invention takes this reality into account, considers the purpose of failure point locating and how it is used, and takes advantage of the fact that data does not necessarily have to be transmitted and calculated instantaneously. By doing so, the data used in the calculations based on equations (7), (8), and (9) are transferred and the calculation equations are used to locate the fault point.

In other words, fault location is not a protective device.
There is no problem in obtaining results even if there is a delay of several minutes after the failure occurs. This time tolerance is what allows the invention to become a reality.

The present invention will be explained in detail below based on embodiments shown in the drawings.

FIG. 3 is an explanatory diagram using waveforms to explain the transient state of the positive-sequence voltage and current when a failure occurs.
Figure 3a shows the measured values during a failure in the circuit of Figure 1, Figure 3b shows the clock signal that advances the measurement operation, and Figures 3c, d,
e, f, g, and h respectively indicate the positive sequence voltage and current at the A terminal, the positive sequence voltage and current at the B terminal, and the positive sequence voltage and current at the C terminal.

As shown in Figure 3, if a three-phase short circuit occurs at time _T1 , the positive sequence voltage and current at that time will be
If the changes shown in Figures c to h occur and the fault is removed by opening the circuit breakers at each end at time _T2 , the voltage will return to its original state and the current will become zero.

Figure 4 shows an example of the process of measuring such a phenomenon at each end, receiving each at the other terminal, and obtaining measured values that clarify the mutual phase relationship from the separately measured values at each end. shown and explained below.

FIG. 4 shows an embodiment of a waveform recording and transmission device installed at three terminals A, B and C.
In the figure, 1 and 2 are analog-to-digital converters (hereinafter referred to as A/D converters), 3 is a comparator, 4 is a counter, 5 is a cyclic memory, and 6
is an AND gate circuit, 7 is a measurement/transmission circuit, 8 is a current transformer for detecting the grid current, and 9 is a transformer for detecting the grid voltage. The current and voltage detected by the current transformer 8 and the transformer 9 are transferred to the A/D converters 1 and 2.
The signals are simultaneously sampled and analog-digital converted in synchronization with the clock. Even now, the A/D converters 1 and 2 can use elements having a conversion speed of about 50,000 points/second, so they can measure the instantaneous value of the target electrical quantity at a sufficiently high speed. In FIG. 4, only the processing circuit after A/D converter 1 is described, but the same processing circuit is connected to A/D converter 2 as well. Only the processing of output 1 will be explained.

The output signal A of the A/D converter 1 becomes a digital value and is transmitted to the comparator 3 and the AND gate circuit 6. The cyclic memory 5 outputs the previously measured and stored data to the comparator 3 as an output signal. The comparator 3 compares the output signal A sent as the current measured value from the A/D converter 1 with the output signal B sent as the previous measured value from the cyclic memory 5, and sets the difference between the two signals. If the value is exceeded, an output signal C is output. This set value is set to such a value that the change does not occur during normal operation. Although a phenomenon in which the set value is exceeded occurs even when there is no malfunction, since it is designed to work at least when there is a malfunction, the intended function is fully demonstrated. In other words, when operating in a healthy state, it is only necessary to avoid using it because only measurement results are produced and no failures are detected due to other phenomena.

When the comparator 3 detects an abnormal change, the output signal C is applied to the counter 4, and the counter 4 is driven.
Counter 4 starts counting the clock signal,
When the count value exceeds a certain value, the count is increased and the output signal 2 becomes "0". On the other hand, an output signal D from the counter 4 is applied to the AND gate circuit 6 in addition to the output signal from the A/D converter 1. Therefore, the AND gate circuit 6 guides the inputted output signal A to the cyclic memory 5 as the output signal H until the counter 4 counts up and the output signal D becomes "0". As a result, the cyclic memory 5 sequentially cyclically stores the output signal A of the A/D converter 1 until the output signal D is output. When the output signal d is output, the AND gate circuit 6 is closed and the storage operation is stopped.
Therefore, the area of the cyclic memory 5 is large enough to prevent the stored value of the output signal A of the A/D converter 1 when the comparator 3 detects an abnormal change from being replaced by new measured value data. Requires. This can be adjusted by the sampling time and the counting time of the counter 4. That is, for example, when the counter 4 counts up in 1 second, the A/D converter 1 converts 50,000 points/
If it is seconds, then the area of cyclic memory 5 is
Requires 50001 points or more.

The output signal d of the counter 4 is an AND gate circuit 6
In addition to this, it can also be added to the measurement/transmission circuit 7. The measurement/transmission circuit 7 is notified by the output signal N that the storage operation of the cyclic memory 5 has stopped, so upon receiving the output signal N, the measurement data stored in the cyclic memory 5 is transmitted. While sequentially scanning from the first stored address to the last stored address, search for measured value data when an abnormal change occurred by comparing the previous value and current value in the same way as detected by comparator 3. do. When abnormal value measurement data is detected, it is stored in the first memory area of an internal memory (not shown). After that, the measured value data stored at the address corresponding to π/2 of the cycle of the measured quantity is extracted from the cyclic memory 5 and sequentially stored in the internal memory mentioned above. This operation is repeated until the last measured value data in the cyclic memory 5. Here, the reason why we are trying to use data every π/2 is that if we measure data every π/2, as shown in Japanese Patent Publication No. 48-25676, then we can This is because by providing a device that squares the sum of the powers, the maximum value of the amount of AC electricity can be detected. Then, if this maximum value is V and the measured value data value is V ₁ , the phase Θ of this measured value data is Θ=Sin ^-1 (V ₁ /V)
It can be found as However, the range is −π/2≦Θ≦π/2.

FIG. 5 is a sampling waveform diagram of the voltage and current at the three terminals A, B and C to explain the above operation, and FIG. 5 a and b are respectively the terminal A.
The voltage sampling waveform V _1A and the current sampling waveform I _1A at terminal B are shown in FIG. 5c and d, respectively.
V _1B , current sampling waveform I _1B , Figure 5 e and f are voltage sampling waveforms at terminal C, respectively.
V _1C , the current sampling waveform I _1C is shown. As shown in Figure 5 a, when an abnormality occurs at point P _A0 , each waveform V _1A , I _1A , V _1B , I _1B and V _1C , I _1C undergoes a rapid change as shown in Figure 5 a to f. do. This change is detected by the comparator 3 shown in FIG. 4, and the subsequent sampling values of each waveform are stored in their own cyclic memory 5 as measured value data for the time set in the counter 4. The measurement/transmission circuit 7 sequentially reads out the measurement data stored in the cyclic memory 5 and performs the same comparison as the comparator 3, so the measurement data at point P _A0 is stored in the first area of the internal memory. After that, the measured value data for each π/2, that is, the measured value data for P _A1 , P _A2 , P _A3 , etc., is stored in the second area and the third area of the internal memory, as shown in Figure 5a. area, the fourth area, and so on. Depending on the sampling interval, there may be no stored value at a position J degrees π/2 from the abnormal point, but since the sampling interval can be made extremely short (for example, 50,000 points/second), the values to be used are the values before and after the relevant time. Even the average value of the numerical values can be used. Alternatively, the following method may also be considered. In other words, the number of sampling points per second (for example, 50,000 points/second) and the system frequency (50Hz
or 60Hz), the phase Θ ₀ of one sampling interval can be determined in advance, and if the reading interval of two sampling values read out from the cyclic memory 5 is A, then the two sampling values read out. The phase difference Θ ₁ of the values is A×Θ ₀ .
Here, the peak values of two sampling values having a phase difference relationship within π are V ₁ and V ₂ , and the phases are Θ and Θ+
Θ ₁ , and if the peak value of the original sine wave is V, then V ₁ = VSin Θ, V ₂ = VSin (Θ + Θ ₁ ) (however, Θ ₁ = A × Θ ₀ is known), and from these two equations, V By eliminating , the following formula holds true.

V ₂ SinΘ=V ₁ Sin (Θ+Θ ₁ ) = V ₁ (SinΘCosΘ ₁ +CosΘSinΘ ₁ )...(13) When this equation (13) is solved, the following equation holds true.

SinΘ／CosΘ＝tanΘ＝V ₁ SinΘ ₁ /V ₂ −CosΘ ₁ ... (14
) In equation (14), since V ₁ , V ₂ , and Θ ₁ are known, the phase Θ of the sampling value can be determined, and the peak value V of the original sine wave can also be determined from V ₁ /SinΘ. . Therefore, a sampling value separated by phase π/2 from the sampling value of phase Θ can be created as VSin (Θ+π/2). However, in this case, it goes without saying that the phase relationship between voltage and current must be reproduced using measured value data at the same time. Note that by locking the comparator 3 when the counter 4 counts up and the output signal 2 becomes "0", the period during which the measurement/transmission circuit 7 is reading the measured quantity data from the cyclic memory 5 is Comparator 3 is locked. And measurement
When the transmission circuit 7 finishes reading the measured value data from the cyclic memory 5, an output signal is output, and the lock on the comparator 3 is released and the counter 4
is reset and the output signal D becomes "1". As a result, the conversion by the A/D converter 1 and the storage in the cyclic memory 5 are restarted.

The measurement/transmission circuit 7 outputs the output signal Q, and at the same time uses the transmission function to sequentially output the aforementioned measured value data stored in the internal memory as the output signal L to the other end. FIG. 6 shows an example of the transmission format of the output signal. Data 1, data 2, . . . are sent in order from the first measured value data stored in the internal memory. At this time, in order to enable the other end (receiving side) to identify that it is the desired data, start information is
It is possible to add idNo at the beginning. Similarly, it is easy to add an idNo to the end of the final data to notify the end of the data.

On the receiving side of this information, measurement value data measured at the own end can be similarly processed and transmitted to the other end. The relationship between the measurement value data of the other end and the measurement value data of the own end obtained in this way is that each measurement value data in the same order is obtained at the same time. Therefore, from these values and relationships, the voltages V _1A , V _1B , and V _1C currents I _1A ,
The relative phase and peak values of I _1B and I _1C can be calculated, so if you build a device that calculates them, you can calculate (7), (8), (9), (10), (11), (12 ) becomes possible, and the target impedance can be measured and used for distance measurement.

In the above embodiments, a singular point indicating the occurrence of an accident is detected, and a predetermined number of subsequent measured value data are obtained using this singular point as a reference. It is also possible to synchronize and use measurement value data stored before this singular point as a reference. That is, at the time of recovery from the accident, the measured value data changes as shown at time _T2 in FIG. 3, which can be detected by the comparator 3 in FIG. Since the comparator 3 outputs the signal C both when an accident occurs and when the accident is restored, the counter 4 is configured to count the signal C, and when two signals C are counted, the signal D is set to "0". The structure shall be such that According to such a configuration, the AND gate circuit 6 is closed at the time of recovery from the accident, and the cyclic memory 5 stops after storing the measured value data at the time of recovery from the accident. Therefore, it is only necessary to synchronize and use the measured value data stored before the singular point based on the measured value data at the time of accident recovery. Furthermore, when using the singular point that indicates recovery from an accident as a reference, there are fewer transients included in the measured value data than when using the singular point that indicates the occurrence of an accident as a reference, so it is easier to locate the failure point accurately. can.

In the above explanation, we have explained how to calculate the positive sequence impedance by taking a three-phase short circuit as an example. However, in other failures, unique symmetrical components occur, so if you select the symmetrical component according to the fault, you can calculate the positive sequence impedance. All impedances are expressed by terms that are proportional to distance and known terms, such as neutral point grounding resistance, so distances can be determined by using only terms that are proportional to distance. . In addition, in the case of three terminals, we have explained that the distance is calculated and known by each terminal by transmitting and receiving alternately, but it is also possible to transmit from each terminal to a completely unrelated reception point and then know the measured value data of each terminal. It is also possible to calculate the distance by calculating,
It is also possible to calculate the distance by intensively collecting and calculating information from the other two terminals at only one terminal.

[Brief explanation of drawings]

Figure 1 is a model diagram of a three-terminal, one-line power transmission line, Figure 2 is a representation of the positive phase branch circuit using the symmetric coordinate method when a three-phase short circuit fault occurs at the lower point of the system in Figure 1;
Fig. 3 is an explanatory diagram using waveforms to explain the transient state of the positive-sequence voltage and current when the fault occurs, and Fig. 4 shows the waveforms installed at each terminal to realize the fault location method according to the present invention. An embodiment of a waveform recording and transmission device, FIG. 5 is a waveform diagram for explaining the operation of the device according to the embodiment of FIG. 4, and FIG. 6 shows a transmission format of a signal transmitted to the other end. . 1, 2: Analog-digital converter, 3: Comparator, 4: Counter, 5: Cyclic memory,
6: AND gate circuit, 7: Measurement/transmission circuit.

Claims (1)

[Scope of Claims] 1. In a power transmission line consisting of three terminals, various measured values obtained by sampling the AC voltage and current of each terminal are stored separately, and are stored when an accident occurs (or when an accident is recovered). To obtain each synchronized measured value from the various measured values stored with reference to the singular point indicating the occurrence of an accident (or recovery from the accident) for each measured value, and calculate the relative phase of each determined measured value. For each terminal, the voltage and current vector values sampled at own terminal A are V _1A and I _1A , and the voltage and current vector values sampled at other terminals B and C are respectively
V _1B , I _1B , V _1C , I _1C , if the impedance from own terminal A to the branch point is Z _1A and the impedance from other terminals B and C to the branch point are Z _1B and Z _1C respectively, then own terminal A impedance from to the point of failure
Z _1A1 = V _1A − V _1C + Z _1C・I _1C + Z _1A (I _1B + I _1C ) _/ I _1A + I _1
B + I _1C , and if the impedance Z _1A1 is smaller than the impedance Z _1A , it is determined that the fault point is in the section between own terminal A and the branch point, and based on this impedance Z _1A1 , own terminal A A failure point locating method characterized by locating the distance from to the failure point.