JPH0341882B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a magnetic recording device that records video signals using pre-emphasis.

[Conventional technology]

Conventional pre-emphasis circuits used in video tape recorders (hereinafter referred to as VTRs) suffer from large waveform distortions, and even when de-emphasis is performed in the playback system, the original waveform does not return to its original state, resulting in deterioration in image quality. FIG. 1 shows a combination of the non-linear emphasis type recording and reproducing circuit shown in Japanese Patent Application Laid-open No. 53-27415 and the noise suppression circuit shown in Japanese Patent Application Laid-open No. 142206-1982. VHS
This is a configuration commonly used in VTRs with a 6-hour recording mode.

In FIG. 1, 1 is a video signal input terminal;
2 is an AGC amplifier, 3 is a clamp circuit, 4 is a recording/playback switch (connected to the R end during recording, and the P end during playback), 5 is an adder circuit, and 6 is an adder circuit.
HPF 7 is a limiter, and 5, 6, and 7 constitute a nonlinear emphasis circuit. 8 is a linear emphasis circuit, 9 is a clip circuit, 10 is a
FM modulation circuit, 11 is a recording amplifier, 12 is a recording/playback switch, 13 is a video head, 14 is a video tape, 15 is a preamplifier, 16 is a limiter,
17 is an FM demodulation circuit, 18 is a linear de-emphasis circuit, 19 is a subtraction circuit, and 6, 7, 19
This constitutes a non-linear day emphasis circuit. 20 is an LPF, 21 is an HPF, 22 is an expansion circuit, 23 is a mixing circuit, and 20, 21, 2
2 and 23 constitute a noise suppression circuit.
24 is a buffer amplifier, and 25 is an output terminal.
For detailed operation, please refer to the above publication.

[Problem that the invention seeks to solve]

In the above conventional technology, the emphasis circuit 8 compensates for the characteristics of the de-emphasis circuit 18, and the non-linear de-emphasis circuits (6, 7, 19)
The characteristics of non-linear emphasis circuit (6, 7,
5) compensates, but the noise suppression circuit (20, 2
There is no circuit in the recording system to compensate for the characteristics 1, 22, and 23), and as a result, the reproduced signal waveform is distorted with respect to the recorded signal waveform, and the high-frequency components with small amplitudes in the reproduced signal are suppressed too much, resulting in image quality deterioration. was occurring.

An object of the present invention is to provide a magnetic recording device that effectively suppresses the above-mentioned image quality deterioration.

[Means for solving problems]

The above purpose is to treat the noise suppression circuit as a type of non-linear de-emphasis circuit, and to create a first
This is achieved by providing a non-linear emphasis circuit on the input side of a conventional second non-linear emphasis circuit. Further, in order to minimize image quality deterioration, the time constant of the high-pass filter used in the first non-linear emphasis circuit is selected to be smaller than the time constant of the high-pass filter used in the second non-linear emphasis circuit.

[Effect]

The first nonlinear emphasis circuit operates to emphasize only small amplitude high frequency components of the recording signal. Therefore, even when the recorded signal is passed through a noise suppression circuit during reproduction, the small amplitude high-frequency signal in the recorded signal is not suppressed and almost returns to its original state, making it possible to effectively suppress noise mixed in the tape head system.

Also, the first non-linear emphasis circuit
By selecting the time constant of the HPF to be smaller than the time constant of the HPF of the second nonlinear emphasis circuit, waveform distortion occurring in the recording system can be minimized.

〔Example〕

Hereinafter, the present invention will be explained using the drawings.

FIG. 2 is a block diagram showing a multi-stage emphasis circuit for explaining the principle of the present invention, and FIG.
FIG. 3 is a circuit diagram showing a specific example of the circuit shown in the figure.

FIG. 2 corresponds to the circuit parts indicated by 4, 5, 6, 7, and 8 in FIG. 1, and the terminal 26 is connected to the output terminal of the clamp circuit 3 in FIG. It is connected to the input terminal of the clip circuit 9 in FIG. In Figure 2, 28,
6, 36 are HPF, 29, 33, 37 are amplifiers,
30, 34, 38 are amplitude limiting circuits, 31, 7, 3
9 is a limiter amplifier, 32, 35, 40 are LPF,
41 is an adder circuit. 28, 31, 32, 41
is a pre-emphasis circuit, which corresponds to the linear emphasis circuit 8 in FIG. 6,7,35,4
1 is a second nonlinear emphasis circuit,
This corresponds to the nonlinear emphasis circuits 5, 6, and 7 in FIG. 36, 39, 40, and 41 constitute a first nonlinear pre-emphasis circuit. In Figure 3, C, R, Q ₁ and Q ₂ are the second
28 and 31 in the figure, C ₀ , R ₀ , Q ₃ , Q ₄ are 6 and 7,
C _N , R _N , Q ₅ , Q ₆ are 36, 39, C _L , R _L are 3
2, 35, and 40, respectively.

The first non-linear emphasis circuit attempts to compensate in advance for the high-frequency components of the video signal, which are degraded by the noise suppression circuit used in the reproduction circuit, in the recording circuit. The second non-linear emphasis circuit is a circuit in which the amount of pre-emphasis changes depending on the input signal level, and the amount of emphasis increases as the input signal level decreases. The first non-linear emphasis circuit and the second non-linear emphasis circuit have qualitatively the same characteristics. Quantitatively, the first nonlinear emphasis circuit emphasizes smaller signals and emphasizes higher frequency components.

Figure 3 is a circuit diagram that embodies the block diagram in Figure 2, and the load resistance for linear pre-emphasis, first non-linear emphasis, and second non-linear emphasis are all made common, simplifying the circuit. is planned. For this reason, LPF32, 35, 40
is also composed of only R _L and _CL .

Next, specific design examples of the pre-emphasis circuit, the first non-linear emphasis circuit, and the second non-linear emphasis circuit using FIG. 3 will be described.
It is assumed that a 1VPP video signal is applied to the input terminal 26. The voltage gain of amplifiers 29, 33, and 37, which determine the amount of emphasis in each emphasis circuit, is set to 3.
Double it. The time constants of each emphasis circuit are: pre-emphasis circuit: CR = 1.6μS (100KHz), first non-linear pre-emphasis circuit: C _N R _N =
0.16μS (1MHz), second non-linear pre-emphasis circuit: C _D R _D = 0.32μS (500KHz).

To set the voltage gain to 3, R _L = 2.7KΩ, R _E1 =
Let R _E2 = 300Ω.

The characteristics of each amplitude limiter 30, 34, 38 are I ₀ ,
Determined by the values of I ₁ and I ₂ , I ₀ = 1 mA, I ₁ = I ₂ = 0.15 m
A, the amplitude limit ranges of the first nonlinear pre-emphasis circuit and the second non-linear pre-emphasis circuit are both 0.4VPP.

The overall emphasis characteristics shown in FIG. 3 designed as described above are as indicated by 42, 42', 43, and 43' in FIG. 42 and 43 in Figure 4 are C _L in Figure 3
42' and 43' are R _L C _L =
This is the frequency characteristic when adding _CL which becomes 80nSec. When the signal applied to the terminal 26 is sufficiently small, the emphasis shown at 42 and 42' is applied, whereas when the input signal is large enough, the emphasis shown at 43 and 4 is applied.
As shown in 3', the amount of emphasis decreases.

FIG. 5 is a block diagram showing an example of a de-emphasis circuit for the emphasis circuit of FIG. 2. FIG. 5 is a reverse circuit of FIG. 2, and the signal waveform can be restored without waveform distortion. In order to make the noise that remains on the contour less noticeable,
It is desirable to select the gains of the amplifiers 44, 45, and 46 to be smaller than that of the emphasis circuit. Also, for the same reason, it is desirable that the amplitude limiting range of the amplitude limiters 47, 48, 49 be larger than that of the emphasis circuit. Note that 50, 51, and 52 are low-pass filters, 53 is a subtraction circuit, the input terminal 60 corresponds to the input of the linear de-emphasis circuit 18 in FIG.
corresponds to the output of

FIG. 6 is a block diagram showing essential parts of an embodiment of the present invention. In FIG. 6, the HPF 36, the amplifier 37, the amplitude limiter 38, the LPF 40 and the adder 55 form the first non-linear pre-emphasis circuit;
The LPF 35 and the adder 5 form the first non-linear pre-emphasis circuit, the HPF 28, the amplifier 29,
Amplitude limiter 30, LPF 32, and adder 56 each constitute a pre-emphasis circuit. The feature of FIG. 6 is that the first non-linear emphasis circuit, the second non-linear emphasis circuit, and the pre-emphasis circuit are connected in series. The order of connection is preferably in ascending order of pre-emphasis time constant as shown in FIG. The reason is to prevent the emphasis characteristic of the first nonlinear emphasis circuit from greatly affecting the second nonlinear emphasis characteristic of the next stage.

FIG. 7 is a block diagram showing an example of a de-emphasis circuit used in combination with the pre-emphasis circuit of FIG. 6. Naturally, the de-emphasis circuit needs to be the inverse circuit of the pre-emphasis circuit, and as shown in Figure 7, the HPF36,
Noise suppression circuit consisting of amplifier 46, amplitude limiter 49, LPF 52, subtracter 59, HPF 6, amplifier 33, amplitude limiter 34, LPF 35, subtracter 1
Non-linear day emphasis circuit consisting of 9,
HPF28, amplifier 44, amplitude limiter 47, LPF
50 and a de-emphasis circuit consisting of a subtracter 57 must be connected in series in this order.

Next, it is used for the first nonlinear emphasis.
The effect of selecting the time constant of the HPF 36 to be smaller than the time constant of the HPF 6 used for the second nonlinear emphasis will be explained using FIGS. 6 and 8.

A in Figure 8 shows the time constant of HPF36 used for the first non-linear emphasis of 0.16μS and the time constant of HPF6 used for the second non-linear emphasis.
This is a waveform diagram of each part in Fig. 6 when it is 0.8μS,
B is a waveform diagram when the time constant of HPF36 is 0.8μS and the time constant of HPF6 is 0.16μS.

When waveforms a ₁ and b ₁ are applied to the input terminal 26 in FIG. 6, the input waveforms of the amplitude limiter 38 become differential waveforms such as a ₂ and b ₂ . If the amplitude limit level of the amplitude limiter 38 is 63, the output waveforms of the amplitude limiter 38 will be a ₃ and b _3, respectively, and the output waveforms of the adder 55 will be a ₄ and b _4, respectively. The output signals of the HPF 6 have differential waveforms of a ₄ and b ₄ and become a ₅ and b ₅ , respectively. Amplitude limiter 3
If the amplitude limit level of 4 is 64, the output waveforms of the amplitude limiter 34 will be a ₆ and b ₆ , respectively, and the output waveforms of the adder 5 will be a ₇ and b _7, respectively.

In case A, the waveform distortion generated by the amplitude limiter 38 is small and is hardly transmitted to the differential waveform _a5 by the HPF 6. On the other hand, in the case of B, the amplitude limiter 38
The distortion generated is large, and this distortion waveform is differentiated by HPF 6, resulting in a waveform like b ₅ . This is _a7
b The waveform difference is ₇ . The waveform of a ₇ is easy to restore with the de-emphasis circuit on the playback side, but the waveform of b ₇ is difficult to restore, resulting in image quality deterioration.

〔Effect of the invention〕

According to the present invention, it is possible to effectively compensate on the recording side for the small-amplitude high-frequency components that are degraded by the noise suppression circuit on the reproduction side, so that the waveform distortion that tends to occur due to the difference in characteristics between the recording system and the reproduction system can be reduced to an acceptable level. It can be suppressed.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an example of a recording/reproducing circuit of a conventional video tape recorder, Fig. 2 is a block diagram showing an example of a multistage emphasis circuit, and Fig. 3 is a circuit diagram showing a specific example of the circuit shown in Fig. 2. , FIG. 4 is a characteristic diagram showing an example of the characteristics of FIG. 3, FIG. 5 is a block diagram showing an example of the de-emphasis circuit compared to FIG. 2, and FIG. 6 is a block diagram showing the main part of an embodiment of the present invention. 7 is a block diagram showing an example of the de-emphasis circuit for FIG. 6, and FIG. 8 is a waveform diagram showing waveforms at various parts in FIG. 6. Explanation of symbols, 6, 28, 36...HPF, 7,
39...Limiter, 30, 34, 38, 47, 4
8, 49... Amplitude limiter, 5, 41, 55, 56...
...Adder, 32, 35, 40, 50, 51, 52
...LPF, 19, 53, 57, 59...subtraction circuit.

Claims (1)

[Claims] 1. A first non-linear emphasis circuit having a first high-pass filter and into which a video signal is input, and a second non-linear emphasis circuit having a time constant larger than the time constant of the first high-pass filter. a second non-linear emphasis circuit which has a high pass filter and receives the output signal of the first non-linear emphasis circuit; and a linear emphasis circuit which receives the output signal of the second non-linear emphasis circuit. An emphasis circuit, a frequency modulation circuit to which the output signal of the linear emphasis circuit is supplied, and a magnetic head that records the output signal of the frequency modulation circuit on a magnetic recording medium. Magnetic recording device.