JPH0337743B2 - - Google Patents

Info

Publication number
JPH0337743B2
JPH0337743B2 JP56168092A JP16809281A JPH0337743B2 JP H0337743 B2 JPH0337743 B2 JP H0337743B2 JP 56168092 A JP56168092 A JP 56168092A JP 16809281 A JP16809281 A JP 16809281A JP H0337743 B2 JPH0337743 B2 JP H0337743B2
Authority
JP
Japan
Prior art keywords
signal
photoelectric conversion
output
wiring
amplification means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56168092A
Other languages
Japanese (ja)
Other versions
JPS5868968A (en
Inventor
Katsunori Hatanaka
Shunichi Uzawa
Yutaka Hirai
Naoki Ayada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP56168092A priority Critical patent/JPS5868968A/en
Publication of JPS5868968A publication Critical patent/JPS5868968A/en
Publication of JPH0337743B2 publication Critical patent/JPH0337743B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14665Imagers using a photoconductor layer

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Facsimile Heads (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は光情報信号を光電変換して電気信号と
して出力する光電変換装置に関するものであり、
特にフアクシミリ、デジタル複写機、レーザ記録
装置等の文字及び画像入力装置等に適した固体化
された光電変換装置に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a photoelectric conversion device that photoelectrically converts an optical information signal and outputs it as an electric signal.
In particular, the present invention relates to a solid-state photoelectric conversion device suitable for character and image input devices such as facsimiles, digital copying machines, and laser recording devices.

〔従来技術及び発明が解決しようとする課題〕[Prior art and problems to be solved by the invention]

従来の光電変換装置は光電変換機能を有する光
電変換要素(画素)群と、該光電変換要素群から
出力される電気信号を順次時系列に配列された形
で出力する走査機能をもつ回路とを包含するもの
で、フオトダイオードとMOS・FET(Field
Effect Transistor)を構成要素として包含する
もの(「MOSタイプ」と略記する)、或いはCCD
(Charge Coupled Device)やBBD(Backet
Brigade Device)、即ち所謂CTD(Charge
Transfer Device)を構成要素として包含するも
の(「CTDタイプ」と略記する)等々各種の方式
がある。
A conventional photoelectric conversion device includes a group of photoelectric conversion elements (pixels) having a photoelectric conversion function, and a circuit having a scanning function that sequentially outputs electrical signals outputted from the group of photoelectric conversion elements in a chronologically arranged form. Includes photodiodes and MOS/FETs (Field
effect transistor) as a component (abbreviated as "MOS type"), or CCD
(Charge Coupled Device) and BBD (Backet
Brigade Device), so-called CTD (Charge Device)
There are various methods, such as those that include (abbreviated as ``CTD type'') a ``Transfer Device'' as a component.

而乍ら、これ等MOSタイプにしろCTDタイプ
にしろSi単結晶(C−Siと略記する)ウエーハー
基板を使用する為に、光電変換部の受光面の面積
は、C−Siウエーハー基板の大きさで限定されて
仕舞う。即ち、現時点に於いては、全領域に於け
る均一性も含めると精々数インチ程度の大きさの
C−Siウエーハー基板が製造され得るに過ぎない
為に、この種のC−Siウエーハー基板を使用する
MOSタイプ或いはCTDタイプの光電変換装置に
於いては、その受光面は先のC−Siウエーハー基
板の大きさを超え得るものではない。
However, since both MOS and CTD types use Si single crystal (abbreviated as C-Si) wafer substrates, the area of the light-receiving surface of the photoelectric conversion section is the same as the size of the C-Si wafer substrate. It ends up being limited. That is, at present, it is possible to manufacture C-Si wafer substrates with a size of several inches at most, including uniformity in the entire area. use
In a MOS type or CTD type photoelectric conversion device, its light receiving surface cannot exceed the size of the aforementioned C-Si wafer substrate.

従つて、受光面がこの様な限られた小面積であ
る光電変換部を有する光電変換装置では、例えば
デイジタル複写機の光情報入力装置として適用す
る場合、縮小倍率の大きい光学系を複写しようと
する原稿と受光面との間に介在させ、該光学系を
介して原稿の光学像を受光面に結像させる必要が
ある。
Therefore, in a photoelectric conversion device having a photoelectric conversion section whose light receiving surface has such a limited and small area, when used as an optical information input device of a digital copying machine, for example, it is difficult to copy an optical system with a large reduction magnification. It is necessary to interpose an optical image of the document on the light receiving surface via the optical system.

この様な場合、以下に述べる様に解像度を高め
る上で技術的な限度がある。
In such a case, there are technical limits to increasing the resolution, as described below.

即ち、光電変換部の解像度が例えば10本/mm、
受光面の長手方向の長さが3cmであるとし、A4
サイズの原稿を複写しようとする場合、受光面に
結像される原稿の光学像は約1/69に縮小され、
A4原稿に対する前記光電変換部の実質的な解像
度は約1.5本/mmに低下して仕舞う。
That is, if the resolution of the photoelectric conversion unit is, for example, 10 lines/mm,
Assuming that the length of the light receiving surface in the longitudinal direction is 3 cm, A4
When attempting to copy a size original, the optical image of the original formed on the light receiving surface is reduced to approximately 1/69,
The actual resolution of the photoelectric conversion unit for an A4 document ends up being reduced to about 1.5 lines/mm.

この様に実質的な解像度は、複写しようとする
原稿のサイズが大きくなるに従つて、(受光面の
サイズ)/(原稿のサイズ)の割合で低下する。
As described above, as the size of the original to be copied increases, the actual resolution decreases at the ratio of (size of light-receiving surface)/(size of original).

従つて、この点を解決するには、この様な方式
に於いては、光電変換部の解像度を高める製造技
術が要求されるが、先の様な限られた小面積の基
板を使用して要求される解像度を得るには、集積
密度を極めて高くし且つ構成素子に欠陥がない様
にして製造しなければならないが、斯かる製造技
術にも自づと限度がある。
Therefore, in order to solve this problem, manufacturing technology that increases the resolution of the photoelectric conversion part is required in such a system, but it is difficult to use a manufacturing technology that increases the resolution of the photoelectric conversion section, but it is difficult to use a manufacturing technology that increases the resolution of the photoelectric conversion section. In order to obtain the required resolution, devices must be manufactured with extremely high integration densities and with defect-free components, but such manufacturing techniques have their own limitations.

他方光電変換装置を複数配置して、全受光面の
長手方向の長さが複写し得る最大サイズの原稿の
主走査方向の長さと1:1になる様にし、結像さ
れる原稿の光学像を光電変換装置の数に分割して
実質的な解像度の低下を避け様とする方法が提案
されている。
On the other hand, a plurality of photoelectric conversion devices are arranged so that the length in the longitudinal direction of all light-receiving surfaces is 1:1 with the length in the main scanning direction of the maximum size document that can be copied, and an optical image of the document to be imaged is formed. A method has been proposed in which the resolution is divided into a number of photoelectric conversion devices to avoid a substantial drop in resolution.

而乍ら、斯かる方式に於いても、次に述べる様
な不都合さがある。即ち、光電変換装置を複数配
置すると必然的に各光電変換装置間に受光面の存
在しない境界領域が生じ、全体的に見る場合受光
面は連続的でなくなつて仕舞い、原稿の結像され
る光学像は分断され、且つ境界領域に相当する部
分は、光電変換装置の受光面に入力されず、複写
されて来る画像は線状に白抜けした或いは線状に
白抜けする部分に相当する部分が除かれて結合さ
れた不完全なものとなる。又、複数の受光面に分
割されて結像された光学像は、各受光面に於いて
各々光学的反転像となつている為、全体像は原稿
像の光学的反転像とは異なつている。従つて、受
光面の結像された光学像をそのまま再生したので
は元の原稿像を再現することは出来ない。
However, even in such a method, there are disadvantages as described below. In other words, when a plurality of photoelectric conversion devices are arranged, a boundary area where no light receiving surface exists is inevitably created between each photoelectric conversion device, and when viewed as a whole, the light receiving surface is no longer continuous, and the image of the original is formed. The optical image is divided, and the portion corresponding to the boundary area is not input to the light receiving surface of the photoelectric conversion device, and the copied image has a linear white spot or a portion corresponding to a linear white spot. are removed and combined into an incomplete one. Furthermore, since the optical image that is divided into multiple light-receiving surfaces and formed is an optically reversed image on each light-receiving surface, the overall image is different from the optically reversed image of the original image. . Therefore, if the optical image formed on the light-receiving surface is reproduced as it is, the original document image cannot be reproduced.

この様に、従来の光電変換装置に於いては、そ
の受光面が小さい為に高解像度で情報を再現する
のは極めて困難であつた。
As described above, in conventional photoelectric conversion devices, it has been extremely difficult to reproduce information with high resolution because the light receiving surface is small.

従つて、長尺化された受光面を有し、且つ解像
性に優れた光電変換部を有する光電変換装置が望
まれている。殊にフアクシミリやデジタル複写機
の光情報入力装置、或いはその他の、原稿に書か
れた文字や像を読取る画像読取装置に適用するも
のとしては、再生される原稿のサイズに略々等し
い受光面を有し、再生像に要求される解像度を低
下させず、原稿を忠実に再生させ得る光電変換部
を具備した光電変換装置が不可欠である。
Therefore, there is a demand for a photoelectric conversion device having a photoelectric conversion section having an elongated light-receiving surface and excellent resolution. In particular, when applied to optical information input devices of facsimiles, digital copying machines, or other image reading devices that read characters and images written on originals, it is recommended to use a light-receiving surface that is approximately the same size as the original that is to be reproduced. A photoelectric conversion device equipped with a photoelectric conversion section that can faithfully reproduce a document without reducing the resolution required for a reproduced image is essential.

〔発明の目的〕[Purpose of the invention]

本発明の目的とするところは、従来の光電変換
装置の改良を計ることである。
An object of the present invention is to improve conventional photoelectric conversion devices.

本発明の別の目的とするところは、長尺化され
た受光面を有し且つ高解像度化、高感度化された
光電変換部を具備し、極めて軽量化された固体化
光電変換装置を提供することにある。
Another object of the present invention is to provide a solid-state photoelectric conversion device that has an elongated light-receiving surface, has a photoelectric conversion section with high resolution and high sensitivity, and is extremely lightweight. It's about doing.

本発明の別の目的は、増幅手段に多結晶シリコ
ンを利用して長尺化が容易で且つ高速動作や高増
幅率の固体光電変換装置を提供することにある。
Another object of the present invention is to provide a solid-state photoelectric conversion device that uses polycrystalline silicon for the amplification means, can be easily made long, operates at high speed, and has a high amplification factor.

更に本発明の他の目的は各素子の特性のバラツ
キを補償し且つ素子同士の干渉の影響を防止でき
る長尺化に適した低雑音で残像のない固体光電変
換装置を提供することにある。
Still another object of the present invention is to provide a solid-state photoelectric conversion device with low noise and no afterimage, which is suitable for increasing length and can compensate for variations in the characteristics of each element and prevent the influence of interference between elements.

上述した目的は光電変換素子の複数と:各光変
換素子毎に電気的に接続され、該光電変換素子へ
の入射光量に応じて該光電変換素子より出力され
る信号を蓄積する為の信号蓄積手段の複数と:各
信号蓄積手段毎に電気的に接続され、該信号蓄積
手段を信号蓄積状態から初期状態に復帰させる為
の初期化手段の複数と:各信号蓄積手段毎に電気
的に接続され、該信号蓄積手段に蓄積されている
信号に応じて増幅された信号を出力する信号増幅
手段としての半導体層が多結晶シリコンからなる
半導体素子の複数と:各信号増幅手段毎に設けら
れ、対応する信号増幅手段による信号の伝達特性
を各信号増幅手段相互間で規格化する為の規格化
手段の複数と:各信号増幅手段毎に設けられ、各
信号増幅手段より出力される信号がクロストーク
するのを防止する為のクロストーク防止手段の複
数と:を具備する光電変換信号出力ユニツトの複
数と、前記複数の信号増幅手段を各ユニツト毎に
排他的に選択するユニツト選択信号を伝送するユ
ニツト駆動配線と、各ユニツトに於いて各初期化
手段を制御する為の制御信号を伝送する共通化さ
れた制御配線と、各ユニツトに於ける同位の信号
増幅手段の出力信号を伝送する共通化された信号
出力配線と、が同一基板上に一体的に設けられて
いることを特徴とする固体光電変換装置により達
成される。
The above-mentioned purpose is to connect a plurality of photoelectric conversion elements: a signal storage system that is electrically connected to each photoelectric conversion element and accumulates signals output from the photoelectric conversion element according to the amount of light incident on the photoelectric conversion element. A plurality of means: electrically connected to each signal storage means, and a plurality of initialization means for returning the signal storage means from a signal storage state to an initial state; and: electrically connected to each signal storage means. a plurality of semiconductor elements made of polycrystalline silicon, and a semiconductor layer serving as a signal amplification means for outputting a signal amplified in accordance with the signal stored in the signal storage means; provided for each signal amplification means; A plurality of standardization means for standardizing the transmission characteristics of signals by the corresponding signal amplification means between each signal amplification means: A plurality of standardization means are provided for each signal amplification means, and the signals output from each signal amplification means are crossed. a plurality of photoelectric conversion signal output units comprising: a plurality of crosstalk prevention means for preventing talk; and a unit selection signal for exclusively selecting each of the plurality of signal amplification means for each unit; Unit drive wiring, common control wiring that transmits control signals for controlling each initialization means in each unit, and common control wiring that transmits output signals of the same level signal amplification means in each unit. This is achieved by a solid-state photoelectric conversion device characterized in that the signal output wiring and the signal output wiring are integrally provided on the same substrate.

特に、光電変換層を非晶質シリコンにて形成す
れば光吸収係数に基き光電変換能の優れたものに
なる。
In particular, if the photoelectric conversion layer is formed of amorphous silicon, it will have excellent photoelectric conversion ability based on the light absorption coefficient.

更に、本発明の好適な実施態様例に於いては、
前記光電変換素子を構成する構成要素としての光
電変換機能を有する半導体部は、非晶質シリコン
(以後「A−Si」と略記する)の半導体薄膜、又
は、多結晶シリコン(以後「poly−Si」と略記す
る)の半導体薄膜で構成される。殊に、本発明に
於いては、前記信号増幅手段の半導体部がpoly−
Siの半導体薄膜で構成されることから、前記光電
変換素子の半導体部も好ましくはpoly−Siの半導
体薄膜で構成するのが生産性・量産性のより一層
の向上と信頼性の向上から望ましいものである。
Furthermore, in a preferred embodiment of the present invention,
The semiconductor portion having a photoelectric conversion function as a component constituting the photoelectric conversion element is a semiconductor thin film of amorphous silicon (hereinafter abbreviated as "A-Si") or polycrystalline silicon (hereinafter abbreviated as "poly-Si"). It consists of a semiconductor thin film (abbreviated as ")". In particular, in the present invention, the semiconductor portion of the signal amplification means is made of poly-
Since it is composed of a semiconductor thin film of Si, it is desirable that the semiconductor part of the photoelectric conversion element is also preferably composed of a thin semiconductor film of poly-Si, from the viewpoint of further improving productivity and mass production, and improving reliability. It is.

〔実施態様例の説明〕[Description of implementation examples]

第1図に本発明の基礎となる走査回路を掲げ
る。A4短手方向に約8画素/mmの密度での画像
読み取りを実現する為に必要な1728(=54×32)
の光導電素子S1-0、〜S54-31は外部バイアス電源
VBにより給電されている。従つて、電荷蓄積手
段としての電荷蓄積用のコンデンサC1-0〜C54-31
には各光導電素子への入射光量に応じた速度で電
荷が蓄積されていく。結果的に前記コンデンサ
C1-0〜C5431の選択可能な信号増幅手段として
のMOSトランジスタA1-0〜A54-31のゲートへの
接続点電位は、一定の電荷蓄積時間に対しては入
射光量に対応した値を持つ事になる。第1図に示
す走査回路では電荷蓄積用コンデンサは回路的に
はむしろ光導電素子とともに低周波濾波回路とし
ての効果が期待される。増幅用MOSトランジス
タの32本毎に共通なドレイン側配線、例えばブロ
ツク駆動線b1に排他的に電圧を供給すれば、前記
接続点の電位に応じて増幅用MOS(又はMIS)ト
ランジスタA1-0〜A1-31はバイアスされている事
に成り、各増幅用MOS(又はMIS)トランジスタ
は個々に接続されている光導電素子への入射光量
に対応したチヤンネル抵抗を持つ事になる。従つ
て自動的に個別データ線D0〜D31上へは光導電素
子S1-0〜S1-31への入射光量に対応した信号電流
が出力される事になる。上述の動作を確保する為
には個別データ線D0〜D31は電流増幅器等の低イ
ンピーダンス入力回路へ接続すべきは自明の事で
ある。ここでクロストーク防止手段としての電流
分離用ダイオードR1-0〜R54-31は個別データ線D0
〜D31に接続された増幅用MOS(又はMIS)トラ
ンジスタA1-0〜A54-31間の分離を(特に非選択時
に)確実にする為に設けられている。さて引き続
いて今度は駆動線b2にやはり排他的に電圧を供給
した時初期化手段としての放電用MOS(又は
MIS)トランジスタQ1-0〜Q1-31は導通状態とな
り第1の光導電素子群S1-0〜S1-31に属する蓄積
用コンデンサC1-0〜C1-31に蓄積された電荷は前
記トランジスタQ1-0〜Q1-31を通して放電される
事になる。
FIG. 1 shows a scanning circuit that is the basis of the present invention. 1728 (=54 x 32) required to achieve image reading at a density of approximately 8 pixels/mm in the short direction of A4
The photoconductive elements S 1-0 , ~S 54-31 are external bias power supplies.
Powered by V B. Therefore, capacitors C 1-0 to C 54-31 for charge storage as charge storage means
Charges are accumulated at a rate corresponding to the amount of light incident on each photoconductive element. As a result, the capacitor
The connection point potential to the gates of the MOS transistors A1-0 to A54-31 as selectable signal amplification means for C1-0 to C54-31 varies depending on the amount of incident light for a fixed charge accumulation time. It will have a corresponding value. In the scanning circuit shown in FIG. 1, the charge storage capacitor is expected to function as a low frequency filter circuit together with the photoconductive element. If a voltage is exclusively supplied to the drain side wiring common to every 32 amplification MOS transistors, for example, block drive line b1 , the amplification MOS (or MIS) transistor A1- 0 to A1-31 are biased, and each amplifying MOS (or MIS) transistor has a channel resistance corresponding to the amount of light incident on the individually connected photoconductive element. Therefore, a signal current corresponding to the amount of light incident on the photoconductive elements S 1-0 to S 1-31 is automatically output onto the individual data lines D 0 to D 31 . It is obvious that in order to ensure the above operation, the individual data lines D 0 to D 31 should be connected to a low impedance input circuit such as a current amplifier. Here, current separation diodes R 1-0 to R 54-31 as crosstalk prevention means are connected to individual data lines D 0
This is provided to ensure isolation between the amplifying MOS (or MIS) transistors A 1-0 to A 54-31 connected to D 31 (especially when not selected). Next, when voltage is supplied exclusively to the drive line b2 , the discharge MOS (or
MIS) Transistors Q 1-0 to Q 1-31 become conductive and the data is stored in the storage capacitors C 1-0 to C 1-31 belonging to the first photoconductive element group S 1-0 to S 1-31 . Charges will be discharged through the transistors Q 1-0 to Q 1-31 .

放電用トランジスタQ1-0〜Q1-31の共通ゲート
線を第2の光導電素子群S2-0〜S2-31に属する増
幅用トランジスタA2-0〜A2-31のドレイン側共通
線と接続して駆動する事は本発明の光電変換装置
への外部機器からの制御線本数を減ずる利益があ
るが、駆動電圧の相違、駆動タイミングの設定等
の問題により別個に駆動する場合も容易に類推で
きる。
The common gate line of the discharge transistors Q 1-0 to Q 1-31 is connected to the drain side of the amplification transistors A 2-0 to A 2-31 belonging to the second photoconductive element group S 2-0 to S 2-31 . Driving by connecting to a common line has the advantage of reducing the number of control lines from external equipment to the photoelectric conversion device of the present invention, but due to problems such as differences in drive voltage and drive timing settings, when driving separately. can also be easily inferred.

また増幅用トランジスタA1-0〜A54-31のスレツ
シヨルド電圧等の伝達特性を考慮して放電用トラ
ンジスタQ1-0〜Q54-31の共通ソース線を別個のバ
イアス電源からの給電で行うならば素子設計の巾
を拡げる効果を生む事も明らかである。
Also, taking into account the transfer characteristics of the threshold voltages and other factors of the amplification transistors A 1-0 to A 54-31 , the common source line of the discharge transistors Q 1-0 to Q 54-31 is supplied with power from a separate bias power supply. If so, it is clear that this has the effect of expanding the scope of element design.

本発明の第1の実施態様例の走査回路を第2図
に掲げる。第1図に示した第1の例は入射光量の
読み出し精度を多く要求しない場合、もしくは増
幅用として使用するトランジスタが同一ロツト製
品で伝達特性、特にスレツシヨルド電圧の分布が
小さい場合等には十分な効果が期待でき、回路構
成も簡単である。しかしながら特に高い精度で光
量情報を読み取る場合等には前記伝達特性の分布
が問題に成る場合がある。第2図に示した例は上
記の問題を解決する為に増幅用トランジスタ
A1-0〜A54-31の各々のソース規格化手段としての
抵抗を接続し、電流帰還によつて、複合した伝達
特性の均一化を実現した例である。回路動作の説
明は増幅用トランジスタA1-0〜A54-31の動作に電
流帰還を利用した負帰還を作用させる事が理解さ
れれば第1の例の走査回路の説明から明らかであ
る。
A scanning circuit according to a first embodiment of the present invention is shown in FIG. The first example shown in Figure 1 is sufficient when high accuracy in reading out the amount of incident light is not required, or when the transistors used for amplification are products of the same lot and the transfer characteristics, especially the distribution of the threshold voltage, are small. It is expected to be effective and the circuit configuration is simple. However, especially when reading light amount information with high accuracy, the distribution of the transfer characteristics may become a problem. The example shown in Figure 2 uses an amplifying transistor to solve the above problem.
This is an example in which a resistor is connected as a source normalization means for each of A 1-0 to A 54-31 , and the composite transfer characteristics are made uniform by current feedback. The explanation of the circuit operation will be clear from the explanation of the scanning circuit of the first example if it is understood that negative feedback using current feedback is applied to the operation of the amplifying transistors A 1-0 to A 54-31 .

本発明に於ける第2の実施態様例の走査回路を
第3図aに、その変形例を第3図bに掲げる。こ
れ等の例では前記の電流帰還を実現する規格化手
段の素子として抵抗の代わりに非線形動作素子
P1-0〜P54-31(図には一部のみを掲載)を用い、
また増幅用トランジスタのドレイン側共通線から
の分離手段としてMOS(又はMIS)トランジスタ
を用いており、特に増幅用トランジスタA1-0
A54-31(図には一部のみを記載)、放電用トランジ
スタQ1-0〜Q54-31(図には一部のみを記載)及び
分離用トランジスタT1-0〜T54-31(図には一部の
みを記載)とを同一テクノロジーで製作される素
子で構成する事により容易に集積化出来るという
大きな効果が生まれる。
A scanning circuit according to a second embodiment of the present invention is shown in FIG. 3a, and a modification thereof is shown in FIG. 3b. In these examples, a nonlinear operating element is used instead of a resistor as an element of the normalization means to realize the current feedback.
Using P 1-0 ~ P 54-31 (only a part is shown in the figure),
In addition, a MOS (or MIS) transistor is used as a means for separating the amplification transistor from the common line on the drain side, and in particular, the amplification transistor A 1-0 ~
A 54-31 (only a part is shown in the diagram), discharge transistor Q 1-0 ~ Q 54-31 (only a part is shown in the diagram), and isolation transistor T 1-0 ~ T 54-31 (Only a part is shown in the figure) By configuring them with elements manufactured using the same technology, a great effect is created that they can be easily integrated.

殊に第3図aの例の場合には電流帰還用トラン
ジスタP1-0〜P54-31へ給電するため共通ゲートバ
イアスVGの電圧を変える事により複合して伝達
特性をプログラム出来る特徴を有する。種々の共
通ゲートバイアスVG値に対する伝達特性の変化
を第4図に示す。
In particular, in the case of the example shown in Fig. 3a, the transfer characteristic can be programmed in combination by changing the voltage of the common gate bias V G for feeding power to the current feedback transistors P 1-0 to P 54-31 . have FIG. 4 shows changes in transfer characteristics for various common gate bias V G values.

以上述べた走査回路では常に光導電素子からの
出力を増幅(上記例では電流に変換増幅してい
る)してマトリツクス配線部から信号を送り出し
ている。一般に光導電素子の導電率は可成り低
く、また本発明の光電変換装置の主なる用途であ
るデジタル複写機、フアクシミリ等で要求される
長尺化された画像読み取り装置への応用に於いて
は、広いマトリツクス配線を要求される為に微弱
な電気信号を長い配線を通して処理する事になり
良好なSN比を期待出来ぬ場合が多い。本発明に
於ける大きな特徴の一つはこれまでの例の様に光
導電素子の出力端子に接続される選択素子に増幅
作用を持たせており、上記のマトリツクス配線部
を低インピーダンスと見なして各素子を駆動出来
る事になり雑音等の悪影響を大きく低減せしめた
事にある。
In the scanning circuit described above, the output from the photoconductive element is always amplified (in the above example, it is converted and amplified into a current) and the signal is sent out from the matrix wiring section. In general, the conductivity of photoconductive elements is quite low, and when applied to elongated image reading devices required for digital copying machines, facsimile machines, etc., which are the main uses of the photoelectric conversion device of the present invention, Since a wide matrix wiring is required, weak electrical signals must be processed through long wiring, and a good signal-to-noise ratio cannot often be expected. One of the major features of the present invention is that, as in the previous examples, the selection element connected to the output terminal of the photoconductive element has an amplifying effect, and the above matrix wiring section is regarded as low impedance. Since each element can be driven, the negative effects of noise and the like are greatly reduced.

第5図に本発明の光電変換装置の構成の部分を
説明する為の模式的説明図を示す。ガラス等の透
明な基板500上に一列に作られた光導電素子群
(素子構造は後述)SB1〜SB54(図にはSB15まで
しか示されていない)は、やはり同じ基板500
上に薄膜技術で形成された電極配線、及びコンデ
ンサ群CB1〜CB54(図にはCB15までしか示してい
ない)を通して集積化された走査回路I1〜I54(図
にはI15までしか示されていない)にワイヤ・ボ
ンデイングに依つて接続されている。また走査回
路I1〜I54からの出力線もやはりワイヤ・ボンデイ
ングによつて基板上と蒸着技術によつて設けた電
極に接続されマトリツクス配線部501に導か
れ、最終的に出力用電極に導かれる。駆動線b1
b54等の外部制御線もやはり基板500上の電極
配線を通して走査回路の設けてある基板に導かれ
る。この実施態様例で示されるハイブリツト構造
の光電変換装置に於ける光電変換素子は、以下の
実施態様例で示されるモノリシツク構造に於ける
光変換装置の光電変換素子と同一構造を有するの
でその際に詳細に説明される。
FIG. 5 shows a schematic diagram for explaining the configuration of the photoelectric conversion device of the present invention. A group of photoconductive elements (the element structure will be described later) SB 1 to SB 54 (only up to SB 15 is shown in the figure) formed in a line on a transparent substrate 500 made of glass etc. are also formed on the same substrate 500.
Scanning circuits I 1 to I 54 (up to I 15 are shown in the figure) integrated through electrode wiring formed on the top using thin film technology and capacitor groups CB 1 to CB 54 (only up to CB 15 is shown in the figure) (only shown) by wire bonding. Furthermore, the output lines from the scanning circuits I 1 to I 54 are also connected by wire bonding to electrodes provided on the substrate and by evaporation technology, led to the matrix wiring section 501, and finally led to the output electrodes. It will be destroyed. Drive line b 1 ~
External control lines such as b 54 are also led through electrode wiring on the substrate 500 to the substrate where the scanning circuit is provided. The photoelectric conversion element in the hybrid structure photoelectric conversion device shown in this embodiment example has the same structure as the photoelectric conversion element in the monolithic structure photoconversion device shown in the following embodiment example. Explained in detail.

第6図に示す構造は第1図に示された走査回路
のものを全て真空堆積薄膜技術によつて一枚の基
板上に現実した光電変換装置の例である。第6図
aは平面図、第6図bは第6図aに示されるX−
X′で示される位置での切断面図である。基板上
には光電変換部601、電荷蓄積部602、選択
可能な増幅部603及び放電部604と不図示で
はあるが紙面右側に位置するところにマトリツク
ス配線部と信号入出力電極及び電源供給電極が設
けられている。マトリツクス配線部の概略図は第
7図で示される一般的なものであつて700〜7
04等はスルーホール接続部を705は光電変換
部及び走査回路部に対応する。
The structure shown in FIG. 6 is an example of a photoelectric conversion device in which all of the scanning circuit shown in FIG. 1 is realized on one substrate by vacuum deposition thin film technology. Figure 6a is a plan view, Figure 6b is the X-
FIG. 3 is a cross-sectional view at a position indicated by X'. On the substrate are a photoelectric conversion section 601, a charge storage section 602, a selectable amplification section 603, a discharge section 604, and a matrix wiring section, signal input/output electrodes, and power supply electrodes located on the right side of the paper (not shown). It is provided. A general schematic diagram of the matrix wiring section is shown in FIG.
04 and the like correspond to through-hole connection portions, and 705 corresponds to a photoelectric conversion portion and a scanning circuit portion.

光電変換部601の個別電極605として透明
基板600を通過してきた光が入射可能な様にイ
ンジウム錫酸化物(ITO)等の透明導電材料を使
用して蒸着法で形成したものと画素形状の均一化
の為にクロム(Cr)等の遮光用電極材料で蒸着
法で形成した電極607とをフオト・エツチング
した画素毎に独立して作製されている。更に前記
個別電極605上に、例えばSiH4ガスとH2ガス
の混合ガス中でグロー放電を発生せしめ、SiH4
の分解によつて堆積するアモルフアス水素化シリ
コン(以後「A−Si:H」と略記する)の光導電
性薄膜を形成し、フオトエツチングにより画素毎
のA−Si:H光導電膜606を作製する。引き続
いて共通対向電極608がAl等の金属材料によ
つて(蒸着、エツチングのプロセスを経て)薄膜
技術によつて配線される。
The individual electrodes 605 of the photoelectric conversion unit 601 are formed by a vapor deposition method using a transparent conductive material such as indium tin oxide (ITO) so that light passing through the transparent substrate 600 can enter, and the pixel shape is uniform. In order to improve the image quality, an electrode 607 formed by vapor deposition using a light-shielding electrode material such as chromium (Cr) is fabricated independently for each pixel by photo-etching. Furthermore, a glow discharge is generated on the individual electrode 605 in a mixed gas of SiH 4 gas and H 2 gas, for example, and SiH 4
A photoconductive thin film of amorphous hydrogenated silicon (hereinafter abbreviated as "A-Si:H") is deposited by decomposition of the silicon, and an A-Si:H photoconductive film 606 for each pixel is produced by photoetching. do. Subsequently, a common counter electrode 608 is wired using a metal material such as Al (via a vapor deposition and etching process) using thin film technology.

尚、上記グロー放電分解法による堆積膜形成プ
ロセスに於いてSiH4/H2ガス中の適当な濃度の
PH3ガスもしくはB2H6ガスを混入させる事でn
型導電特性、又はp型導電特性をもつたA−Si:
H薄膜を作製する事もでき、外気に触れる事なく
連続的に各導電型のA−Si:H薄膜を形成でき
る。例えば上記A−Si:H光導電膜はその上面部
及び下面部をP原子を高濃度にドープしたn+
で形成する事により電極金属とのオーム接触を確
保している。従つて、以後の説明では各導電型の
A−Si:H膜の成膜法は一々触れない。
In addition, in the deposited film formation process using the glow discharge decomposition method described above, an appropriate concentration of SiH 4 /H 2 gas is used.
By mixing PH 3 gas or B 2 H 6 gas, n
A-Si with type conductivity or p-type conductivity:
H thin films can also be produced, and A-Si:H thin films of each conductivity type can be formed continuously without being exposed to the outside air. For example, the above A-Si:H photoconductive film secures ohmic contact with the electrode metal by forming its upper and lower surfaces with an n + layer doped with P atoms at a high concentration. Therefore, in the following explanation, the method of forming the A-Si:H film of each conductivity type will not be discussed one by one.

さて電荷蓄積部602はスパツタリング法等で
形成されたSiO2又はSi3N4から成る膜をパター
ン・エツチングすることで形成された蒸着薄膜6
18をはさんで接地電極609を薄膜形成法で配
線する事によつて作られたコンデンサで構成され
る。
Now, the charge storage part 602 is a vapor deposited thin film 6 formed by pattern etching a film made of SiO 2 or Si 3 N 4 formed by sputtering method or the like.
It is composed of a capacitor made by wiring a ground electrode 609 across the capacitor 18 using a thin film formation method.

増幅用薄膜トランジスタ612はMIS(金属−
絶縁物−半導体)構造を持つ。遮光用に作られた
電極607は電荷蓄積部602に蓄積された電荷
により発生する電位を該MIS構造トランジスタの
ゲートに供給する。
The amplification thin film transistor 612 is an MIS (metal-
It has an insulator-semiconductor) structure. An electrode 607 made for light shielding supplies a potential generated by the charges accumulated in the charge storage section 602 to the gate of the MIS structure transistor.

増幅用薄膜トランジスタ612及び放電用トラ
ンジスタ615の半導体部を構成する半導体薄膜
はpoly−Si半導体薄膜が用いられる。
A poly-Si semiconductor thin film is used as the semiconductor thin film constituting the semiconductor portions of the amplification thin film transistor 612 and the discharge transistor 615.

トランジスタ612の選択用ドレイン電極部6
11はSi薄膜のエツチング速度がドープしたP原
子濃度に依存する事を利用してn+層が取り去ら
れ、ドレイン選択電極610の材料としてAl等
の金属を用いる事により、第1図に於いてR1-0
〜R54-31で示される分離ダイオードとしての機能
を持つシヨツトキー・バリア・ダイオードを形成
している。またソース側電極613の接触部分は
n+層が残されておりオーム接触を保つている。
絶縁層619はやはりSi3N4、SiO2等のスパツタ
膜等の絶縁膜で構成され、特にドレイン選択電極
610と光電変換部からの出力線である遮光電極
607との静電結合を小さくする目的で形成され
ている。
Selection drain electrode part 6 of transistor 612
11, the n + layer is removed by taking advantage of the fact that the etching rate of the Si thin film depends on the doped P atom concentration, and by using a metal such as Al as the material for the drain selection electrode 610, the structure shown in FIG. TeR 1-0
It forms a Schottky barrier diode with the function of an isolation diode, denoted ~R 54-31 . Also, the contact part of the source side electrode 613 is
The n + layer remains to maintain ohmic contact.
The insulating layer 619 is also composed of an insulating film such as a sputtered film of Si 3 N 4 , SiO 2 or the like, and particularly reduces the electrostatic coupling between the drain selection electrode 610 and the light shielding electrode 607 which is the output line from the photoelectric conversion section. formed for a purpose.

放電部604を構成するMIS構造トランジスタ
615はドレイン側電極、ソース側電極(それぞ
れ614,616)を共にオーム接触を保つべく
Siを母体としたpoly−Si半導体薄膜のn+層を介し
て接続される。ドレイン電極614及びソース電
極616との間のSi膜のn+層はフオトエツチング
によつて除去される。
The MIS structure transistor 615 constituting the discharge section 604 has a drain side electrode and a source side electrode (614, 616, respectively) to maintain ohmic contact with each other.
They are connected via an n + layer of a poly-Si semiconductor thin film based on Si. The n + layer of the Si film between the drain electrode 614 and the source electrode 616 is removed by photoetching.

第8図a,bに示す光電変換装置は第2図にそ
の回路図を示す様に電流帰還用抵抗F1-0〜F54-31
を挿入した実施態様例で、第8図aは模式的平面
図、第8図bは第8図aに於けるX−X′での切
断面図である。各部の配置は第6図の場合とほぼ
同じであり、異なる点は抵抗体800を設けた点
であり、これは適当なドーピング量のA−Si:H
又はpoly−Siを用いてもよいし、適当な金属の酸
化物;ホウ化物、窒化物等を用いて構成されても
よい。
The photoelectric conversion device shown in FIGS. 8a and 8b has current feedback resistors F 1-0 to F 54-31 as shown in the circuit diagram in FIG. 2.
FIG. 8a is a schematic plan view, and FIG. 8b is a cross-sectional view taken along line X-X' in FIG. 8a. The arrangement of each part is almost the same as in the case of FIG. 6, and the difference is that a resistor 800 is provided, and this
Alternatively, poly-Si may be used, or an appropriate metal oxide such as boride or nitride may be used.

電流帰還素子としてMISトランジスタを用いた
例を第9図a,bに示す。対応する走査回路図は
第3図aに示してある。この実施態様例に於いて
も第6図に示した各部の配置と多くの点で同様で
あり、放電用トランジスタ905に平行な位置に
電流帰還用としてのMISトランジスタ900を、
また電荷蓄積部906と増幅用MISトランジスタ
904との間に分離用素子として同じくMISトラ
ンジスタ901とを形成した点が異なるだけであ
る。尚、第6図に示す増幅用MISトランジスタ6
12と第9図に示す増幅用MISトランジスタ90
4とが異なる点はMISトランジスタ904のドレ
インが電極金属とオーム接触を保つように設計さ
れている点である。また分離用MISトランジスタ
901のゲート907は選択信号線biの入力線9
02に接続され、更にドレイン側はトランジスタ
電源線VD903に接続されている事を図への補
足説明としてつけ加えておく。
An example using an MIS transistor as a current feedback element is shown in FIGS. 9a and 9b. The corresponding scanning circuit diagram is shown in FIG. 3a. This embodiment is also similar in many respects to the arrangement of each part shown in FIG.
The only difference is that a MIS transistor 901 is similarly formed as a separation element between a charge storage section 906 and an amplifying MIS transistor 904. Furthermore, the MIS transistor 6 for amplification shown in FIG.
12 and an amplifying MIS transistor 90 shown in FIG.
4 in that the drain of the MIS transistor 904 is designed to maintain ohmic contact with the electrode metal. Furthermore, the gate 907 of the MIS transistor for separation 901 is connected to the input line 9 of the selection signal line bi.
02, and furthermore, the drain side is connected to the transistor power supply line V D 903 as a supplementary explanation to the figure.

以上本発明の好適な実施態様例としてはA−
Si:H又はpoly−Siからなる光導電薄層でその半
導体部を構成した光導電素子とpoly−Siでその半
導体部を構成した増幅手段を含む集積化走査回路
及びマトリクス配線とを単一基板上に組み上げた
ハイブリツド方式、及び前記光導電素子、走査回
路をモノリシツク方式で形成した例を掲げて説明
したが、本発明はこれ等実施態様例に限定される
ものではない。
As mentioned above, preferred embodiments of the present invention include A-
A photoconductive element whose semiconductor part is made of a photoconductive thin layer made of Si:H or poly-Si, an integrated scanning circuit including an amplification means whose semiconductor part is made of poly-Si, and a matrix wiring are mounted on a single substrate. Although the above-mentioned hybrid method and the example in which the photoconductive element and the scanning circuit are formed in a monolithic method have been described, the present invention is not limited to these embodiments.

〔効果〕〔effect〕

以上実施例で示した如く本発明では従来多数の
光情報を走査し出力する光電変換装置に於いて、
長尺化が精度良く実現可能で、増幅機能を持つ走
査回路を構成する事によつてインピーダンスの高
い光導電素子を広く配置した場合に問題となる雑
音の影響を大きく低減した光電変換装置を作成す
る事を可能ならしめる。そして、本発明によれば
素子毎のバラツキや干渉、残像のない信号出力を
高応答性をもつて実現できる。
As shown in the embodiments above, in the present invention, in a conventional photoelectric conversion device that scans and outputs a large amount of optical information,
Created a photoelectric conversion device that can be made longer with high accuracy and greatly reduces the influence of noise, which can be a problem when photoconductive elements with high impedance are widely arranged, by configuring a scanning circuit with an amplification function. Make what you do possible. According to the present invention, it is possible to realize signal output with high responsiveness without variations among elements, interference, or afterimages.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は走査回路図、第2図乃至第3図a,b
は各々、本発明の各実施態様例に係わる走査回路
を説明する為の走査回路図、第4図は本発明に於
ける共通ゲートバイアス値に対する伝達特性の変
化を示す図、第5図及び第6図a,bは本発明の
基礎となる構成を説明する為の模式的説明図で、
第6図bは第6図aのX−X′での断面図、第7
図は本発明に於けるマトリツクス配線部を説明す
る為の説明図、第8図a,b及び第9図a,bは
各々他の本発明の実施態様例を説明する為の説明
図で、第8図bは第8図aの、第9図bは第9図
aの夫々X−X′での切断面図である。 500……基板、501……マトリツクス配線
部、601……光電変換部、602……電荷蓄積
部、603……増幅部、604……放電部、60
5……個別電極、606……光導電層、607…
…電極、608……共通対向電極、609……接
地電極、612……増幅用トランジスタ、615
……放電用トランジスタ、619……絶縁層、7
00〜704……スルーホール部、705……光
電変換部及び走査回路部。
Figure 1 is a scanning circuit diagram, Figures 2 and 3 a, b
4 is a scanning circuit diagram for explaining a scanning circuit according to each embodiment of the present invention, FIG. 4 is a diagram showing changes in transfer characteristics with respect to a common gate bias value in the present invention, and FIGS. Figures 6a and 6b are schematic explanatory diagrams for explaining the basic configuration of the present invention.
Figure 6b is a sectional view taken along line X-X' in Figure 6a;
The figure is an explanatory diagram for explaining the matrix wiring part in the present invention, and FIGS. FIG. 8b is a cross-sectional view of FIG. 8a, and FIG. 9b is a cross-sectional view taken along line X-X' of FIG. 9a. 500... Substrate, 501... Matrix wiring section, 601... Photoelectric conversion section, 602... Charge storage section, 603... Amplification section, 604... Discharge section, 60
5...Individual electrode, 606...Photoconductive layer, 607...
... Electrode, 608 ... Common counter electrode, 609 ... Ground electrode, 612 ... Amplification transistor, 615
...Discharge transistor, 619...Insulating layer, 7
00-704... Through-hole section, 705... Photoelectric conversion section and scanning circuit section.

Claims (1)

【特許請求の範囲】 1 光電変換素子の複数と: 各光電変換素子毎に電気的に接続され、該光電
変換素子への入射光量に応じて該光電変換素子よ
り出力される信号を蓄積する為の信号蓄積手段の
複数と: 各信号蓄積手段毎に電気的に接続され、該信号
蓄積手段を信号蓄積状態から初期状態に復帰させ
る為の初期化手段の複数と: 各信号蓄積手段毎に電気的に接続され、該信号
蓄積手段に蓄積されている信号に応じて増幅され
た信号を出力する信号増幅手段としての半導体層
が多結晶シリコンからなる半導体素子の複数と: 各信号増幅手段毎に設けられ、対応する信号増
幅手段による信号の伝達特性を各信号増幅手段相
互間で規格化する為の規格化手段の複数と: 各信号増幅手段毎に設けられ、各信号増幅手段
より出力される信号がクロストークするのを防止
する為のクロストーク防止手段の複数と: を具備する光電変換信号出力ユニツトの複数と、 前記複数の信号増幅手段を各ユニツト毎に排他
的に選択するユニツト選択信号を伝送するユニツ
ト駆動配線と、 各ユニツトに於いて各初期化手段を制御する為
の制御信号を伝送する共通化された制御配線と、 各ユニツトに於ける同位の信号増幅手段の出力
信号を伝送する共通化された信号出力配線と、が
同一基板上に一体的に設けられていることを特徴
とする固体光電変換装置。 2 前記光電変換素子は非晶質シリコンからなる
光電変換層を具備することを特徴とする特許請求
の範囲第1項に記載の固体光電変換装置。
[Claims] 1. A plurality of photoelectric conversion elements: Each photoelectric conversion element is electrically connected to each other, and for accumulating signals output from the photoelectric conversion element according to the amount of light incident on the photoelectric conversion element. A plurality of signal storage means are electrically connected to each signal storage means, and a plurality of initialization means are electrically connected to each signal storage means for returning the signal storage means from a signal storage state to an initial state. a plurality of semiconductor elements whose semiconductor layers are made of polycrystalline silicon as signal amplification means which are connected to each other and output a signal amplified in accordance with the signal stored in the signal storage means; A plurality of standardization means are provided for each signal amplification means and standardize the signal transfer characteristics of the corresponding signal amplification means between each signal amplification means. a plurality of crosstalk prevention means for preventing signal crosstalk; a plurality of photoelectric conversion signal output units comprising: a unit selection signal for exclusively selecting the plurality of signal amplification means for each unit; unit drive wiring that transmits the signal, a common control wiring that transmits the control signal for controlling each initialization means in each unit, and a common control wiring that transmits the output signal of the signal amplification means of the same level in each unit. 1. A solid-state photoelectric conversion device characterized in that a common signal output wiring is integrally provided on the same substrate. 2. The solid-state photoelectric conversion device according to claim 1, wherein the photoelectric conversion element includes a photoelectric conversion layer made of amorphous silicon.
JP56168092A 1981-10-21 1981-10-21 Photoelectric transducer Granted JPS5868968A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56168092A JPS5868968A (en) 1981-10-21 1981-10-21 Photoelectric transducer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56168092A JPS5868968A (en) 1981-10-21 1981-10-21 Photoelectric transducer

Publications (2)

Publication Number Publication Date
JPS5868968A JPS5868968A (en) 1983-04-25
JPH0337743B2 true JPH0337743B2 (en) 1991-06-06

Family

ID=15861691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56168092A Granted JPS5868968A (en) 1981-10-21 1981-10-21 Photoelectric transducer

Country Status (1)

Country Link
JP (1) JPS5868968A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2865209B2 (en) * 1989-07-20 1999-03-08 浜松ホトニクス 株式会社 Solid-state imaging device
JP6132283B2 (en) 2013-05-17 2017-05-24 Nltテクノロジー株式会社 Amplifier circuit and image sensor using the amplifier circuit
JP6459271B2 (en) 2014-07-23 2019-01-30 Tianma Japan株式会社 Image sensor and driving method thereof

Also Published As

Publication number Publication date
JPS5868968A (en) 1983-04-25

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