JPH0337537U - - Google Patents
Info
- Publication number
- JPH0337537U JPH0337537U JP9959889U JP9959889U JPH0337537U JP H0337537 U JPH0337537 U JP H0337537U JP 9959889 U JP9959889 U JP 9959889U JP 9959889 U JP9959889 U JP 9959889U JP H0337537 U JPH0337537 U JP H0337537U
- Authority
- JP
- Japan
- Prior art keywords
- master
- slave
- computer
- causing
- communication line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
Description
第１図Ａ〜Ｄは、それぞれ本考案の一実施例を
示すブロツク図、第２図Ａ，Ｂは、それぞれ本考
案の一実施例の識別処理のフローチヤートを示す
図、第３図Ａ，Ｂはそれぞれ従来例を示すブロツ
ク図である。
１…コンピユータ１、２…コンピユータ２、３
…手動切換スイツチ。
1A to 1D are block diagrams showing an embodiment of the present invention, FIGS. 2A and 2B are flowcharts of identification processing in an embodiment of the present invention, and FIGS. B is a block diagram showing a conventional example. 1...Computer 1, 2...Computer 2, 3
...Manual changeover switch.
Claims (1)
ータシステムにおいて、スレーブ側のコンピユー
タとマスタ側のコンピユータで通信ラインを経由
して必要なデータを送り、前記スレーブ側を前記
マスタ側と同じ状態で待機させる手段と、前記通
信ラインの切換とソフトウエアの処理により、前
記各コンピユータによりマスタ側かスレーブ側か
を認識させる手段とを具備してなることを特徴と
するマスタ／スレーブ認識装置。 In a duplex computer system having a manual switching circuit, means for transmitting necessary data between a slave side computer and a master side computer via a communication line, and causing the slave side to stand by in the same state as the master side; A master/slave recognition device comprising means for causing each computer to recognize whether it is a master side or a slave side by switching the communication line and processing by software.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9959889U JPH0337537U (en) | 1989-08-25 | 1989-08-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9959889U JPH0337537U (en) | 1989-08-25 | 1989-08-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0337537U true JPH0337537U (en) | 1991-04-11 |
Family
ID=31648641
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9959889U Pending JPH0337537U (en) | 1989-08-25 | 1989-08-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0337537U (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53135210A (en) * | 1977-04-30 | 1978-11-25 | Nec Corp | Data-channel switching system of asynchronous processing system |
| JPS5860368A (en) * | 1981-10-07 | 1983-04-09 | Fuji Electric Co Ltd | Switching system for queued duplex computer system |
| JPS5864553A (en) * | 1981-10-14 | 1983-04-16 | Toshiba Corp | Dual arithmetic system |
| JPS60562A (en) * | 1983-06-17 | 1985-01-05 | Nippon Telegr & Teleph Corp <Ntt> | System change-over controlling device |
-
1989
- 1989-08-25 JP JP9959889U patent/JPH0337537U/ja active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53135210A (en) * | 1977-04-30 | 1978-11-25 | Nec Corp | Data-channel switching system of asynchronous processing system |
| JPS5860368A (en) * | 1981-10-07 | 1983-04-09 | Fuji Electric Co Ltd | Switching system for queued duplex computer system |
| JPS5864553A (en) * | 1981-10-14 | 1983-04-16 | Toshiba Corp | Dual arithmetic system |
| JPS60562A (en) * | 1983-06-17 | 1985-01-05 | Nippon Telegr & Teleph Corp <Ntt> | System change-over controlling device |