JPH0337509U - - Google Patents
Info
- Publication number
- JPH0337509U JPH0337509U JP9680889U JP9680889U JPH0337509U JP H0337509 U JPH0337509 U JP H0337509U JP 9680889 U JP9680889 U JP 9680889U JP 9680889 U JP9680889 U JP 9680889U JP H0337509 U JPH0337509 U JP H0337509U
- Authority
- JP
- Japan
- Prior art keywords
- speed
- load
- changeover switch
- output
- loop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Feedback Control In General (AREA)
- Control Of Velocity Or Acceleration (AREA)
Description
第１図はこの考案の一実施例を示す制御装置の
構成図、第２図はこの考案の動作を示す波形図、
第３図は従来の制御装置の構成図、第４図は従来
の制御装置の動作を示す波形図である。
図中、１は速度指令、２は速度ループ演算器、
３はパワーアンプ、４は負荷、５は速度検出器、
６は負荷速度、７は第１の切換スイツチ、８は第
２の切換スイツチ、９はサンプルホールド回路、
１０は減算器である。なお、図中、同一あるいは
相当部分には同一符号を付して示してある。
Fig. 1 is a configuration diagram of a control device showing an embodiment of this invention, Fig. 2 is a waveform diagram showing the operation of this invention,
FIG. 3 is a configuration diagram of a conventional control device, and FIG. 4 is a waveform diagram showing the operation of the conventional control device. In the figure, 1 is a speed command, 2 is a speed loop calculator,
3 is a power amplifier, 4 is a load, 5 is a speed detector,
6 is a load speed, 7 is a first changeover switch, 8 is a second changeover switch, 9 is a sample and hold circuit,
10 is a subtractor. In the drawings, the same or corresponding parts are denoted by the same reference numerals.
Claims (1)
において、速度指令とその信号グランドを切換え
る第１の切換回路と、第１の切換回路の出力と負
荷速度とから速度ループの演算を行う速度ループ
演算器と、速度ループ演算器の出力により負荷を
駆動するパワーアンプと、負荷速度を検出する速
度検出器と、第１の切換スイツチに連動する第２
の切換スイツチと、第２の切換スイツチを介して
負荷速度をサンプルホールドするサンプルホール
ド回路と、サンプルホールド回路の出力を速度指
令から差し引く減算器とから構成され、速度ルー
プのオフセツトを補正することを特徴とした制御
装置。 In a control device that controls the speed of a load using a speed command, there is provided a first switching circuit that switches between the speed command and its signal ground, and a speed loop calculator that calculates a speed loop from the output of the first switching circuit and the load speed. , a power amplifier that drives the load using the output of the speed loop calculator, a speed detector that detects the load speed, and a second switch that is linked to the first changeover switch.
It consists of a changeover switch, a sample hold circuit that samples and holds the load speed via the second changeover switch, and a subtracter that subtracts the output of the sample hold circuit from the speed command, and is used to correct the offset of the speed loop. Featured control device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9680889U JPH0337509U (en) | 1989-08-19 | 1989-08-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9680889U JPH0337509U (en) | 1989-08-19 | 1989-08-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0337509U true JPH0337509U (en) | 1991-04-11 |
Family
ID=31645989
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9680889U Pending JPH0337509U (en) | 1989-08-19 | 1989-08-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0337509U (en) |
-
1989
- 1989-08-19 JP JP9680889U patent/JPH0337509U/ja active Pending
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