JPH0336651A - Control memory read inspecting system - Google Patents

Abstract

PURPOSE:To shorten time for inspecting read and to exclude false fault by storing the starting address and length of an unused area in a control memory, referring this memory and executing skip reading. CONSTITUTION:In a ROM 30 of the control memory, the starting address areas of unused areas 32 and 34, etc., and length areas 41, 51, 42 and 52 are provided as well. When the read of this ROM 30 is inspected through a microprocessor unit 10, the areas 41, 51, 42 and 52 are referred and when an address to be stepped-up arrives at the starting address of the unused area, the areas 32 and 34, etc., are skipped. Then, reading is executed. Accordingly, the time is shortened for inspecting the reading and the false fault caused by the fault of the unused area is excluded. Then, processing is executed speedily and efficiently.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a control storage read testing method.

[Conventional technology]

A block diagram of a conventional control storage readout testing system is shown in FIG.

In this example, a micro processing unit (MPU) 10, a bus bar 20. Read-only storage used as control storage (
ROM) 300 and random access memory (RAM)
)60.

In the ROM 300, 310 and 330 are used areas, 3
20.340 indicates an unused area, and 360 indicates a CRC area. The unused areas 320 and 340 are generated by arranging the ROM 300 with the maximum possible storage capacity in response to the fact that the control information and programs stored in the control memory vary depending on the system configuration of the information processing apparatus.

The self-inspection of the ROM 300, which stores control information and programs for operating the MPU 10, is performed using the ROM 30.
Using the CRC area 360 embedded at the time of creation of 0 as a key, this is performed by cyclic code calculation over the entire area of the read-only control storage circuit which is the unit of exchange.

[Problem that the invention seeks to solve]

In the conventional method described above, the entire area of the ROM 300, which is the replacement unit, is tested. Inspection requires extra time, and if there is a fault in an unused area, there are problems such as a fault being detected even though it is not a real fault, reducing the processing efficiency of the information processing equipment. Ta.

The present invention is intended to solve the above problems, and is a control memory read test method that can improve the processing efficiency of an information processing device by shortening the control memory read test time and eliminating false failures. The purpose is to provide

[Means for solving problems]

The control memory readout inspection method of the present invention stores in advance the start address and length of an unused area in the control memory in a 1:1 correspondence with the unused area in the control memory, and then performs a readout inspection of the control memory. This method is characterized in that the access address is sequentially changed while referring to the start address, and when the access address reaches the start address, it is skipped by the length and read inspection is continued from the next used area.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a control storage readout testing method for an information processing apparatus showing one embodiment of the present invention.

In this embodiment, an MPU 10, a ROM 30, and a RAM 60 are connected by a bus 20, and the ROM 30 has three
two used areas 31.33 and 35, two unused areas 32.34, and two starting address areas 41.42 and 2.
A management table consisting of two length areas 51°52 and a CR
It is ovalized from the C area 36.

The start address area 41 and the length area 51 are areas for pre-storing the start address and length of the unused area 32, respectively, and the start address area 42 and the length area 52 are areas for storing the start address and length of the unused area 34, respectively. This is an area for storing address and length in advance.

The used areas 31, 33 and 35 are areas in which programs and constants necessary for the operation of this information processing apparatus are stored, and the unused areas 32 and 34 are areas that are invalid for the operation of this information processing apparatus. In the CRC area 36, which does not need to be accessed, cyclic code check information based on a generator polynomial determined for the remaining areas excluding the unused areas 32 and 34 is embedded in the ROM.

When performing a read test of the ROM 30, the MPU 10 sequentially reads data from the first address of the used area 31 in the ROM 30 via the bus 20 and performs a predetermined cyclic code operation.

In parallel with this calculation operation, the MPL+ 10 also looks at a management table that stores information on the starting address and length of a group of unused areas, and when reading reaches an unused area 32 or 34, it reads these areas. It autonomously skips and continues predetermined cyclic code calculation for the actual usage area 33 or 35, respectively.

Thereafter, this cyclic code calculation is performed up to the CRC area 36 including the management table section (41 to 55) of the unused area group, thereby completing the inspection.

〔Effect of the invention〕

As explained above, the present invention has a structure in which a management table of start addresses and lengths representing a group of unused areas in the control memory is built into the control memory itself, so that the cyclic code 1 check performed by sequential reading is performed on unused areas. By skipping the area group, it has the excellent effect of shortening the read inspection time and eliminating false failures that existed in the unused area group, and has the advantage that the processing efficiency of the information processing device can be improved. There is.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG.
The figure is a block diagram of a conventional example. 10... Micro processing unit (MPU), 20
...Bus bar, 30,300...Read-only storage device (R
OM), 3L 33, 35, 310, 330...Used area, 32,34,320,340...Unused area, 36,360...CRC area, 41.42...Start address area, 51.52... Length area, 60... Random access memory (RAM).

Claims (1)

[Scope of Claims] The start address and length of the unused area are stored in advance in the control memory in a 1:1 correspondence with the unused area in the control memory, and the reading test of the control memory is performed as described above. The access address is sequentially changed while referring to the start address, and when the access address reaches the start address, the read inspection is continued by the length and the read inspection is continued from the next used area. A control memory read test method that uses