JPH0336643A - Data processing method - Google Patents

Abstract

PURPOSE:To process data in various address expressing forms by changing the contents of a conversion table and to prevent the overhead of preprocessing by providing an address converter, data aliner and instruction execution unit controller. CONSTITUTION:An execution unit 4 accesses an address conversion table 9 of a main storage device and an address is fetched to a table 11 in a CPU 1, and converted by a physical address in the table. Simultaneously, an address expressing form designating bit 10 is fetched to a copy part 12 as well and it is detected whether the data to be accessed are big Indian or little Indian. Afterwards, a main memory 2 is accessed by the address converted to the physical address. An aliner 3 puts the data in order to data arrangement to be used in an internal part according to a signal 15 showing the address expressing form from the copy part 12 and the data are delivered to the execu tion unit 4 and processed. At the time of writing, operation is made reverse. Thus, when information mixing the data in the various address expressing forms are processed, the overhead of the preprocessing can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data handling method for an information processing device, and particularly to a data processing method that handles a mixture of data in a plurality of address expression formats.

[Conventional technology]

There are several ways to represent the address of data handled by an information processing device on the main memory, and there are two types used in boat fishing.

They are called the Big Indian and the Little Indian.

An expression method called Big Indian expresses the MSB side of a word expressed by the main memory as a low address. For example, in terms of byte addresses, if the main memory is 32 bits, the byte represented by the bits with a weight of 231 to 224 is considered a low address, and the LSB (Il) is expressed as a high address. Similarly, the MSB side is set as the lower bit address, and L S
B, l! ! Let J be a high-order bit address.

The system called Little Indian is the opposite of Big Indian, and the LSB side is expressed as a low-order address, and the MS
The B side is expressed as a high-order address.

In an information processing device that handles a mixture of data in such different representation formats, the address correspondence differs when handling data with a bit width that differs from the main memory word length, such as byte operations and bit operations, and the data There will be no compatibility between them. For example, the order of the byte strings may be different, resulting in the data representing the character string being in a different order, or even if the address of byte data or bit data is indicated, the position of the indicated data may be different. Data cannot be handled uniformly by a single program.

In an information processing apparatus that handles a mixture of data with different address representation formats as described above, it is necessary to know which representation format the data to be handled is and to perform operations according to that representation format. In general, the representation format of data handled by an information processing device is determined to be one format, and when handling data that differs from the determined format, it cannot be processed with normal instructions and a data conversion command is issued. Or you need to do it programmatically.

[Problem to be solved by the invention]

In an information processing device containing a mixture of data having different address expression formats as described above, when the information processing device handles assumed data, it only performs normal processing, and there is no problem. However, if the data representation format differs from the assumed one, the difference in data representation format must be taken into account when accessing the data, and a processing program must be created that also includes the conversion. For example, in the string “°
AB CD” is given, in the main memory, in the Big Indian expression, ABCD is input from the MSB side.
However, in Little Indian, the order is from MSB to DCBA. That is, when data expressed in Big Indian is handled in Little Indian, the character string "ABCD"' is assumed to be in the order "DCBA", making it impossible to maintain data compatibility. Therefore, if the information processing device that is performing all the processing is designed to perform processing assuming Little Indian, if you try to process data expressed in Big Indian, it will not be possible to change the order of the bytes. must be performed before processing, which reduces processing power. Furthermore, this swapping process depends on the format of the data to be manipulated, and cannot be handled by simply performing swapping. Further, a uniformly created processing program cannot handle data of different formats in a mixed manner, and it is necessary to create two processing programs for the same processing program, one for Big Indian and one for Little Indian.

[Means to solve the problem]

The data processing method of the present invention uses an address conversion table used to convert a logical address to a physical address in an information processing device that handles a mixture of data expressed using a plurality of byte address and bit address expression methods. A bit indicating the address expression format of the data to be handled is provided, and data operations are performed by assuming that all data in the physical address is in the indicated data expression method, corresponding to a conversion table with a bit indicating this expression format. By changing the data handling method in hardware or microprograms, it is possible to centrally manipulate and calculate data in multiple representation methods using a single program without having to change the program to correspond to the data address representation method. It is possible to do this.

[For production]

In the present invention, an information processing device includes an address translation device provided with a bit indicating the format of data stored in a memory area indicated by an address translation table for translating from a logical address to a physical address, and It consists of an aligner that aligns data according to the data format, and an instruction execution unit control device that can change the handling of data depending on the bits mentioned above.

When accessing data, first search the translation table using the logical address to be accessed, or at the same time obtain the physical address translated from the logical address and use the translation table to determine which address representation the data stored at that address is. Know what the format is. The data accessed using this information is arranged into a format that can be handled internally by the aligner. Further, when the ordered data is used for command execution, this information is used during execution to change the handling of the data.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

Referring to FIG. 1, which shows one embodiment of the present invention, 1 is a central processing unit, which controls the execution of programs. Reference numeral 2 denotes a main storage device in which programs, data, and address conversion tables accessed by the central processing unit 1 are stored. 3 is an aligner that aligns data. 4 is an execution unit that executes programs within the central processing unit 1; Reference numeral 5 denotes an execution unit control device, which controls the execution unit 1-4 using a microprogram or hardware. Reference numeral 6 denotes a memory within the main storage device 2, in which data and an address conversion table 9 are stored. 7 is Big Indian expression data, and 8 is Little Indian expression data.

Now, when the execution unit 4 attempts to access data, it first accesses the address translation table 9 and imports the data into the table 11 in the central processing unit 1 via the data bus 13. At the same time as the address is converted by the physical address in this conversion table, the address expression format specification bit 10 in the conversion table is also set to 12, and it is determined whether the data to be accessed is Big Indian or Little Indian. You can know.

Thereafter, the main memory is accessed using the address converted to a physical address. At the time of reading, data read from the main memory device 2 is input to the aligner 3 through the data bus 13. The aligner 3 learns the address expression format of the data from the signal 15 output from the signal 12 indicating the address expression format, and aligns the data according to that information to form a data arrangement for internal use. The aligned data is passed to the execution unit 4 using the internal data bus 14 to process the data. When writing, the opposite is true, and the data output from the execution unit 4 is passed to the aligner 3 via the internal data bus 14. The aligner 3 rearranges the data from the internal format to the address expression format instructed by the signal 15, contrary to the reading operation, and writes the data into the main memory 2 via the bus 13.

Furthermore, if data cannot be aligned using only the aligner 3, a signal 15 is transmitted to the execution unit control device 5, and the execution unit control device 5 changes the processing of the execution unit 4 when executing an instruction. It is now possible to respond by

〔Effect of the invention〕

As described above, according to the present invention, in an information processing device in which data with different address expression formats coexist, different data can be expressed in the address format of data in an address conversion table without preprocessing the data. It can be processed by storing bits and there is no preprocessing overhead. Further, a program for one address expression format can process data of different address expression formats by changing the contents of the address conversion table, and there is no need to create separate programs corresponding to the data formats.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention. 1...Central processing unit, 2...Main storage device, 3...
Aligner, 4... Execution unit, 5... Execution unit control device, 6... Main memory, 7... Big Indian expression data, 8... Little Indian expression data, 9... Address conversion table , 10...Address expression format specification pin I..., 11...Copying the address conversion table corresponding to the address to be accessed, 12...
- Copy of address expression format designation bits corresponding to the address to be accessed, 13...data bus, 14...internal data bus.

Claims (1)

[Claims] In an information processing device that handles a mixture of data expressed using multiple byte address and bit address expression methods, the address expression format of the data handled is specified in the address conversion table used to convert from a logical address to a physical address. A bit is provided to indicate the representation format, and all data in the physical address is assumed to be the indicated data representation method, and the data is manipulated by hardware or a microprogram. By changing the handling method, it is possible to centrally manipulate and calculate data in multiple representation methods using one program without changing the program to correspond to the data address representation method. Characteristic data processing method.