JPH0336320B2 - - Google Patents

Info

Publication number
JPH0336320B2
JPH0336320B2 JP56177490A JP17749081A JPH0336320B2 JP H0336320 B2 JPH0336320 B2 JP H0336320B2 JP 56177490 A JP56177490 A JP 56177490A JP 17749081 A JP17749081 A JP 17749081A JP H0336320 B2 JPH0336320 B2 JP H0336320B2
Authority
JP
Japan
Prior art keywords
coating film
coating
electrodeposition
shows
present
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56177490A
Other languages
Japanese (ja)
Other versions
JPS5878494A (en
Inventor
Masashi Akazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP17749081A priority Critical patent/JPS5878494A/en
Publication of JPS5878494A publication Critical patent/JPS5878494A/en
Publication of JPH0336320B2 publication Critical patent/JPH0336320B2/ja
Granted legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明は、低コストで放熱性の良好なアデイテ
イブプリント配線板の製造に関するもので、更に
は電着塗装によつて絶縁処理をしたメタルコアの
プリント配線板の改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the production of additive printed wiring boards with good heat dissipation properties at low cost, and furthermore, to improvement of printed wiring boards with metal cores insulated by electrodeposition coating. It is related to.

LSIの高密度実装が求められている今日、発熱
の問題を解決するためメタルコアの放熱基板が
種々検討されている。メタル基板の表面を絶縁化
する方法には、粉体塗装、電着塗装、ロールコー
ター塗装、絶縁シート張付など色々あるが、スル
ーホール穴加工後均一な塗膜を低コストで付ける
という特徴を有する電着塗装が注目されている。
しかしながら従来の電着塗装は、電着直後の膜厚
均一性は良いが、加熱硬化する時点で塗料が流れ
てエツジ部が極端に薄くなり、導線とコアのメタ
ルがリークし易いという問題と、他に塗膜とメツ
キで形成する導体パターンとの密着性が充分出な
いという2つの大きな欠点があつた。これらの欠
点を改良するため、塗料中に無機顔料やフイラー
を大量に分散してエツジの流れを物理的に止めよ
うとする方法がとられているが、絶縁の信頼性は
低く、また表面の平滑性が損われるため不適当で
あつた。またクロム硫酸混液でエツチングしてメ
ツキの密着性を向上しようとする通常の方法も充
分なピール強度を得ていない。
Today, with the demand for high-density packaging of LSIs, various metal-core heat dissipation boards are being considered to solve the problem of heat generation. There are various methods for insulating the surface of metal substrates, such as powder coating, electrodeposition coating, roll coater coating, and insulating sheet pasting. Electrodeposition coatings are attracting attention.
However, conventional electrodeposition coatings have good film thickness uniformity immediately after electrodeposition, but the problem is that the paint flows when heated and hardened, making the edges extremely thin, and the metal of the conductor and core easily leaks. There were two other major drawbacks: insufficient adhesion between the coating film and the conductive pattern formed by plating. In order to improve these drawbacks, methods have been used to physically stop the edge flow by dispersing large quantities of inorganic pigments and fillers in the paint, but the reliability of the insulation is low, and the surface This was inappropriate because the smoothness was impaired. Furthermore, the usual method of etching with a chromium sulfuric acid mixture to improve the adhesion of plating does not provide sufficient peel strength.

本発明はこのような課題を解決しようとするも
ので、その目的とするところは、例えば導線とコ
アのメタルとのリークが防止されると共に導体パ
ターンの密着性が向上できる等品質の優れたプリ
ント配線板の製造方法を提供するところにある。
The present invention aims to solve these problems, and its purpose is to provide a print with excellent quality, which can prevent leakage between the conductor and the core metal, and improve the adhesion of the conductor pattern. The purpose of the present invention is to provide a method for manufacturing a wiring board.

本発明のプリント配線板の製造方法は、金属基
板の表面に電気的絶縁が可能となる塗膜を形成す
る第1の電着塗装工程と、前記塗膜中の水分を除
去する第2の低温乾燥工程と、水分の除去された
前記塗膜上に導体パターンを形成する第3の無電
解メツキ工程と、前記塗膜を硬化させる第4の加
熱硬化工程とからなることを特徴とする。
The method for manufacturing a printed wiring board of the present invention includes a first electrodeposition coating step for forming a coating film that enables electrical insulation on the surface of a metal substrate, and a second low temperature coating step for removing moisture in the coating film. It is characterized by comprising a drying step, a third electroless plating step for forming a conductor pattern on the coating film from which moisture has been removed, and a fourth heat curing step for curing the coating film.

以下本発明の実施例について従来技術の実施例
と比較しながら説明する。第1図に従来法と本発
明の相異を図示する。Aは従来法の工程を示し、
(イ)は電着直後の断面状態で、メタルコア1は全面
ほぼ均一な塗膜2で被われている。また塗膜には
コア部までは到達しない微細な溝が多数存在す
る。(ロ)は加熱硬化後の断面で、エツジ部の塗料は
表面張力で周辺へ引つぱられて非常に薄くなる。
バリ等が出ていると往々にして絶縁不良となる。
一般にエツジ部の厚みは平担部に比べて1割以下
となる。(ハ)は塗膜上に導体となる無電解メツキを
施こしたところを示す。次にBは本発明の工程を
示し、(イ)は電着直後の状態、(ロ)は硬化前に無電解
メツキをした状態、(ハ)はその後に加熱硬化した状
態を示す。以上述べたように本願発明によれば、
金属基板の表面に電気的絶縁が可能となる塗膜を
形成する第1の電着塗装工程後に塗膜中の水分を
除去する第2の低温乾燥工程が施され、この水分
除去された塗膜上に導体パターンを形成する第3
の無電解メツキ工程が施された後に塗膜を硬化さ
せる第4の加熱硬化工程が施されるので、例え
ば、塗膜の硬化後にメツキが施され、その際塗料
が流動して塗膜厚さが不均一となる従来技術と比
較すれば、硬化前の塗膜はメツキ皮膜によつて押
えられているので、その後に施される加熱硬化工
程によつて流動することがなく均一な塗膜厚さが
形成されることから、この均一な塗膜によつて電
気的絶縁性が確実にされ、塗膜が薄くなりすぎて
途切れてしまうことによつて発生する不必要な電
気的導通が防止できるという効果を有する。
Embodiments of the present invention will be described below while comparing them with embodiments of the prior art. FIG. 1 illustrates the differences between the conventional method and the present invention. A shows the process of the conventional method,
(A) shows the cross-sectional state immediately after electrodeposition, and the metal core 1 is covered with a substantially uniform coating film 2 over the entire surface. Furthermore, there are many fine grooves in the coating that do not reach the core. (b) is a cross section after heat curing, where the paint on the edges is pulled toward the periphery by surface tension and becomes extremely thin.
If burrs or the like are present, it often results in poor insulation.
Generally, the thickness of the edge portion is less than 10% of that of the flat portion. (c) shows electroless plating applied to the paint film to serve as a conductor. Next, B shows the steps of the present invention, (a) shows the state immediately after electrodeposition, (b) shows the state after electroless plating before curing, and (c) shows the state after heat curing. As described above, according to the present invention,
After the first electrodeposition coating process to form a coating film that enables electrical insulation on the surface of the metal substrate, a second low-temperature drying process is performed to remove moisture from the coating film, and the coating film from which moisture has been removed is A third layer on which a conductor pattern is formed.
After the electroless plating process is performed, a fourth heat curing process is performed to harden the coating film. Compared to conventional technology, where the coating film is uneven, the coating film before curing is held down by the plating film, so it does not flow during the subsequent heat curing process, resulting in a uniform coating thickness. This uniform coating ensures electrical insulation and prevents unnecessary electrical conduction that would otherwise occur if the coating becomes too thin and breaks. It has this effect.

また電着塗装の際に形成される塗膜の表面の粗
さが粗いので、メツキされる表面積が拡大される
ことから、密着性が向上できるという効果も有す
る。
Furthermore, since the surface of the coating film formed during electrodeposition coating is rough, the surface area to be plated is expanded, which also has the effect of improving adhesion.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はメタルコア電着塗装プリント配線板の
断面図で、Aは従来法、Bは本発明法を工程順に
図示したものである。1はコアとなるメタル、2
は電着塗料、3は導体となる無電解メツキを示
す。
FIG. 1 is a sectional view of a metal core electrodeposition coated printed wiring board, in which A shows the conventional method and B shows the method of the present invention in the order of steps. 1 is the core metal, 2
3 indicates electrodeposition paint, and 3 indicates electroless plating that becomes a conductor.

Claims (1)

【特許請求の範囲】[Claims] 1 金属基板の表面に電気的絶縁が可能となる塗
膜を形成する第1の電着塗装工程と、前記塗膜中
の水分を除去する第2の低温乾燥工程と、水分の
除去された前記塗膜上に導体パターンを形成する
第3の無電解メツキ工程と、前記塗膜を硬化させ
る第4の加熱硬化工程とからなることを特徴とす
るプリント配線板の製造方法。
1. A first electrodeposition coating step for forming a coating film that can provide electrical insulation on the surface of a metal substrate, a second low-temperature drying step for removing moisture from the coating film, and a second low-temperature drying step for removing moisture from the coating film. A method for manufacturing a printed wiring board, comprising a third electroless plating step for forming a conductor pattern on the coating film, and a fourth heat curing step for curing the coating film.
JP17749081A 1981-11-05 1981-11-05 Method of producing printed circuit board Granted JPS5878494A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17749081A JPS5878494A (en) 1981-11-05 1981-11-05 Method of producing printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17749081A JPS5878494A (en) 1981-11-05 1981-11-05 Method of producing printed circuit board

Publications (2)

Publication Number Publication Date
JPS5878494A JPS5878494A (en) 1983-05-12
JPH0336320B2 true JPH0336320B2 (en) 1991-05-31

Family

ID=16031807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17749081A Granted JPS5878494A (en) 1981-11-05 1981-11-05 Method of producing printed circuit board

Country Status (1)

Country Link
JP (1) JPS5878494A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0680894B2 (en) * 1984-07-17 1994-10-12 三菱電機株式会社 Metal core printed circuit board manufacturing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5593287A (en) * 1979-01-08 1980-07-15 Hitachi Ltd Method of fabricating printed circuit board
JPS5639076A (en) * 1971-07-08 1981-04-14 Sandoz Ag Manufacture of organic compound

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5639076A (en) * 1971-07-08 1981-04-14 Sandoz Ag Manufacture of organic compound
JPS5593287A (en) * 1979-01-08 1980-07-15 Hitachi Ltd Method of fabricating printed circuit board

Also Published As

Publication number Publication date
JPS5878494A (en) 1983-05-12

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