JPH0335673A - Automatic signal discriminator - Google Patents

Automatic signal discriminator

Info

Publication number
JPH0335673A
JPH0335673A JP1170272A JP17027289A JPH0335673A JP H0335673 A JPH0335673 A JP H0335673A JP 1170272 A JP1170272 A JP 1170272A JP 17027289 A JP17027289 A JP 17027289A JP H0335673 A JPH0335673 A JP H0335673A
Authority
JP
Japan
Prior art keywords
signal
circuit
signal processing
muse
processing circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1170272A
Other languages
Japanese (ja)
Inventor
Hiroyuki Nakayama
裕之 中山
Yoshiki Mizutani
芳樹 水谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1170272A priority Critical patent/JPH0335673A/en
Publication of JPH0335673A publication Critical patent/JPH0335673A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To automatically discriminate the system of a received signal by providing plural signal processing circuits to process the signals being respectively various in system and a discriminating signal generating circuit to specifically discriminate the signal system and to connect the corresponding signal processing circuit. CONSTITUTION:When the signal to be applied to a first changeover switch circuit 2 is an NTSC signal, the circuit 2 sends the signal to an NTSC signal processing circuit 3 by an output from a discriminating signal generating circuit 5 and when the signal is a MUSE signal, the signal is sent to a MUSE signal processing circuit 4. The discriminating signal generating circuit 5 is connected to the MUSE signal processing circuit 4 and equipped with function to specify the MUSE signal. A second changeover switch circuit 6 reacts the output signal from the discriminating signal generating circuit 5, switches and outputs the output signal of the NTSC signal processing circuit 3 and the output signal of the MUSE signal processing circuit 4.

Description

【発明の詳細な説明】 [産業上の利用分野コ 本発明は、自動信号判別装置、特に、MUSE信号、N
TSC信号、PAL信号等の受信信号を自動的に判別し
て、受信信号に適合した回路を作動させる自動信号判別
装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to an automatic signal discriminator, in particular a MUSE signal, an N
The present invention relates to an automatic signal discrimination device that automatically discriminates received signals such as TSC signals and PAL signals and operates a circuit suitable for the received signals.

[従来の技術] 第2図は例えば特開昭62−173859号公報に示さ
れた従来の位相同期信号再生装置であり、図において、
A/D変換器(8)、フレームパルス検出回路(9)、
フレームパルス位参目検出回路(10)、同期はずれ判
定回路(11) 、HD位相比較回路(12) 、ルー
プフィルタ(13)、D/A変換器(14)、VCXO
(15) 、Hカウンタ(16) 、Vカウンタ(17
) 、同期引込み判定回路(18)が示されている。
[Prior Art] FIG. 2 shows a conventional phase-synchronized signal reproducing device disclosed in, for example, Japanese Patent Laid-Open No. 173859/1985.
A/D converter (8), frame pulse detection circuit (9),
Frame pulse position reference detection circuit (10), out-of-synchronization determination circuit (11), HD phase comparison circuit (12), loop filter (13), D/A converter (14), VCXO
(15), H counter (16), V counter (17)
), a synchronization pull-in determination circuit (18) is shown.

次に動作について説明する。MUSE方式のベースバン
ド信号はA/D変換器(8)に印加され、ディジタル信
号に変換された後、フレームパルス検出回路(9)及び
HD位相比較回路(12)に加えられる。フレームパル
ス検出回路(9)は、上記A/D変換器(8)の出力信
号中でフレームパルスが出現する時刻を検出する。また
vcx。
Next, the operation will be explained. The baseband signal of the MUSE method is applied to an A/D converter (8), converted into a digital signal, and then applied to a frame pulse detection circuit (9) and an HD phase comparison circuit (12). A frame pulse detection circuit (9) detects the time at which a frame pulse appears in the output signal of the A/D converter (8). Also vcx.

(15)は中心周波数が16.2MHzであり、Vカウ
ンタ(17)は上記VCOX (15) の出力信号を
分周し、30Hzの内部フレームパルス信号を発生する
。上記フレームパルス検出回路(9)の出力信号と上記
Vカウンタ(17)の出力信号はフレームパルス位相比
較回路(10)に印加され、このフレームパルス位相検
出回路(10)では、上記フレームパルス検出回路(9
)の出力信号で検出フレームパルス点と上記Vカウンタ
(17)の出力信号である内部フレームパルス信号の特
定の点が位相比較される。一方HD位相比較回路(12
)は上記A/D変換器(8)の出ノノ信号中のHD信号
とHカウンタ(16)の出力信号である内部HD信号と
て位相比較を行う。
(15) has a center frequency of 16.2 MHz, and a V counter (17) divides the output signal of the VCOX (15) to generate an internal frame pulse signal of 30 Hz. The output signal of the frame pulse detection circuit (9) and the output signal of the V counter (17) are applied to a frame pulse phase comparison circuit (10), and in this frame pulse phase detection circuit (10), the frame pulse detection circuit (9
), the detected frame pulse point and a specific point of the internal frame pulse signal which is the output signal of the V counter (17) are compared in phase. On the other hand, HD phase comparator circuit (12
) performs a phase comparison between the HD signal in the output signal of the A/D converter (8) and the internal HD signal which is the output signal of the H counter (16).

このHD位相比較回路(12)の出力信号は、ループフ
ィルタ(13)を経て上記VCXO(15)に印加され
るように構成されている。同期はずれ判定回路(11)
は上記フレームパルス位相検出回路(10)の信号を受
けて、第2図に示す系が同期状態か非同期状態かを判定
して例えば“0”“1゛の信号を次に述べる同期引込み
判定回路(18)に出力する。同期引込み判定回路(1
8)はローパスフィルタの機能を持たせたもので、上記
同期はずれ判定回路(11)の出力をある期間積分して
系が同期状態の期間は例えば“0゛、非同期状態の時は
“1°を出力するものである。
The output signal of this HD phase comparison circuit (12) is configured to be applied to the VCXO (15) through a loop filter (13). Out-of-synchronization judgment circuit (11)
receives the signal from the frame pulse phase detection circuit (10), determines whether the system shown in FIG. (18).Synchronization pull-in determination circuit (1
8) has the function of a low-pass filter, and integrates the output of the out-of-synchronization judgment circuit (11) for a certain period, and calculates, for example, "0°" when the system is in a synchronous state, and "1°" when it is in an asynchronous state. This outputs the following.

[発明が解決しようとする課H 上記の通り、従来、同期状態を判別する装置が提案され
ている。
[Problem H to be Solved by the Invention As mentioned above, devices for determining the synchronization state have been proposed.

又、テレビ放送等は国によっては前記方式が異なり、受
信信号方式に応じて自動的に判別して受信できる受信機
が望まれていた。
Furthermore, the format of television broadcasting etc. differs depending on the country, and there has been a desire for a receiver that can automatically discriminate and receive signals according to the reception signal format.

そこで、発明者は鋭意検討した結果、上記同期判別装置
を利用して、受信信号を自動判別できる装置を発明した
Therefore, as a result of intensive study, the inventor invented a device that can automatically discriminate received signals using the synchronization discrimination device described above.

すなわちこの発明は、自動的に受信信号の方式を判別で
きる装置を提供することを目的とする。
That is, an object of the present invention is to provide a device that can automatically determine the format of a received signal.

[課題を解決するための手段] この発明に係る自動信号判別装置は、それぞれ方式の異
なる信号を処理する複数の信号処理回路と、複数の信号
のうち少なくとも一つの信号方式を特定判別して該当す
る信号処理回路を回路接続させる判別信号発生回路とを
有するものである。
[Means for Solving the Problems] An automatic signal discrimination device according to the present invention includes a plurality of signal processing circuits each processing signals of different formats, and a signal processing circuit that specifically discriminates at least one signal format among the plurality of signals and detects a corresponding one. and a discrimination signal generation circuit to which a signal processing circuit is connected.

又、第2請求項においては特に、NTSC信号とMUS
E信号との信号処理回路を設け、両信号方式間の自動判
別をせしめるものである。
In addition, in the second claim, in particular, NTSC signals and MUS
A signal processing circuit for the E signal is provided to automatically discriminate between the two signal systems.

[作用] この発明における自動信号判別回路は、例えばMUSE
信号が印加された峙にロックする機能を持ったPLL回
路を有し、二のPLL回路の同期状態及び非同期状態の
状態信号を使用することにより、MUSE信号とNTS
C信号等を判別し、該当する信号処理回路を自動的に回
路接続する。
[Function] The automatic signal discrimination circuit according to the present invention is, for example, a MUSE
It has a PLL circuit that has the function of locking to the position where the signal is applied, and by using the synchronous state and asynchronous state signals of the two PLL circuits, the MUSE signal and the NTS
C signal etc. and automatically connects the corresponding signal processing circuit.

[実施例コ 以下、この発明の一実施例を図について説明する。第1
図において、入力端(1)、第1の切替スイッチ回路(
2) 、NTSC信号処理回路(3)、MUSE信号処
理回路(4)、判別信号発生回路(5)、第2の切替ス
イッチ回路(6)、出力端(7)が示されている。
[Example 1] An example of the present invention will be described below with reference to the drawings. 1st
In the figure, the input end (1), the first changeover switch circuit (
2) , an NTSC signal processing circuit (3), a MUSE signal processing circuit (4), a discrimination signal generation circuit (5), a second changeover switch circuit (6), and an output terminal (7) are shown.

入力端(1)に印加されたMUSE信号あるいはNTS
C信号は第1の切替スイッチ回路(2)に加えられる。
MUSE signal or NTS applied to input terminal (1)
The C signal is applied to the first changeover switch circuit (2).

第1の切替スイッチ回路(2)は後述する判別信号発生
回路(5)からの出力により、第1の切替スイッチ回路
(2)に加えられ信号がNTSC信号の時は、後述のN
TSC信号処理回路(3)に信号を送出し、また第1の
切替スイッチ回路(2)に加えられた信号がMUSE信
号の場合は後述のMUSE信号処理回路(4)に信号を
送出するように構成されている。NTSC信号処理回路
(3)は例えばNTSC信号に対し所定の信号処理が行
えるよう構成されており、またMUSE信号処理回路(
4)はMUSE信号に対し所定の信号処理が行えるよう
構成されている。
The first changeover switch circuit (2) is applied to the first changeover switch circuit (2) by the output from the discrimination signal generation circuit (5), which will be described later.
A signal is sent to the TSC signal processing circuit (3), and when the signal applied to the first changeover switch circuit (2) is a MUSE signal, a signal is sent to the MUSE signal processing circuit (4) described later. It is configured. The NTSC signal processing circuit (3) is configured to perform predetermined signal processing on, for example, NTSC signals, and the MUSE signal processing circuit (3) is configured to perform predetermined signal processing on NTSC signals.
4) is configured to perform predetermined signal processing on the MUSE signal.

判別信号発生回路(5)は上記MUSE信号処理回路(
4)に接続され、例えば上記従来の技術の項で示したよ
うに位相同期信号回路で構成され、MUSE信号を特定
できる機能を有する。第2の切替スイッチ回路(6)は
上記判別信号発生回路(5)からの出力信号に応動し上
記NTSC信号処理回路(3)の出力信号と上記MUS
E信号処理回路(4)の出力信号を切替えて出力するよ
うに動作する。出力端(7)は上記第2のスイッチ回路
(6)の出力端子であり、例えばMUSE信号とNTS
C信号の両方式の信号が受像できる受像機に接続される
The discrimination signal generation circuit (5) is the MUSE signal processing circuit (
4), and is configured with a phase synchronization signal circuit, for example, as shown in the above-mentioned prior art section, and has a function of specifying the MUSE signal. A second changeover switch circuit (6) responds to the output signal from the discrimination signal generation circuit (5) and outputs the output signal from the NTSC signal processing circuit (3) and the MUS.
It operates to switch and output the output signal of the E signal processing circuit (4). The output terminal (7) is the output terminal of the second switch circuit (6), and for example, outputs the MUSE signal and the NTS signal.
It is connected to a receiver that can receive both types of C signals.

なお上記実施例では、MUSE信号とNTSC信号が入
力端に印加された場合について説明したが、MUSE信
号とそれ以外の信号(例えばPAL信号)でもよい。
In the above embodiment, a case has been described in which a MUSE signal and an NTSC signal are applied to the input terminal, but a MUSE signal and other signals (for example, a PAL signal) may be applied.

また他の用途として上記実施例中、MUSE信号処理回
路をMUSE信号をNTSC信号に変換する信号方式変
換処理回路としてもよい。
In addition, as another application, the MUSE signal processing circuit in the above embodiment may be used as a signal format conversion processing circuit that converts the MUSE signal into an NTSC signal.

上記の通り、この実施例によれば、入力端に設けられる
第1の切替スイッチ回路(2)と、出力側に設けられる
第2の切替スイッチ回路(6)と、これらの両切替スイ
ッチ回路(2)、(6)間に設けられるそれぞれ方式の
異なる信号を処理する複数の信号処理回路(3)、(4
)と、前記方式の異なる複数の信号のうち少なくとも一
つを特定して該当する信号処理回路を接続するように前
記両切替スイッチ回路(2)、(6)を動作させる判別
信号発生回路(5)とを備える自動信号判別装置を構成
することにより、人手をわずられせることなく、対応す
る信号に自動切替できるので種々の用途に利用できるも
のとなる。
As described above, according to this embodiment, the first changeover switch circuit (2) provided at the input end, the second changeover switch circuit (6) provided at the output side, and both changeover switch circuits ( A plurality of signal processing circuits (3) and (4) provided between 2) and (6) each processing signals of different methods.
), and a discrimination signal generation circuit (5) that operates both the changeover switch circuits (2) and (6) so as to identify at least one of the plurality of signals of different types and connect the corresponding signal processing circuit. ) By configuring an automatic signal discriminator that includes the following, it is possible to automatically switch to a corresponding signal without requiring manual labor, so that it can be used for various purposes.

[発明の効果] この発明によれば、以上説明した通り、受信した信号が
MUSE信号であるかその他の信号であるか等を判別し
切替えを可能としたので、例えば受信信号に対応した画
像をTV受像機に供給できる等、6柚の用途に利用でき
る効果が得られる。
[Effects of the Invention] As explained above, according to the present invention, it is possible to determine whether a received signal is a MUSE signal or another signal and to switch between them, so that, for example, an image corresponding to a received signal can be changed. It can be used for various purposes such as being able to be supplied to TV receivers.

特に、第2の請求項によれば、NTSC方式とMUSE
方式のいずれをも受信できるTV受信機を提供できる効
果が得られる。
In particular, according to the second claim, the NTSC system and MUSE
This has the effect of providing a TV receiver that can receive any of the systems.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例を示す自動信号判別装置の
ブロック図、第2図は従来の位相同期信号再生装置のブ
ロック図である。 図において、(1)は入力端、(2)は第1の切替スイ
ッチ回路、(3)はNTSC信号処理回路、(4)はM
USE信号処理回路、(5)は判別信号発生回路、(6
)は第2の切替スイッチ回路、(7)は出力端、(8)
はA/D変換器、(9)はフレームパルス検出回路、(
10)はフレームパルス位相検出回路、(11)は同期
はずれ判別回路、(12)はHD位相比較回路、(13
)はループフィルタ、(14)はD/A変換器、(15
)はVCXO,(16)はHカウンタ、(17)はVカ
ウンタ、(18)は同期引込み判定回路である。 なお、図中、同一符号は同一、又は相当部分を示す。
FIG. 1 is a block diagram of an automatic signal discrimination device showing an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional phase synchronization signal reproducing device. In the figure, (1) is the input terminal, (2) is the first changeover switch circuit, (3) is the NTSC signal processing circuit, and (4) is the M
USE signal processing circuit, (5) is a discrimination signal generation circuit, (6
) is the second changeover switch circuit, (7) is the output terminal, (8)
is an A/D converter, (9) is a frame pulse detection circuit, (
10) is a frame pulse phase detection circuit, (11) is an out-of-synchronization determination circuit, (12) is an HD phase comparison circuit, (13)
) is a loop filter, (14) is a D/A converter, (15
) is a VCXO, (16) is an H counter, (17) is a V counter, and (18) is a synchronization pull-in determination circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (2)

【特許請求の範囲】[Claims] (1)入力側に設けられる第1の切替スイッチ回路と、
出力側に設けられる第2の切替スイッチ回路と、これら
の切替スイッチ間に設けられるそれぞれ方式の異なる信
号を処理する複数の信号処理回路と、前記方式の異なる
複数の信号のうち少なくとも一つを特定して該当する信
号処理回路を接続するように前記両切替スイッチ回路を
動作させる判別信号発生回路とを備える自動信号判別装
置。
(1) A first changeover switch circuit provided on the input side,
A second changeover switch circuit provided on the output side, a plurality of signal processing circuits provided between these changeover switches that process signals of different methods, and specifying at least one of the plurality of signals of different methods. and a discrimination signal generation circuit that operates the two selector switch circuits so as to connect the corresponding signal processing circuits.
(2)特許請求の範囲第1項に記載の自動信号判別装置
において、信号処理回路は、NTSC信号処理回路とM
USE信号処理回路の二回路であり、判別信号発生回路
は、MUSE信号を判別するものであり、MUSE信号
かNTSC信号かを自動判別することを特徴とする自動
信号判別装置。
(2) In the automatic signal discriminator according to claim 1, the signal processing circuit includes an NTSC signal processing circuit and an M
An automatic signal discrimination device comprising two circuits: a USE signal processing circuit, a discrimination signal generation circuit discriminating a MUSE signal, and automatically discriminating whether the signal is a MUSE signal or an NTSC signal.
JP1170272A 1989-06-30 1989-06-30 Automatic signal discriminator Pending JPH0335673A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1170272A JPH0335673A (en) 1989-06-30 1989-06-30 Automatic signal discriminator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1170272A JPH0335673A (en) 1989-06-30 1989-06-30 Automatic signal discriminator

Publications (1)

Publication Number Publication Date
JPH0335673A true JPH0335673A (en) 1991-02-15

Family

ID=15901866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1170272A Pending JPH0335673A (en) 1989-06-30 1989-06-30 Automatic signal discriminator

Country Status (1)

Country Link
JP (1) JPH0335673A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5418815A (en) * 1992-06-12 1995-05-23 Kabushiki Kaisha Toshiba Receiver adaptively operable for multiple signal transmission systems
US5557337A (en) * 1994-02-18 1996-09-17 Hitachi America, Ltd. Automatic television signal detector to differentiate NTSC signals from HDJV/AJV signals
US5898463A (en) * 1995-02-15 1999-04-27 Victor Company Of Japan, Ltd. Image display apparatus
US7758382B2 (en) 2007-08-31 2010-07-20 Fujitsu Limited Connector with isolating end face and side connections and information processing apparatus including connector

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5418815A (en) * 1992-06-12 1995-05-23 Kabushiki Kaisha Toshiba Receiver adaptively operable for multiple signal transmission systems
US5557337A (en) * 1994-02-18 1996-09-17 Hitachi America, Ltd. Automatic television signal detector to differentiate NTSC signals from HDJV/AJV signals
US5898463A (en) * 1995-02-15 1999-04-27 Victor Company Of Japan, Ltd. Image display apparatus
US7758382B2 (en) 2007-08-31 2010-07-20 Fujitsu Limited Connector with isolating end face and side connections and information processing apparatus including connector

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