JPH0335600A - Method of mounting semiconductor element - Google Patents
Method of mounting semiconductor elementInfo
- Publication number
- JPH0335600A JPH0335600A JP1169934A JP16993489A JPH0335600A JP H0335600 A JPH0335600 A JP H0335600A JP 1169934 A JP1169934 A JP 1169934A JP 16993489 A JP16993489 A JP 16993489A JP H0335600 A JPH0335600 A JP H0335600A
- Authority
- JP
- Japan
- Prior art keywords
- adhesive
- semiconductor element
- peeled
- adhesive tape
- tape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 32
- 238000000034 method Methods 0.000 title claims description 11
- 239000000853 adhesive Substances 0.000 claims abstract description 36
- 230000001070 adhesive effect Effects 0.000 claims abstract description 36
- 239000002390 adhesive tape Substances 0.000 claims abstract description 24
- 239000000463 material Substances 0.000 claims description 15
- 238000004519 manufacturing process Methods 0.000 claims 1
- 238000004806 packaging method and process Methods 0.000 abstract 1
- 239000010931 gold Substances 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 5
- 239000000758 substrate Substances 0.000 description 4
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Supply And Installment Of Electrical Components (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体素子上キャリアテープに粘着テープで
接着して搬送し、所定の位置で粘着テｆｆ剥がしてキャ
リアテープから分離し、基板に面実装する半導体素子の
実装方法に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to adhesively transporting a semiconductor device by adhering it to a carrier tape, peeling off the adhesive tape at a predetermined position to separate it from the carrier tape, and attaching it to a substrate. This invention relates to a surface mounting method for semiconductor elements.
第３図（ａ） 、 （ｂｌ 、 （ｅｌは従来の半導体
素子の実装方法の一例金示す。FIG. 3(a), (bl, (el) shows an example of a conventional semiconductor device mounting method.
図にふ・いてｌは半導体素子、２はキャリアテーグ、３
は粘着テープ、４は粘着材、５は基板、６は接着剤であ
る。In the figure, l is a semiconductor element, 2 is a carrier tag, and 3
is an adhesive tape, 4 is an adhesive material, 5 is a substrate, and 6 is an adhesive.
半導体素子１ｉキヤリアテープ２に粘着テープ３で接着
して搬送し、所定の位置で１図（ａ）に示すように、粘
着テープ３金剥がしてゆき、キャリアテープ２から分離
した半導体素子１ｉ真空チヤツク等（図示してない）で
保持し１図（ｂｌに示すように、あらかじめ仮止め用の
接着剤６金塗布して釦いた基板５の実装位置に位置合わ
せ金して接着し。Semiconductor element 1i is adhered to carrier tape 2 with adhesive tape 3 and transported, and at a predetermined position, as shown in FIG. etc. (not shown), and as shown in Fig. 1 (bl), apply adhesive 6 gold for temporary fixing in advance and position the button at the mounting position of the board 5 and bond it.
図（ｅ）に示すように、仮止めする。Temporarily fasten as shown in Figure (e).
そして、電極端子の半田付けなどを行ない実装する。Then, the electrode terminals are soldered and mounted.
従来の実装方法では、あらかじめ基板の実装位置に仮止
め用の接着剤金塗布して釦かねばならず。In the conventional mounting method, it is necessary to apply gold temporary adhesive to the mounting position of the board before attaching the button.
このことが実装機械上複雑にするとともに１作業の効率
化の妨げになってきた。筐た。接着剤が素子電極４汚し
たシ、半導体素子の裏面状態によシ。This has made the mounting machine complex and has hindered the efficiency of one operation. It was a cabinet. The adhesive may have contaminated the device electrodes 4, and the condition of the back side of the semiconductor device may have caused some damage.
テーピングの剥離強度がばらつくという問題があった。There was a problem that the peel strength of the taping varied.
本発明は、上記の問題を解消するためになされたもので
、あらかじめ基板に仮止め用接着剤を塗布してふ・く必
要のない実装方法上提供することを目的とする。The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a mounting method that does not require pre-applying a temporary fixing adhesive to a board.
粘着テープの半導体素子上接着する面を粘着材が剥離し
易い状態に加工し、該面上の粘着材金属く塗布した（該
面上のみの粘着材金属くしても。The surface of the adhesive tape that adheres to the semiconductor element was processed so that the adhesive material could be easily peeled off, and the adhesive metal was coated on that surface (even if the adhesive metal was only applied on that surface).
また、粘着テープ全域上の粘着材を厚くしてもよい）キ
ャリアテープｆ使用し、粘着テープ’ｌｊ（剥がすと、
粘着テープから剥離して半導体素子の裏面に粘着した状
態で残る粘着材によって半導体素子上基板の実装位置に
仮止めし１面実装する方法である。In addition, the adhesive material on the entire area of the adhesive tape may be made thicker).
This is a one-sided mounting method in which the semiconductor element is temporarily fixed at the mounting position on the substrate using the adhesive material that remains on the back surface of the semiconductor element after being peeled off from the adhesive tape.
第１図（ａ） 、 （ｂ）は本発明の実装方法の一例金
示す。FIGS. 1(a) and 1(b) show an example of the mounting method of the present invention.
図′に釦いて１２．５は第３図の同一符号と同一または
相当するものを示し、３ａは半導体素子上接着する面１
３金粘着材が剥離し易い状態に加工した粘着テープ、４
ａは粘着チー７’ ３ ａの面１３上に厚く塗布した粘
着材である。In the figure, 12.5 indicates the same or equivalent to the same reference numerals in FIG.
Adhesive tape with 3-gold adhesive material processed to make it easy to peel off, 4
A is an adhesive material that is thickly applied on the surface 13 of the adhesive chip 7' 3a.
所定の位置で１図（ａ）に示すように、粘着テープ３ａ
ｉ剥がしてゆくと、粘着材４ａが粘着テープ３ａから剥
離して、半導体素子ｌの裏面に粘着した状態で残る。At a predetermined position, as shown in Figure 1(a), apply adhesive tape 3a.
When it is peeled off, the adhesive material 4a peels off from the adhesive tape 3a and remains stuck to the back surface of the semiconductor element l.
裏面に粘着材４ａが粘着した半導体素子ｌ金真空チャッ
ク等で保持し、基板５の実装位置に位置合わせ金して基
板５に押しつけ１図（ｂ）に示すように、仮止めする。The semiconductor element with the adhesive material 4a adhered to the back side is held using a gold vacuum chuck or the like, aligned with the mounting position on the board 5, and pressed against the board 5 and temporarily fixed as shown in FIG. 1(b).
第２図に示すように、半導体素子ｌを接着する面１３金
粘着剤が剥離し易い状態に加工した粘着チー７’ ３
ａ表面全域に粘着材４ａｉ厚く塗布したもの４使用して
も、粘着チー７’ ３ ａ ｆ剥がしてゆくと、半導体
素子ｌに粘着した粘着材部分は粘着テープ３ ａから剥
離して半導体素子ｌの裏面に残り、第１図の場合と同じ
結果が得られる。As shown in FIG. 2, the surface 13 to which the semiconductor element 1 is bonded is an adhesive chip 7' 3 processed so that the gold adhesive can be easily peeled off.
Even if the adhesive material 4ai is thickly applied to the entire surface of the semiconductor chip 7' 3 a f, when peeled off, the part of the adhesive material that has adhered to the semiconductor element l will peel off from the adhesive tape 3a and the semiconductor element l The same result as in FIG. 1 is obtained.
上記方法は、他のチップ型電子部品の面実装にも適用す
ることができる。The above method can also be applied to surface mounting of other chip-type electronic components.
以上説明したように１本発明によれば、あらかじめ基板
の実装位置に仮止め用の接着剤金塗布する必要がなくな
り、実装機械が簡単になう１作業効率が向上し、実装コ
ストが下るとともに、素子電極が汚れることがなくなる
。また、粘着材が粘着テープから剥離される方式である
ため、半導体素子の裏面状態に左右されることなく、一
定の剥離強度が得られる効果がある。As explained above, according to the present invention, it is no longer necessary to apply adhesive gold for temporary fixing to the mounting position of the board in advance, which simplifies the mounting machine.1 Work efficiency is improved and mounting costs are reduced. , the device electrodes will not get dirty. Furthermore, since the adhesive material is peeled off from the adhesive tape, a constant peel strength can be obtained regardless of the state of the back surface of the semiconductor element.
第１図（ａ） 、 （ｂ）は本発明の実装方法の一例を
示す断面図、第２図は粘着テープ表面全域に粘着材金属
く塗布した例を示す断面図、第３図（ａ） 、 （ｂ）
、 （ｅ）は従来の半導体素子の実装方法を示す断面
図である。
１・・・半導体素子、２・・・キャリアテープ、３ａ・
・・粘着テープ、４ａ・・・粘着材、５・・・基板、１
３・・・粘着チー７’ ３ ａの加工面。
な−お図中同一符号は同−筐たは相当する部分金石す。Figures 1 (a) and (b) are cross-sectional views showing an example of the mounting method of the present invention, Figure 2 is a cross-sectional view showing an example in which adhesive metal is coated over the entire surface of the adhesive tape, and Figure 3 (a). , (b)
, (e) is a cross-sectional view showing a conventional method for mounting a semiconductor element. DESCRIPTION OF SYMBOLS 1... Semiconductor element, 2... Carrier tape, 3a.
...Adhesive tape, 4a...Adhesive material, 5...Substrate, 1
3... Processed surface of adhesive chip 7' 3 a. Note that the same symbols in the drawings indicate the same casings or corresponding parts.
Claims (1)
搬送し、所定の位置で粘着テープを剥がしてキャリアテ
ープから分離し、真空チャック等で保持し基板の実装位
置に配置して面実装する半導体素子の実装方法において
、 粘着テープの半導体素子を接着する面を粘着材が剥離し
易い状態に加工し、該面上の粘着材を厚くしたキャリア
テープを製作する工程と、 半導体素子を上記キャリアテープに粘着テープで接着し
て搬送し、所定の位置で粘着テープを剥がしてキャリア
テープから分離し、粘着テープから剥離して該半導体素
子の裏面に粘着した状態で残った粘着材によって基板の
実装位置に仮止めする工程とを備えたことを特徴とする
半導体素子の実装方法。[Scope of Claims] A semiconductor element is adhered to a carrier tape with an adhesive tape and transported, the adhesive tape is peeled off at a predetermined position to separate it from the carrier tape, the semiconductor element is held with a vacuum chuck, etc., and placed at a mounting position on a board. A surface-mounting method for mounting a semiconductor device includes the steps of: processing the surface of the adhesive tape to which the semiconductor device is bonded so that the adhesive material can be easily peeled off, and manufacturing a carrier tape with a thick adhesive material on the surface; is adhered to the carrier tape with adhesive tape and transported, the adhesive tape is peeled off at a predetermined position to separate it from the carrier tape, and the adhesive material remaining on the back surface of the semiconductor element after peeling off from the adhesive tape 1. A method for mounting a semiconductor element, comprising the step of temporarily fixing it at a mounting position on a board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1169934A JPH0335600A (en) | 1989-07-03 | 1989-07-03 | Method of mounting semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1169934A JPH0335600A (en) | 1989-07-03 | 1989-07-03 | Method of mounting semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0335600A true JPH0335600A (en) | 1991-02-15 |
Family
ID=15895630
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1169934A Pending JPH0335600A (en) | 1989-07-03 | 1989-07-03 | Method of mounting semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0335600A (en) |
-
1989
- 1989-07-03 JP JP1169934A patent/JPH0335600A/en active Pending
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