JPH0334647B2 - - Google Patents
Info
- Publication number
- JPH0334647B2 JPH0334647B2 JP55188002A JP18800280A JPH0334647B2 JP H0334647 B2 JPH0334647 B2 JP H0334647B2 JP 55188002 A JP55188002 A JP 55188002A JP 18800280 A JP18800280 A JP 18800280A JP H0334647 B2 JPH0334647 B2 JP H0334647B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- polycrystalline silicon
- semiconductor
- light absorption
- light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 39
- 230000031700 light absorption Effects 0.000 claims description 26
- 238000000151 deposition Methods 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 13
- 238000010438 heat treatment Methods 0.000 claims description 8
- 238000010521 absorption reaction Methods 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 230000001678 irradiating effect Effects 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- 230000008569 process Effects 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 44
- 238000001816 cooling Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 238000002844 melting Methods 0.000 description 4
- 230000008018 melting Effects 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- -1 Si 3 N 4 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000002745 absorbent Effects 0.000 description 1
- 239000002250 absorbent Substances 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000001427 coherent effect Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Health & Medical Sciences (AREA)
- High Energy & Nuclear Physics (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Description
【発明の詳細な説明】
本発明はレーザを用いた加熱処理に関するもの
であり、加熱される半導体膜の均一性を向上させ
ることを目的とする。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to heat treatment using a laser, and aims to improve the uniformity of a heated semiconductor film.
周知のように、レーザはコヒーレントな光であ
りしかも単位面積あたりのエネルギ密度が大き
い。半導体の分野では上記の特徴を生かしてイオ
ン注入後のアニールや多結晶シリコン層へのドー
ピング抵抗を下げるために用いられようとしてい
る。レーザ光が半導体に照射されると吸収係数が
大きいために半導体表面よりわずか数μｍの深さ
にほとんどの光エネルギが吸収され、瞬時にして
半導体方面が溶融してしまう。そして照射が終る
と数秒で冷却する。このためイオン注入された不
純物子は拡散する間もなく活性化される。即ち不
純物分子はイオン注入後の深さ方向の分布を維持
することが可能で、高密度のLSIではシヨートチ
ヤネル効果を抑制するために重要である。また多
結晶シリコンではレーザ照射によつてグレイン
（結晶粒界）が大きくなるので不純物をドープし
た場合に抵抗値が著しく下がつて例えば10Ω／cm2
以下になるなど、高密度化や高速化にとつて重要
な改善が期待されている。 As is well known, a laser is coherent light and has a high energy density per unit area. In the field of semiconductors, the above-mentioned characteristics are being used to reduce the annealing resistance after ion implantation and the doping resistance of polycrystalline silicon layers. When a semiconductor is irradiated with laser light, most of the light energy is absorbed at a depth of just a few μm below the semiconductor surface due to its large absorption coefficient, causing the semiconductor to melt instantly. After irradiation, it cools down within a few seconds. Therefore, the ion-implanted impurity particles are activated before they diffuse. That is, it is possible to maintain the distribution of impurity molecules in the depth direction after ion implantation, which is important for suppressing short channel effects in high-density LSIs. In addition, in polycrystalline silicon, the grains (crystal grain boundaries) become large due to laser irradiation, so when doped with impurities, the resistance value decreases significantly, for example, 10Ω/cm 2
Important improvements are expected for higher density and faster speeds, such as:
多結晶シリコンのグレインサイズはCVD法に
よる被着では堆積時の温度と膜厚によつて異なる
が1μｍを越えることはなく一般的には0.1μｍ前後
であり、したがつて正孔や電子などのキヤリアの
移動度も10cm2／V.secを越えをことは難しい。と
ころがレーザ照射によつて多結晶シリコンのグレ
インサイズは容易に10μｍを越すようになりキヤ
リアの移動度も100cm2／V.secを越すことは困難
ではなくなつてきた。 When deposited using the CVD method, the grain size of polycrystalline silicon varies depending on the temperature and film thickness during deposition, but it does not exceed 1 μm and is generally around 0.1 μm. The carrier's mobility is also difficult to exceed 10cm 2 /V.sec. However, by laser irradiation, the grain size of polycrystalline silicon easily exceeds 10 μm, and it is no longer difficult to increase the carrier mobility to exceed 100 cm 2 /V.sec.
しかしながら、レーザのビームスポツトが数〜
数十μｍもあるために、例えば石英板などの絶縁
板に被着された多結晶シリコンをレーザ照射する
場合には走査が必要であり、またビームスポツト
内の分布も加わつて均一なレーザ照射が難しい。
このためにグレインサイズも揃わないといつた欠
点が知られている。したがつてレーザ照射された
多結晶シリコンでは単結晶シリコンのように特性
の揃つた素子を得るのは困難である。 However, the number of laser beam spots is
Because the diameter is several tens of μm, scanning is required when laser irradiating polycrystalline silicon adhered to an insulating plate such as a quartz plate, and the distribution within the beam spot also makes it difficult to achieve uniform laser irradiation. difficult.
For this reason, the grain size is not uniform, which is a known drawback. Therefore, it is difficult to obtain elements with uniform characteristics like single crystal silicon using laser irradiated polycrystalline silicon.
第１図は多結晶シリコンのレーザ照射を示す断
面図である。１は絶縁性基板で、石英もしくは表
面を酸化された単結晶シリコン基板が選ばれる。
MOSトランジスタなどの半導体素子を形成する
に際して800℃以上の高温工程を使用しなければ
基板１はガラス板でも差支えない。基板１上に多
結晶シリコン膜２を例えば5000〓の厚みで被着す
る。外気による汚染を避けるためには多結晶シリ
コン膜２上に絶縁膜３を被着しておくとよい。絶
縁膜３は300〜1000〓と薄く形成され、材質は酸
化シリコン、窒化シリコン、アルミナなどが一般
的である。また被着方法はCVD法でもよく、熱
酸化であつても差支えない。 FIG. 1 is a cross-sectional view showing laser irradiation of polycrystalline silicon. 1 is an insulating substrate, and quartz or a single crystal silicon substrate whose surface is oxidized is selected.
The substrate 1 may be a glass plate as long as a high temperature process of 800° C. or higher is not used when forming a semiconductor element such as a MOS transistor. A polycrystalline silicon film 2 is deposited on a substrate 1 to a thickness of, for example, 5000 mm. In order to avoid contamination by outside air, it is preferable to deposit an insulating film 3 on the polycrystalline silicon film 2. The insulating film 3 is formed as thin as 300 to 1000 mm, and is typically made of silicon oxide, silicon nitride, alumina, or the like. Further, the deposition method may be a CVD method or thermal oxidation.
第１図ａに示すようにビームスポツト10〜
100μｍの出力１〜10Wのアルゴンレーザ光４を
多結晶シリコン膜２に照射しながら毎秒数cmの速
度でまず紙面と平行な方向に動かして端から端ま
で走査し、次に紙面と垂直な方向にビームスポツ
トの大きさの約半分，５〜50μｍほどステツプ状
に動かし再び端から端まで走査する。この操作を
繰り返すことにより多結晶シリコン膜２の全面を
レーザ照射する。もちろんレーザ光４を固定して
おいて基板１を動かす操作でも何ら差支えない。 As shown in Figure 1a, the beam spot 10~
While irradiating the polycrystalline silicon film 2 with an argon laser beam 4 of 100 μm and an output of 1 to 10 W, it is moved at a speed of several centimeters per second in a direction parallel to the paper surface and scanned from end to end, and then in a direction perpendicular to the paper surface. Next, move the beam in steps of about half the size of the beam spot, about 5 to 50 μm, and scan from end to end again. By repeating this operation, the entire surface of the polycrystalline silicon film 2 is irradiated with the laser. Of course, there is no problem with the operation of moving the substrate 1 while keeping the laser beam 4 fixed.
第１図ｂはレーザ照射終了後の断面図である。
ビームスポツトを重ね合わせることによつて生じ
るすじ状の走査むら５が発生し、基板１と多結晶
シリコン膜２との熱膨張係数の違いから冷却時に
多数のひび割れ６の生じることが分つた。走査む
ら５は多結晶シリコン膜２のグレインサイズの変
化に対応し、ひび割れ６は多結晶シリコン膜２の
不連続点となるために第１図ｂに示されたような
多結晶シリコン膜２を用いてMOSトランジスタ
などの半導体素子やLSIなどを作製した場合には
トランジスタ特性の不揃いや低い歩留が顕著であ
る。 FIG. 1b is a sectional view after the laser irradiation is completed.
It has been found that streak-like scanning irregularities 5 occur due to the overlapping of beam spots, and that many cracks 6 occur during cooling due to the difference in thermal expansion coefficients between the substrate 1 and the polycrystalline silicon film 2. The scanning unevenness 5 corresponds to a change in the grain size of the polycrystalline silicon film 2, and the cracks 6 become discontinuous points in the polycrystalline silicon film 2, so the polycrystalline silicon film 2 as shown in FIG. When semiconductor devices such as MOS transistors, LSIs, etc. are manufactured using this method, irregularities in transistor characteristics and low yields are noticeable.
そこで第２図ａに示すように多結晶シリコン膜
２を島状に分離して７とし、レーザ照射すること
が試みられた。その結果は第２図ｂに示す通りで
ある。レーザ光の照射エネルギが大き過ぎると島
状半導体膜７の周囲が熔溶、冷却時に変形して台
形状９となつたり、あるいは球状となることが分
つた。適正な照射エネルギの場合には島状の半導
体膜は保存されるものの、島状多結晶シリコン膜
７の中央部１０では10〜30μｍ、周囲１１では1μ
ｍ以下とグレインサイズの大きさが異なることも
分つた。これは島状多結晶シリコン７の隙間８で
はレーザ光４による吸収、発熱がないためと考え
られる。 Therefore, an attempt was made to separate the polycrystalline silicon film 2 into islands 7, as shown in FIG. 2a, and to irradiate them with laser. The results are shown in FIG. 2b. It has been found that if the irradiation energy of the laser beam is too large, the periphery of the island-shaped semiconductor film 7 is deformed during melting and cooling to become trapezoidal 9 or spherical. In the case of appropriate irradiation energy, the island-like semiconductor film is preserved, but the thickness of the island-like polycrystalline silicon film 7 is 10 to 30 μm at the center 10 and 1 μm at the periphery 11.
It was also found that the grain size is different from the grain size below m. This is considered to be because there is no absorption or heat generation by the laser beam 4 in the gap 8 between the island-like polycrystalline silicon 7.
このように多結晶シリコン膜２を島状７とする
ことにより冷却時に発生するストレスは島と島と
の間に吸収されてひび割れが抑圧されるが、多結
晶シリコン膜２を島状に形成せねばならぬために
LSIなどを製作しようとすればパターン配置に制
約を受けてしまう。また島状に分割しても島の内
部と周囲ではグレインサイズの違いによる特性の
不揃が生じるためにより厳しい制約がパターン設
計や配置に課せられることになる。 By forming the polycrystalline silicon film 2 into an island shape 7 in this way, the stress generated during cooling is absorbed between the islands and cracks are suppressed. However, if the polycrystalline silicon film 2 is formed into an island shape, in order to have to
When trying to manufacture LSI etc., there are restrictions on pattern placement. Furthermore, even if the grain is divided into islands, the characteristics will be uneven between the inside and the surrounding area of the island due to the difference in grain size, which will impose stricter restrictions on pattern design and arrangement.
島状多結晶シリコン膜７の大きさは数十〜数百
μｍに選ばれるが、大きければひび割れが島内に
生じることもあり、小さければパターン設計と配
置に制約を受けることになる。なお島状多結晶シ
リコン膜７の横方向の変化９は隙間８を厚い絶縁
膜で埋めておくことによりかなり抑圧できること
が分つたが、ひび割れを防止することは難しい。
本発明は上記した問題点に鑑みなされたものであ
り、ひび割れを生じることなく均一なグレインサ
イズを得ることを目的とする。以下、第３図、第
４図とともに本発明の実施例について説明する。 The size of the island-like polycrystalline silicon film 7 is selected to be several tens to hundreds of μm, but if it is large, cracks may occur within the island, and if it is small, pattern design and arrangement will be restricted. It has been found that the lateral change 9 in the island-like polycrystalline silicon film 7 can be considerably suppressed by filling the gap 8 with a thick insulating film, but it is difficult to prevent cracks.
The present invention was made in view of the above-mentioned problems, and an object of the present invention is to obtain a uniform grain size without causing cracks. Embodiments of the present invention will be described below with reference to FIGS. 3 and 4.
第３図ａにおいて基板１上に多結晶シリコン膜
２を5000Åの厚さで被着し、その表面に絶縁膜３
を薄く形成する。そしてレーザ光吸収膜１２とし
て吸収係数の大きい多結晶シリコン膜を1000〜
3000Å程被着する。レーザ光４は前記したように
数Ｗの出力でビームスポツトは10〜30μｍに絞つ
て照射しながら走査する。レーザ照射の結果は第
３図ｂに示す通りで光吸収膜１２にひび割れ６が
生じても多結晶シリコン膜２にひび割れが生じる
ことは極めて稀であつた。本発明においては光吸
収膜１２にレーザ光４のエネルギの大部分を一旦
吸収させて光吸収膜１２を溶融させ、薄い保護膜
３を介して多結晶シリコン膜２を加熱、溶融する
ために従来のように直接多結晶シリコン膜２を加
熱、溶融する場合よりも冷却時の時定数が長くな
つて急激な冷却が緩和され、したがつてひび割れ
が生じにくくなるためと思われる。光吸収膜１２
が厚いとレーザ光の出力が大きくなければなら
ず、またその表面のみが溶融して多結晶シリコン
膜２が高温に加熱されにくくなる。光吸収膜１２
が薄いとレーザ光のエネルギが直接結晶シリコン
膜２を加熱する割合が増して、従来と同じように
ひび割れを生じやすくなるので光吸収膜１２には
最適な膜厚範囲の存在することが分るであろう。
もちろんこの膜厚は光吸収膜１２の比熱や吸収係
数によつて大きく左右される。絶縁膜３は光吸収
膜１２と多結晶シリコン膜２とが溶融した時に直
接反応したり、混ざり合うのを防止するために必
須の構成要素であるから薄すぎてはいけないと同
時に光吸収膜１２から多結晶シリコン膜２への熱
伝導および光透過を低下させるほど厚くてもいけ
ない。したがつてその膜厚は300〜1000Åが好ま
しい。またその材質はSiO2、Si3N4、Al2O3など
1000℃以上の融点を有する絶縁物が最適であろ
う。 In FIG. 3a, a polycrystalline silicon film 2 is deposited on a substrate 1 to a thickness of 5000 Å, and an insulating film 3
form a thin layer. Then, as the laser light absorption film 12, a polycrystalline silicon film with a large absorption coefficient is used.
Approximately 3000 Å is deposited. As described above, the laser beam 4 has an output of several watts and scans while irradiating the beam spot with a focus of 10 to 30 .mu.m. The results of the laser irradiation are as shown in FIG. 3b, and even if cracks 6 were formed in the light absorption film 12, cracks in the polycrystalline silicon film 2 were extremely rare. In the present invention, the light absorbing film 12 is made to absorb most of the energy of the laser beam 4 once to melt the light absorbing film 12, and the polycrystalline silicon film 2 is heated and melted through the thin protective film 3. This seems to be because the time constant during cooling is longer than in the case of directly heating and melting the polycrystalline silicon film 2 as in the above, and rapid cooling is relaxed, and therefore cracks are less likely to occur. Light absorption film 12
If the polycrystalline silicon film 2 is thick, the output of the laser beam must be large, and only the surface of the polycrystalline silicon film 2 is melted, making it difficult to heat the polycrystalline silicon film 2 to a high temperature. Light absorption film 12
If it is thin, the rate at which the laser beam energy directly heats the crystalline silicon film 2 increases, making it more likely to cause cracks as in the conventional case, so it can be seen that there is an optimal film thickness range for the light absorption film 12. Will.
Of course, this film thickness is greatly influenced by the specific heat and absorption coefficient of the light absorption film 12. The insulating film 3 is an essential component to prevent the light-absorbing film 12 and the polycrystalline silicon film 2 from directly reacting or mixing when melted, so it must not be too thin. It must not be so thick that it reduces heat conduction and light transmission from the polycrystalline silicon film 2 to the polycrystalline silicon film 2. Therefore, the film thickness is preferably 300 to 1000 Å. The material is SiO 2 , Si 3 N 4 , Al 2 O 3 etc.
An insulator with a melting point of 1000°C or higher would be optimal.
第４図は本発明の他の実施例を示す断面図であ
る。多結晶シリコン膜が島状７に形成され、その
表面に絶縁膜３が被着形成された後に全面に光吸
収膜１２が被着されている。この場合には多結晶
シリコン膜７が島状に形成されているためにひび
割れを発生する恐れは皆無であり、また島７の隙
間にも光吸収膜１２が存在するために島状多結晶
シリコン膜７の中心部と端部での加熱条件がほぼ
同じになつてグレインサイズが揃うという特徴を
有する。第３図、第４図において、光吸収膜たる
多結晶シリコン層１２はレーザ照射後は不要であ
るので除去し、また必要とあらば保護膜たる絶縁
膜３も次工程で除去される。 FIG. 4 is a sectional view showing another embodiment of the present invention. A polycrystalline silicon film is formed in an island shape 7, and after an insulating film 3 is deposited on the surface thereof, a light absorption film 12 is deposited on the entire surface. In this case, since the polycrystalline silicon film 7 is formed in the form of islands, there is no risk of cracks occurring, and since the light absorption film 12 is also present in the gaps between the islands 7, the polycrystalline silicon film 7 is formed in the form of islands. It has the characteristic that the heating conditions at the center and the ends of the film 7 are almost the same, so that the grain size is uniform. In FIGS. 3 and 4, the polycrystalline silicon layer 12, which is a light absorption film, is unnecessary after laser irradiation and is removed, and if necessary, the insulating film 3, which is a protective film, is also removed in the next step.
第５図は本発明の別の実施例を示す断面図であ
る。第４図との違いは絶縁膜３によつて表面を絶
縁された島状多結晶シリコン７間の隙間が光吸収
膜１２によつて多結晶シリコン膜７の厚みとほぼ
等しく選択的に埋められている点にある。このた
め先に述べた実施例とは異なり光吸収膜１２は島
状多結晶シリコン７間のみを加熱するので、レー
ザ光４の出力は従来例と同じでよい。冷却時に発
生するストレスは光吸収膜１２と島状多結晶シリ
コン膜７との間に存在する絶縁膜３に吸収される
のでひび割れの発生は抑圧されて皆無である。ま
た第２図ａとの比較からも明らかなように島状多
結晶シリコン膜７間の隙間８においても光吸収膜
１２による加熱、溶融が行なわれるので島状多結
晶シリコン膜７の中心部と周囲における加熱、冷
却条件がほぼ同じになりグレインサイズが揃うこ
とは明らかであろう。光吸収膜１２と島状半導体
層７が同一の物質、たとえばシリコンである場合
にはグレインサイズは極めてよく揃う。第５図に
おいて光吸収膜たる多結晶シリコン層１２はレー
ザ照射後に前述したように除去してもよく、ある
いは新たに半導体層としての利用を図り、例えば
拡散層などに形成してもよい。ただし、半導体層
７と同じ膜質ではないのでMOSトランジスタな
どは形成せぬ方が賢明であろう。 FIG. 5 is a sectional view showing another embodiment of the present invention. The difference from FIG. 4 is that the gaps between the islands of polycrystalline silicon 7 whose surfaces are insulated by the insulating film 3 are selectively filled by the light absorption film 12, which is approximately equal in thickness to the polycrystalline silicon film 7. The point is that Therefore, unlike the previously described embodiment, the light absorption film 12 heats only the space between the island-like polycrystalline silicon 7, so the output of the laser beam 4 may be the same as in the conventional example. The stress generated during cooling is absorbed by the insulating film 3 existing between the light absorbing film 12 and the island-shaped polycrystalline silicon film 7, so that the occurrence of cracks is suppressed and completely eliminated. Furthermore, as is clear from the comparison with FIG. It is clear that the heating and cooling conditions in the surroundings are almost the same and the grain sizes are uniform. When the light absorbing film 12 and the island-like semiconductor layer 7 are made of the same material, for example silicon, the grain sizes are extremely uniform. In FIG. 5, the polycrystalline silicon layer 12, which is a light absorption film, may be removed as described above after laser irradiation, or it may be used as a new semiconductor layer, for example, formed as a diffusion layer. However, since it does not have the same film quality as the semiconductor layer 7, it would be wise not to form a MOS transistor or the like.
なお光吸収膜１２を島状多結晶シリコン膜７間
の隙間８に選択的に埋め込むためには第４図の状
態から研磨していく手法もあるが、バイアスされ
たスパツタ蒸着を利用して光吸収膜１２をやや厚
めに被着した後に食刻によつて一様に厚みを減じ
るのが簡便であろう。バイアスされたスパツタ蒸
着ではバイアス条件を店頭に設定することにより
下地に凹凸があつても蒸着後には平担な被着面が
得られることは公知である。 Note that in order to selectively fill the light absorption film 12 into the gaps 8 between the island-like polycrystalline silicon films 7, there is a method of polishing from the state shown in FIG. It would be convenient to deposit the absorbent film 12 somewhat thickly and then uniformly reduce the thickness by etching. It is known that in biased sputter deposition, by setting the bias conditions at a store, a flat deposition surface can be obtained after deposition even if the underlying surface is uneven.
以上の説明からも明らかなように本発明におい
ては光吸収膜を導入することによりレーザ光のエ
ネルギを一旦光吸収膜に移し変えてから半導体層
を加熱するので冷却時の急激なストレスを緩和さ
せることが可能で、したがつて従来のレーザ照射
処理と比べるとひび割れが著しく減少する。また
島状の半導体層内のグレインサイズも極めてよく
揃つた大きさに成長するなどの優れた特長を有
し、光吸収膜の被着という新たな工程の増加を補
つて余りある長所といえる。 As is clear from the above explanation, in the present invention, by introducing a light absorption film, the energy of the laser beam is transferred to the light absorption film and then the semiconductor layer is heated, which alleviates the sudden stress during cooling. This results in a significant reduction in cracking compared to conventional laser irradiation treatments. It also has excellent features such as the grain size within the island-shaped semiconductor layer growing to an extremely uniform size, which can be said to be an advantage that more than compensates for the increase in the new process of depositing a light-absorbing film.
半導体層として実施例では多結晶シリコンを挙
げたが、結晶性に関しては単結晶でもアモルフア
スでも構わず、材質に関してもシリコン以外の
−あるいは−族の化合物半導体でも制約が
ないことは言うまでもない。 Although polycrystalline silicon is used as the semiconductor layer in the embodiment, it goes without saying that it may be either single crystal or amorphous in terms of crystallinity, and that there are no restrictions on the material, even if it is a compound semiconductor other than silicon or a - group compound semiconductor.
またレーザと光吸収膜として実施例ではアルゴ
ンレーザとシリコンを挙げたが、これ以外の組合
わせでも一向に支障をきたさない。要は使用しよ
うとするレーザ光源に対して大きな吸収係数と高
い融点を有しておればよく、光吸収膜の材質は半
導体でも金属でも差し支えない。レーザ光は連続
モードでもよく、あるいはＱスイツチを適用した
ものでもよいことは言うまでもない。 Further, although an argon laser and silicon are used as the laser and the light absorption film in the embodiment, other combinations may be used without any problem. In short, it is sufficient that the material has a large absorption coefficient and a high melting point for the laser light source to be used, and the material of the light absorption film may be either a semiconductor or a metal. It goes without saying that the laser beam may be in a continuous mode or may be one to which a Q switch is applied.
第１図、第２図は従来例におけるレーザ照射に
よる半導体層の加熱状態を示す半導体層の断面
図、第３図、第４図、第５図は本発明の半導体装
置の製造方法における半導体層の加熱状態を示す
断面図である。
１……絶縁性基板、２……半導体膜、３……絶
縁膜、４……レーザ光、５……走査むら、６……
ひび割れ、７……島状半導体膜、８……隙間、９
……変形部、１０……中心部、１１……周囲、１
２……光吸収膜。
1 and 2 are cross-sectional views of a semiconductor layer showing the state of heating of the semiconductor layer by laser irradiation in a conventional example, and FIGS. 3, 4, and 5 are semiconductor layers in a method of manufacturing a semiconductor device of the present invention. FIG. 1... Insulating substrate, 2... Semiconductor film, 3... Insulating film, 4... Laser light, 5... Scanning unevenness, 6...
Crack, 7... Island-shaped semiconductor film, 8... Gap, 9
...Deformed part, 10... Center, 11... Surroundings, 1
2...Light absorption film.
Claims (1)
工程と、前記半導体膜上に絶縁膜を被着する工程
と、前記絶縁膜上に光吸収膜を被着する工程と、
前記光吸収膜上から光吸収膜にほとんどのエネル
ギーを吸収される波長のレーザ光を照射すること
によつて前記半導体膜を間接的に加熱する工程
と、レーザ照射後に前記光吸収膜を除去する工程
とからなる半導体装置の製造方法。 ２ 絶縁膜が酸化シリコン、窒化シリコン、アル
ミナの少なくとも１つよりなることを特徴とする
特許請求の範囲第１項に記載の半導体装置の製造
方法。 ３ 絶縁性基板の一主面上に島状の半導体膜を選
択的に被着形成する工程と、前記半導体膜上に絶
縁膜を被着する工程と、前記絶縁膜上に光吸収膜
を被着する工程と、前記光吸収膜上から光吸収膜
にほとんどのエネルギーを吸収される波長のレー
ザ光を照射することによつて前記半導体膜を間接
的に加熱する工程と、レーザ照射後に前記光吸収
膜を除去する工程とからなる半導体装置の製造方
法。 ４ 絶縁膜が酸化シリコン、窒化シリコン、アル
ミナの少なくとも１つよりなることを特徴とする
特許請求の範囲第３項に記載の半導体装置の製造
方法。 ５ 絶縁性基板の一主面上に島状の半導体膜を選
択的に被着形成する工程と、前記半導体膜上に絶
縁膜を被着する工程と、前記島状の半導体膜の間
を光吸収膜で埋める工程と、前記絶縁性基板の一
主面上方から光吸収膜にほとんどのエネルギーを
吸収される波長のレーザ光を照射することによつ
て前記半導体膜を上面と側面から加熱する工程
と、レーザ照射後に前記光吸収膜を除去する工程
とからなる半導体装置の製造方法。 ６ 絶縁膜が酸化シリコン、窒化シリコン、アル
ミナの少なくとも１つよりなることを特徴とする
特許請求の範囲第５項に記載の半導体装置の製造
方法。[Scope of Claims] 1. A step of depositing a semiconductor film on one main surface of an insulating substrate, a step of depositing an insulating film on the semiconductor film, and a step of depositing a light absorption film on the insulating film. The process of
A step of indirectly heating the semiconductor film by irradiating the light absorption film with laser light of a wavelength that absorbs most of the energy by the light absorption film, and removing the light absorption film after the laser irradiation. A method for manufacturing a semiconductor device comprising steps. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the insulating film is made of at least one of silicon oxide, silicon nitride, and alumina. 3. A step of selectively depositing an island-shaped semiconductor film on one main surface of an insulating substrate, a step of depositing an insulating film on the semiconductor film, and a step of depositing a light-absorbing film on the insulating film. a step of indirectly heating the semiconductor film by irradiating laser light with a wavelength that absorbs most of the energy into the light absorption film from above the light absorption film; A method for manufacturing a semiconductor device, comprising the step of removing an absorption film. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the insulating film is made of at least one of silicon oxide, silicon nitride, and alumina. 5. A step of selectively depositing an island-shaped semiconductor film on one main surface of an insulating substrate, a step of depositing an insulating film on the semiconductor film, and a step of applying light between the island-shaped semiconductor films. a step of filling the insulating substrate with an absorption film; and a step of heating the semiconductor film from the top and side surfaces by irradiating laser light with a wavelength at which most of the energy is absorbed by the light absorption film from above one principal surface of the insulating substrate. and a step of removing the light absorption film after laser irradiation. 6. The method of manufacturing a semiconductor device according to claim 5, wherein the insulating film is made of at least one of silicon oxide, silicon nitride, and alumina.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18800280A JPS57113217A (en) | 1980-12-29 | 1980-12-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18800280A JPS57113217A (en) | 1980-12-29 | 1980-12-29 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57113217A JPS57113217A (en) | 1982-07-14 |
| JPH0334647B2 true JPH0334647B2 (en) | 1991-05-23 |
Family
ID=16215915
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18800280A Granted JPS57113217A (en) | 1980-12-29 | 1980-12-29 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57113217A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5247673A (en) * | 1975-10-15 | 1977-04-15 | Hitachi Ltd | Process for production of silicon crystal film |
-
1980
- 1980-12-29 JP JP18800280A patent/JPS57113217A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5247673A (en) * | 1975-10-15 | 1977-04-15 | Hitachi Ltd | Process for production of silicon crystal film |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57113217A (en) | 1982-07-14 |
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