JPH0332905B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a ceramic capacitor, and particularly to a highly reliable ceramic capacitor that prevents deterioration of insulation resistance at high temperatures.

(Prior Art) In recent years, as electronic components have become smaller and lighter, ceramic capacitors have also been pursued to be smaller and lighter. In particular, with regard to ceramic capacitors, in parallel with the progress of miniaturization, studies are being conducted to increase the capacitance, and as a means of achieving this, attempts are being made to reduce the thickness of the capacitors.

The following improvements can be considered as means for making ceramic capacitors thinner.

A method of forming a thin dielectric ceramic layer using a vacuum thin film forming method such as a sputtering method, a vacuum evaporation method, an ion plating method, or a vapor phase evaporation method.

A method of making the dielectric ceramic layer as thin as possible by microcrystallizing the dielectric ceramic material.

A method of obtaining a grain boundary insulated dielectric ceramic layer by forming an insulating layer at the grain boundaries of a thin semiconductor ceramic layer.

Among the above methods, there is a method in which internal electrodes are formed between a plurality of dielectric ceramic layers to form a laminated ceramic capacitor to further increase the capacitance.

(Problems to be Solved by the Invention) However, after thinning the dielectric ceramic layer by the above method, electrodes for taking out the capacitance can be formed by sputtering, vacuum evaporation, ion plating, or vapor phase evaporation. When a ceramic capacitor is constructed by forming a ceramic capacitor by a method such as a plating method or an electroless plating method, various troubles occur. What is particularly noticeable is the deterioration of insulation resistance when used at high temperatures.

The biggest cause of this trouble is that the dielectric ceramic is made of metal oxide, and the electrodes are made of metal. That is, according to such a combination,
At the interface where the metal oxide constituting the dielectric ceramic and the metal constituting the electrode come into contact, it is thought that exchange of oxygen occurs as an inevitable phenomenon. This exchange of oxygen is difficult to recognize at room temperature, but as the temperature rises, exchange of oxygen begins to take place.

For example, if the dielectric ceramic is TiO ₂ and the electrode is
Taking a ceramic capacitor made of Cu as an example, at high temperature, for example 150℃,
TiO ₂ and Cu change as follows.

TiO ₂ reduction---→ TiO ₂ -x Cu oxidation---→ CuOx (0<x<2) When oxygen exchange occurs between the dielectric ceramic and the electrode in this way, the dielectric constant of the dielectric ceramic ( In addition to changes in ε), insulation resistance (IR) also changes significantly, and its value generally decreases by more than two orders of magnitude.

Such a phenomenon appears particularly when the dielectric ceramic layer is made thinner, and applies to the ceramic capacitor obtained by the above-mentioned improvement means for making the ceramic capacitor thinner.

(Objective of the Invention) Therefore, an object of the present invention is to provide a highly reliable ceramic capacitor that does not cause changes in dielectric constant or deterioration of insulation resistance by having a structure that does not reduce the dielectric ceramic when used at high temperatures. With the goal.

(Structure of the Invention) That is, the present invention is a ceramic capacitor characterized in that a nickel oxide layer is interposed between a dielectric ceramic and an external connection electrode formed on the surface of the dielectric ceramic.

Here, examples of dielectric ceramics include high permittivity ceramics such as barium titanate and strontium titanate, titanium oxide, magnesium titanate, magnesium oxide-titanium oxide, and silicon oxide. These include temperature-compensated ceramics, and grain-boundary insulated dielectric ceramics in which the grain boundaries of semiconductor ceramics are made into insulators.

Further, when the thickness of the dielectric ceramic is 50 μm or less, the effect becomes more pronounced when a nickel oxide layer is interposed between the dielectric ceramic and the external connection electrode. In other words, if the thickness of the dielectric ceramic exceeds 50 μm, even if the dielectric ceramic is reduced by the electrode during high-temperature use, the dielectric ceramic is thick enough to cause changes in the dielectric constant and insulation resistance. No noticeable deterioration occurs. Therefore, the dielectric ceramic of the present invention having a thickness of 50 μm or less is particularly effective. However, there is no problem in applying the present invention to a dielectric ceramic having a thickness exceeding 50 μm, and it is optional to interpose a nickel oxide layer between the dielectric ceramic and the external connection electrode.

As a means for forming the nickel oxide layer, thin film forming means such as sputtering, ion plating, vacuum evaporation, vapor phase evaporation, and electroless plating are used. When forming a nickel oxide layer by sputtering, for example, metal nickel can be used as a target and the atmosphere during sputtering can be a mixed gas of argon and oxygen. Further, when forming a nickel oxide layer by a vacuum evaporation method, the nickel oxide layer can be formed, for example, by heating metal nickel or metal nickel powder and evaporating it in an oxygen-containing atmosphere. Furthermore, in the case of a vapor phase deposition method or an electroless plating method, after forming a nickel layer, a nickel oxide layer can be formed by thermal oxidation.

The thickness of this nickel oxide layer is preferably 2 μm or less. This is because the ESR increases when the thickness exceeds 2 μm. The type of metal used for the external connection electrode is not particularly limited, and commonly used metals such as Ag,
Au, Cr, Zr, V, Ni, Zn, Cu, Sn, Pb-Sn,
There are one type or a combination of two or more of Mn, Mo, W, Ti, Pd, Al, etc., and this external connection electrode may have a multilayer structure, for example.
Examples include Cr-Cu and Cr-Ni-Ag.

Examples of the structure of the ceramic capacitor according to the present invention include a ceramic capacitor made of a single layer of dielectric ceramic, and a multilayer ceramic capacitor. The present invention is also applicable to the case where the various ceramic capacitors described above are of the grain boundary insulation type.

(Examples) Hereinafter, the present invention will be described in detail according to examples.

Example 1 Ceramic dielectric raw material powder having the following composition was prepared.

_Nd2Ti2O7 : 63 mol% _{, BaTiO3} : 14 mol _% ,
TiO ₂ : 23 mol% This raw material powder was mixed with polyvinyl alcohol as a binder, a surfactant, a dispersant, and water to create a slurry. This slurry was then used to form ceramic green sheets with a thickness of 35 μm using the doctor blade method. Created.

This ceramic green sheet has a length of 7.0mm,
Cut into 5.0mm wide pieces and place on this sheet.
An Ag-Pd paste containing 70 wt% Ag and 30 wt% Pd was printed. Eleven ceramic green sheets with internal electrodes formed in this way were stacked so that the internal electrodes were exposed at the end faces of the stack. This laminate was fired in air at 1250°C to obtain a sintered unit.
The thickness of each dielectric layer of the obtained laminate was 20 μm.

Next, a nickel oxide layer was first formed by sputtering on the end face of this laminated sintered unit where the internal electrodes were exposed.

This nickel oxide layer was formed under the following conditions.

Sputtering atmosphere: Argon containing 10% oxygen Pressure: 3 x 10 ^-3 Torr Target: Nickel plate with a diameter of 5 inches and a thickness of 2 mm Voltage: 500VD.C. Current: 2.0A Sputtering time: 5 minutes Nickel nitride Thickness of layer: 2000 Å Subsequently, a Ni layer as a solder heat-resistant layer was first formed by sputtering on the nickel oxide layer as a first layer of external connection electrode.

This Ni layer was formed under the following conditions.

Spatuter zero atmosphere: Argon Pressure: 2×10 ^-3 Torr Target: Nickel plate with a diameter of 5 inches and a thickness of 2 mm Voltage: 480 VD.C. Current: 2.0 A Time: 15 minutes Film thickness: 5000 Å Additionally, a Ni layer An Ag layer was formed thereon as a second layer of external connection electrode by sputtering.
This Ag layer serves as a solderable layer.

The Ag layer was formed under the following conditions.

Sputtering atmosphere: Argon Pressure: 2×10 ^-3 Torr Target: Ag with a diameter of 5 inches and a thickness of 5 mm
Plate voltage: 540VD.C. Current: 2.0A Time: 6 minutes Film thickness: 1 μm A high temperature accelerated load life test was conducted on the multilayer capacitor obtained through the above process under the following conditions. In other words, this capacitor is installed in a temperature atmosphere of 150℃, and the voltage is 300V, which is six times the rated voltage (50V).
was applied and the insulation resistance (IR) measured 100 hours later was 10 ¹¹ Ω. By the way, the initial value of the insulation resistance (IR) of this multilayer capacitor was 10 ¹¹ Ω. In addition, when the insulation resistance (IR) was measured after 500 hours by installing it in an atmosphere with a temperature of 45℃ and a relative temperature of 95% and applying a rated voltage of 50V, it was 10 ¹¹ Ω, which showed no change compared to the initial value. I couldn't see it.

Comparative Example 1 Without forming a nickel oxide layer on the laminated sintered unit obtained in Example 1, under the same conditions as Example 1, the Ni electrode for external connection of the first layer and the electrode for external connection of the second layer were formed. A multilayer capacitor was created by forming an Ag layer as an electrode.

When this multilayer capacitor was tested in the same manner as in Example 1, the insulation resistance (IR) decreased to 10 Ω ⁹ after 10 hours, and deteriorated to 10 ⁶ Ω after 25 hours.

Example 2 SrTiO ₃ : 99.3 mol%, Y ² O ₃ : 0.3 mol%,
Each component was weighed so that the composition was 0.2 mol% of SiO ₂ and 0.2 mol% of Al ₂ O ₃ , and 10% by weight of an organic binder was added to the weighed raw materials. Mixing and grinding were performed. After granulating this, it was molded at a pressure of 1000 Kg/cm ² to obtain a disc-shaped molded product. This molded body was fired at 1350°C for 2 hours. Metal oxides such as Pb and Bi are applied to the surface of the resulting porcelain, and heat treatment is performed at a temperature of 1000 to 1200°C to convert the grain boundaries of the porcelain into insulators, creating a grain boundary-insulated semiconductor porcelain body. Created. Using this semiconductor ceramic body, a nickel oxide layer, a first layer of external connection electrodes, and a second layer of external connection electrodes were formed on the surface by the same method as in Example 1, and a grain boundary insulated semiconductor ceramic body was formed. Created a capacitor.

This capacitor was subjected to the high temperature accelerated load life test described in Example 1. As a result, while the initial value of insulation resistance (IR) was 10 ¹⁰ Ω,
After 100 hours, it was 10 ¹⁰ Ω, confirming that there was almost no deterioration in insulation resistance (IR).

Comparative Example 2 Using the grain boundary insulated semiconductor ceramic element obtained in Example 2, external connection of the first layer was made under the same conditions as Example 1 without forming a nickel oxide layer on the surface of this magnetic element. A grain boundary insulated semiconductor porcelain capacitor was fabricated by forming a Ni layer serving as a secondary electrode and an Ag layer serving as a second external connection electrode.

When this capacitor was tested in the same manner as in Example 1, the insulation resistance (IR) was
The resistance decreased to 10 ⁷ Ω, and after 25 hours, it deteriorated to 10 ⁵ Ω.

Example 3 On an alumina substrate, an Ag layer and a Ni layer were used as the lower electrode.
The layers were successively formed in the same manner as in Example 1, and the nickel oxide layer was also formed in the same manner as in Example 1.

Next, a dielectric ceramic SiO ₂ film was formed on the nickel oxide layer to a thickness of 5000 Å by high-frequency sputtering.

Note that the conditions for forming the SiO ₂ film by high frequency sputtering method are as follows.

Sputtering atmosphere: Argon containing 5% oxygen Pressure: 5 × 10 ^-3 Torr Target: Quartz plate with a diameter of 5 inches and a thickness of 5 mm Input power: 500 W Time: 100 minutes SiO ₂ film thickness: 5000 Å After that, SiO 2 film thickness: 5000 Å A nickel oxide layer was formed on the ₂ film by the same method as in Example 1, and then a Ni layer and an Ag layer were formed on top of it in the same manner as in Example 1 to create a thin film capacitor made of SiO ₂ . did.

The high temperature accelerated load life test described in Example 1 was conducted on this capacitor. As a result, the initial value of insulation resistance (IR) was 10 ¹³ Ω, but
After hours it was 10 ¹³ Ω.

Comparative Example 3 In producing the thin film capacitor according to Example 3, a thin film capacitor was produced by carrying out the method described in Example 3 except for forming the nickel oxide layer.

When this capacitor was tested in the same manner as in Example 1, the insulation resistance was reduced to 10 ⁸ Ω.

(Effects) As described above, according to the present invention, by interposing the nickel oxide layer between the dielectric ceramic and the external connection electrode, reduction of the dielectric ceramic by the electrode, which occurs during high-temperature use, is prevented. As a result, there is an effect that deterioration of electrical characteristics, particularly insulation resistance, does not occur.

Claims (1)

[Scope of Claims] 1. A ceramic capacitor including a dielectric ceramic and an external connection electrode formed on the surface of the dielectric ceramic, further comprising a nickel oxide layer between the dielectric ceramic and the external connection electrode. A ceramic capacitor characterized by being formed with. 2. A first external connection electrode is formed on the substrate,
A ceramic capacitor in which a dielectric ceramic is formed on the first external connection electrode, and a second external connection electrode is formed on the dielectric ceramic, wherein the dielectric ceramic and the first external connection electrode are formed on the dielectric ceramic. 2. The ceramic capacitor according to claim 1, wherein a nickel oxide layer is formed between the connection electrode and the second external connection electrode. 3. A laminated dielectric ceramic element body consisting of a plurality of layers of dielectric ceramic and a plurality of internal electrodes arranged in a laminated state with each other via the dielectric ceramic to form a capacitance, In a multilayer ceramic capacitor in which a pair of external connection electrodes are formed for taking out capacitance connected to predetermined ones of the internal electrodes, the dielectric ceramic body and the external connection electrodes are connected to each other. 2. A ceramic capacitor according to claim 1, wherein a nickel oxide layer is formed between the capacitors. 4. The ceramic capacitor according to claims 1 to 3, wherein the dielectric ceramic has a thickness of 50 μm or less. 5. The ceramic capacitor according to claims 1 to 3, wherein the thickness of the nickel oxide layer is 2 μm or less. 6 The external connection electrode may be formed by a sputtering method, a vacuum evaporation method, an ion plating method, a vapor phase evaporation method,
The ceramic capacitor according to claims 1 to 3, which is formed by either an electroless plating method or an electroless plating method.