JPH0332439U - - Google Patents

Info

Publication number
JPH0332439U
JPH0332439U JP9252689U JP9252689U JPH0332439U JP H0332439 U JPH0332439 U JP H0332439U JP 9252689 U JP9252689 U JP 9252689U JP 9252689 U JP9252689 U JP 9252689U JP H0332439 U JPH0332439 U JP H0332439U
Authority
JP
Japan
Prior art keywords
pin
plug
standoff
utility
scope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9252689U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9252689U priority Critical patent/JPH0332439U/ja
Publication of JPH0332439U publication Critical patent/JPH0332439U/ja
Pending legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図A,B,Cは本考案のスタンドオフピン
の具体例を示す図である。第2図は従来のスタン
ドオフピンの概略図である。第3図は本考案の第
1の実施例のピングリツドアレイのピン構造を示
す概略図である。第4図は本考案の第2の実施例
のピングリツドアレイのピン構造を示す概略図で
ある。第5図は本考案の第3の実施例のピングリ
ツドアレイのピン構造を示す概略図である。 1……パツケージ、2,12,22……つば、
3……一般ピン。
FIGS. 1A, B, and C are diagrams showing specific examples of the standoff pin of the present invention. FIG. 2 is a schematic diagram of a conventional standoff pin. FIG. 3 is a schematic diagram showing the pin structure of the pin grid array according to the first embodiment of the present invention. FIG. 4 is a schematic diagram showing the pin structure of a pin grid array according to a second embodiment of the present invention. FIG. 5 is a schematic diagram showing the pin structure of a pin grid array according to a third embodiment of the present invention. 1...Package, 2,12,22...Brim,
3...General pin.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 差し込みピンを有する半導体パツケージにおい
て、素し込みピンのスタンドオフピンのつば形状
を非円形としたことを特徴とする半導体パツケー
ジ。
1. A semiconductor package having a plug-in pin, characterized in that a standoff pin of the plug-in pin has a non-circular brim shape.
JP9252689U 1989-08-08 1989-08-08 Pending JPH0332439U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9252689U JPH0332439U (en) 1989-08-08 1989-08-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9252689U JPH0332439U (en) 1989-08-08 1989-08-08

Publications (1)

Publication Number Publication Date
JPH0332439U true JPH0332439U (en) 1991-03-29

Family

ID=31641948

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9252689U Pending JPH0332439U (en) 1989-08-08 1989-08-08

Country Status (1)

Country Link
JP (1) JPH0332439U (en)

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